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GET /api/patches/96524/?format=api
HTTP 200 OK
Allow: GET, PUT, PATCH, HEAD, OPTIONS
Content-Type: application/json
Vary: Accept

{
    "id": 96524,
    "url": "http://patchwork.dpdk.org/api/patches/96524/?format=api",
    "web_url": "http://patchwork.dpdk.org/project/dpdk/patch/20210802101847.3462-9-joyce.kong@arm.com/",
    "project": {
        "id": 1,
        "url": "http://patchwork.dpdk.org/api/projects/1/?format=api",
        "name": "DPDK",
        "link_name": "dpdk",
        "list_id": "dev.dpdk.org",
        "list_email": "dev@dpdk.org",
        "web_url": "http://core.dpdk.org",
        "scm_url": "git://dpdk.org/dpdk",
        "webscm_url": "http://git.dpdk.org/dpdk",
        "list_archive_url": "https://inbox.dpdk.org/dev",
        "list_archive_url_format": "https://inbox.dpdk.org/dev/{}",
        "commit_url_format": ""
    },
    "msgid": "<20210802101847.3462-9-joyce.kong@arm.com>",
    "list_archive_url": "https://inbox.dpdk.org/dev/20210802101847.3462-9-joyce.kong@arm.com",
    "date": "2021-08-02T10:18:43",
    "name": "[v1,08/12] app/crypto: use compiler atomic builtins for display sync",
    "commit_ref": null,
    "pull_url": null,
    "state": "superseded",
    "archived": true,
    "hash": "b43ad03b462a62bc2f1f8cd583ee335bcedff1f5",
    "submitter": {
        "id": 970,
        "url": "http://patchwork.dpdk.org/api/people/970/?format=api",
        "name": "Joyce Kong",
        "email": "joyce.kong@arm.com"
    },
    "delegate": {
        "id": 1,
        "url": "http://patchwork.dpdk.org/api/users/1/?format=api",
        "username": "tmonjalo",
        "first_name": "Thomas",
        "last_name": "Monjalon",
        "email": "thomas@monjalon.net"
    },
    "mbox": "http://patchwork.dpdk.org/project/dpdk/patch/20210802101847.3462-9-joyce.kong@arm.com/mbox/",
    "series": [
        {
            "id": 18128,
            "url": "http://patchwork.dpdk.org/api/series/18128/?format=api",
            "web_url": "http://patchwork.dpdk.org/project/dpdk/list/?series=18128",
            "date": "2021-08-02T10:18:35",
            "name": "use compiler atomic builtins for app",
            "version": 1,
            "mbox": "http://patchwork.dpdk.org/series/18128/mbox/"
        }
    ],
    "comments": "http://patchwork.dpdk.org/api/patches/96524/comments/",
    "check": "warning",
    "checks": "http://patchwork.dpdk.org/api/patches/96524/checks/",
    "tags": {},
    "related": [],
    "headers": {
        "Return-Path": "<dev-bounces@dpdk.org>",
        "X-Original-To": "patchwork@inbox.dpdk.org",
        "Delivered-To": "patchwork@inbox.dpdk.org",
        "Received": [
            "from mails.dpdk.org (mails.dpdk.org [217.70.189.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id 1DE3CA0C41;\n\tMon,  2 Aug 2021 12:20:53 +0200 (CEST)",
            "from [217.70.189.124] (localhost [127.0.0.1])\n\tby mails.dpdk.org (Postfix) with ESMTP id 084AB4114D;\n\tMon,  2 Aug 2021 12:20:53 +0200 (CEST)",
            "from foss.arm.com (foss.arm.com [217.140.110.172])\n by mails.dpdk.org (Postfix) with ESMTP id D0BE241136\n for <dev@dpdk.org>; Mon,  2 Aug 2021 12:20:51 +0200 (CEST)",
            "from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14])\n by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 6620AD6E;\n Mon,  2 Aug 2021 03:20:51 -0700 (PDT)",
            "from net-arm-n1sdp.shanghai.arm.com (net-arm-n1sdp.shanghai.arm.com\n [10.169.208.222])\n by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id AE3413F70D;\n Mon,  2 Aug 2021 03:20:44 -0700 (PDT)"
        ],
        "From": "Joyce Kong <joyce.kong@arm.com>",
        "To": "thomas@monjalon.net, david.marchand@redhat.com,\n honnappa.nagarahalli@arm.com, ruifeng.wang@arm.com,\n konstantin.ananyev@intel.com, rsanford@akamai.com,\n erik.g.carrillo@intel.com, olivier.matz@6wind.com, yipeng1.wang@intel.com,\n sameh.gobriel@intel.com, bruce.richardson@intel.com,\n vladimir.medvedkin@intel.com, anatoly.burakov@intel.com,\n andrew.rybchenko@oktetlabs.ru, jerinj@marvell.com,\n declan.doherty@intel.com, ciara.power@intel.com, xiaoyun.li@intel.com,\n nicolas.chautru@intel.com, maryam.tahhan@intel.com,\n reshma.pattan@intel.com, cristian.dumitrescu@intel.com",
        "Cc": "dev@dpdk.org,\n\tnd@arm.com",
        "Date": "Mon,  2 Aug 2021 05:18:43 -0500",
        "Message-Id": "<20210802101847.3462-9-joyce.kong@arm.com>",
        "X-Mailer": "git-send-email 2.17.1",
        "In-Reply-To": "<20210802101847.3462-1-joyce.kong@arm.com>",
        "References": "<20210802101847.3462-1-joyce.kong@arm.com>",
        "Subject": "[dpdk-dev] [PATCH v1 08/12] app/crypto: use compiler atomic\n builtins for display sync",
        "X-BeenThere": "dev@dpdk.org",
        "X-Mailman-Version": "2.1.29",
        "Precedence": "list",
        "List-Id": "DPDK patches and discussions <dev.dpdk.org>",
        "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>",
        "List-Archive": "<http://mails.dpdk.org/archives/dev/>",
        "List-Post": "<mailto:dev@dpdk.org>",
        "List-Help": "<mailto:dev-request@dpdk.org?subject=help>",
        "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>",
        "Errors-To": "dev-bounces@dpdk.org",
        "Sender": "\"dev\" <dev-bounces@dpdk.org>"
    },
    "content": "Covert rte_atomic_test_and_set usage to compiler atomic\nCAS operation for display sync in crypto cases.\n\nSigned-off-by: Joyce Kong <joyce.kong@arm.com>\nReviewed-by: Ruifeng Wang <ruifeng.wang@arm.com>\n---\n app/test-crypto-perf/cperf_test_latency.c        | 6 ++++--\n app/test-crypto-perf/cperf_test_pmd_cyclecount.c | 9 ++++++---\n app/test-crypto-perf/cperf_test_throughput.c     | 9 ++++++---\n app/test-crypto-perf/cperf_test_verify.c         | 9 ++++++---\n 4 files changed, 22 insertions(+), 11 deletions(-)",
    "diff": "diff --git a/app/test-crypto-perf/cperf_test_latency.c b/app/test-crypto-perf/cperf_test_latency.c\nindex 159fe8492b..5e73c75fba 100644\n--- a/app/test-crypto-perf/cperf_test_latency.c\n+++ b/app/test-crypto-perf/cperf_test_latency.c\n@@ -126,7 +126,7 @@ cperf_latency_test_runner(void *arg)\n \tuint8_t burst_size_idx = 0;\n \tuint32_t imix_idx = 0;\n \n-\tstatic rte_atomic16_t display_once = RTE_ATOMIC16_INIT(0);\n+\tstatic uint16_t display_once;\n \n \tif (ctx == NULL)\n \t\treturn 0;\n@@ -308,7 +308,9 @@ cperf_latency_test_runner(void *arg)\n \t\ttime_min = tunit*(double)(tsc_min) / tsc_hz;\n \n \t\tif (ctx->options->csv) {\n-\t\t\tif (rte_atomic16_test_and_set(&display_once))\n+\t\t\tuint16_t exp = 0;\n+\t\t\tif (__atomic_compare_exchange_n(&display_once, &exp, 1, 0,\n+\t\t\t\t\t__ATOMIC_RELAXED, __ATOMIC_RELAXED))\n \t\t\t\tprintf(\"\\n# lcore, Buffer Size, Burst Size, Pakt Seq #, \"\n \t\t\t\t\t\t\"cycles, time (us)\");\n \ndiff --git a/app/test-crypto-perf/cperf_test_pmd_cyclecount.c b/app/test-crypto-perf/cperf_test_pmd_cyclecount.c\nindex 844659aeca..a1de334efb 100644\n--- a/app/test-crypto-perf/cperf_test_pmd_cyclecount.c\n+++ b/app/test-crypto-perf/cperf_test_pmd_cyclecount.c\n@@ -404,7 +404,7 @@ cperf_pmd_cyclecount_test_runner(void *test_ctx)\n \tstate.lcore = rte_lcore_id();\n \tstate.linearize = 0;\n \n-\tstatic rte_atomic16_t display_once = RTE_ATOMIC16_INIT(0);\n+\tstatic uint16_t display_once;\n \tstatic bool warmup = true;\n \n \t/*\n@@ -449,8 +449,10 @@ cperf_pmd_cyclecount_test_runner(void *test_ctx)\n \t\t\tcontinue;\n \t\t}\n \n+\t\tuint16_t exp = 0;\n \t\tif (!opts->csv) {\n-\t\t\tif (rte_atomic16_test_and_set(&display_once))\n+\t\t\tif (__atomic_compare_exchange_n(&display_once, &exp, 1, 0,\n+\t\t\t\t\t__ATOMIC_RELAXED, __ATOMIC_RELAXED))\n \t\t\t\tprintf(PRETTY_HDR_FMT, \"lcore id\", \"Buf Size\",\n \t\t\t\t\t\t\"Burst Size\", \"Enqueued\",\n \t\t\t\t\t\t\"Dequeued\", \"Enq Retries\",\n@@ -466,7 +468,8 @@ cperf_pmd_cyclecount_test_runner(void *test_ctx)\n \t\t\t\t\tstate.cycles_per_enq,\n \t\t\t\t\tstate.cycles_per_deq);\n \t\t} else {\n-\t\t\tif (rte_atomic16_test_and_set(&display_once))\n+\t\t\tif (__atomic_compare_exchange_n(&display_once, &exp, 1, 0,\n+\t\t\t\t\t__ATOMIC_RELAXED, __ATOMIC_RELAXED))\n \t\t\t\tprintf(CSV_HDR_FMT, \"# lcore id\", \"Buf Size\",\n \t\t\t\t\t\t\"Burst Size\", \"Enqueued\",\n \t\t\t\t\t\t\"Dequeued\", \"Enq Retries\",\ndiff --git a/app/test-crypto-perf/cperf_test_throughput.c b/app/test-crypto-perf/cperf_test_throughput.c\nindex f6eb8cf259..1407007c6e 100644\n--- a/app/test-crypto-perf/cperf_test_throughput.c\n+++ b/app/test-crypto-perf/cperf_test_throughput.c\n@@ -106,7 +106,7 @@ cperf_throughput_test_runner(void *test_ctx)\n \tuint8_t burst_size_idx = 0;\n \tuint32_t imix_idx = 0;\n \n-\tstatic rte_atomic16_t display_once = RTE_ATOMIC16_INIT(0);\n+\tstatic uint16_t display_once;\n \n \tstruct rte_crypto_op *ops[ctx->options->max_burst_size];\n \tstruct rte_crypto_op *ops_processed[ctx->options->max_burst_size];\n@@ -272,8 +272,10 @@ cperf_throughput_test_runner(void *test_ctx)\n \t\tdouble cycles_per_packet = ((double)tsc_duration /\n \t\t\t\tctx->options->total_ops);\n \n+\t\tuint16_t exp = 0;\n \t\tif (!ctx->options->csv) {\n-\t\t\tif (rte_atomic16_test_and_set(&display_once))\n+\t\t\tif (__atomic_compare_exchange_n(&display_once, &exp, 1, 0,\n+\t\t\t\t\t__ATOMIC_RELAXED, __ATOMIC_RELAXED))\n \t\t\t\tprintf(\"%12s%12s%12s%12s%12s%12s%12s%12s%12s%12s\\n\\n\",\n \t\t\t\t\t\"lcore id\", \"Buf Size\", \"Burst Size\",\n \t\t\t\t\t\"Enqueued\", \"Dequeued\", \"Failed Enq\",\n@@ -293,7 +295,8 @@ cperf_throughput_test_runner(void *test_ctx)\n \t\t\t\t\tthroughput_gbps,\n \t\t\t\t\tcycles_per_packet);\n \t\t} else {\n-\t\t\tif (rte_atomic16_test_and_set(&display_once))\n+\t\t\tif (__atomic_compare_exchange_n(&display_once, &exp, 1, 0,\n+\t\t\t\t\t__ATOMIC_RELAXED, __ATOMIC_RELAXED))\n \t\t\t\tprintf(\"#lcore id,Buffer Size(B),\"\n \t\t\t\t\t\"Burst Size,Enqueued,Dequeued,Failed Enq,\"\n \t\t\t\t\t\"Failed Deq,Ops(Millions),Throughput(Gbps),\"\ndiff --git a/app/test-crypto-perf/cperf_test_verify.c b/app/test-crypto-perf/cperf_test_verify.c\nindex 2939aeaa93..0c053ad3c0 100644\n--- a/app/test-crypto-perf/cperf_test_verify.c\n+++ b/app/test-crypto-perf/cperf_test_verify.c\n@@ -241,7 +241,7 @@ cperf_verify_test_runner(void *test_ctx)\n \tuint64_t ops_deqd = 0, ops_deqd_total = 0, ops_deqd_failed = 0;\n \tuint64_t ops_failed = 0;\n \n-\tstatic rte_atomic16_t display_once = RTE_ATOMIC16_INIT(0);\n+\tstatic uint16_t display_once;\n \n \tuint64_t i;\n \tuint16_t ops_unused = 0;\n@@ -383,8 +383,10 @@ cperf_verify_test_runner(void *test_ctx)\n \t\tops_deqd_total += ops_deqd;\n \t}\n \n+\tuint16_t exp = 0;\n \tif (!ctx->options->csv) {\n-\t\tif (rte_atomic16_test_and_set(&display_once))\n+\t\tif (__atomic_compare_exchange_n(&display_once, &exp, 1, 0,\n+\t\t\t\t__ATOMIC_RELAXED, __ATOMIC_RELAXED))\n \t\t\tprintf(\"%12s%12s%12s%12s%12s%12s%12s%12s\\n\\n\",\n \t\t\t\t\"lcore id\", \"Buf Size\", \"Burst size\",\n \t\t\t\t\"Enqueued\", \"Dequeued\", \"Failed Enq\",\n@@ -401,7 +403,8 @@ cperf_verify_test_runner(void *test_ctx)\n \t\t\t\tops_deqd_failed,\n \t\t\t\tops_failed);\n \t} else {\n-\t\tif (rte_atomic16_test_and_set(&display_once))\n+\t\tif (__atomic_compare_exchange_n(&display_once, &exp, 1, 0,\n+\t\t\t\t__ATOMIC_RELAXED, __ATOMIC_RELAXED))\n \t\t\tprintf(\"\\n# lcore id, Buffer Size(B), \"\n \t\t\t\t\"Burst Size,Enqueued,Dequeued,Failed Enq,\"\n \t\t\t\t\"Failed Deq,Failed Ops\\n\");\n",
    "prefixes": [
        "v1",
        "08/12"
    ]
}