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GET /api/patches/96744/?format=api
{ "id": 96744, "url": "http://patchwork.dpdk.org/api/patches/96744/?format=api", "web_url": "http://patchwork.dpdk.org/project/dpdk/patch/20210810025140.1698163-6-qi.z.zhang@intel.com/", "project": { "id": 1, "url": "http://patchwork.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20210810025140.1698163-6-qi.z.zhang@intel.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20210810025140.1698163-6-qi.z.zhang@intel.com", "date": "2021-08-10T02:51:17", "name": "[05/28] net/ice/base: add timestamp masks", "commit_ref": null, "pull_url": null, "state": "accepted", "archived": true, "hash": "3558aa5e666bb27421b28537e36c24d53ea64fa8", "submitter": { "id": 504, "url": "http://patchwork.dpdk.org/api/people/504/?format=api", "name": "Qi Zhang", "email": "qi.z.zhang@intel.com" }, "delegate": { "id": 1540, "url": "http://patchwork.dpdk.org/api/users/1540/?format=api", "username": "qzhan15", "first_name": "Qi", "last_name": "Zhang", "email": "qi.z.zhang@intel.com" }, "mbox": "http://patchwork.dpdk.org/project/dpdk/patch/20210810025140.1698163-6-qi.z.zhang@intel.com/mbox/", "series": [ { "id": 18242, "url": "http://patchwork.dpdk.org/api/series/18242/?format=api", "web_url": "http://patchwork.dpdk.org/project/dpdk/list/?series=18242", "date": "2021-08-10T02:51:12", "name": "ice: base code update", "version": 1, "mbox": "http://patchwork.dpdk.org/series/18242/mbox/" } ], "comments": "http://patchwork.dpdk.org/api/patches/96744/comments/", "check": "success", "checks": "http://patchwork.dpdk.org/api/patches/96744/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from mails.dpdk.org (mails.dpdk.org [217.70.189.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id F14D1A0C54;\n\tTue, 10 Aug 2021 04:49:09 +0200 (CEST)", "from [217.70.189.124] (localhost [127.0.0.1])\n\tby mails.dpdk.org (Postfix) with ESMTP id 06E6341171;\n\tTue, 10 Aug 2021 04:48:47 +0200 (CEST)", "from mga09.intel.com (mga09.intel.com [134.134.136.24])\n by mails.dpdk.org (Postfix) with ESMTP id A841741121\n for <dev@dpdk.org>; Tue, 10 Aug 2021 04:48:45 +0200 (CEST)", "from fmsmga008.fm.intel.com ([10.253.24.58])\n by orsmga102.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384;\n 09 Aug 2021 19:48:45 -0700", "from dpdk51.sh.intel.com ([10.67.111.142])\n by fmsmga008.fm.intel.com with ESMTP; 09 Aug 2021 19:48:43 -0700" ], "X-IronPort-AV": [ "E=McAfee;i=\"6200,9189,10070\"; a=\"214808416\"", "E=Sophos;i=\"5.84,309,1620716400\"; d=\"scan'208\";a=\"214808416\"", "E=Sophos;i=\"5.84,309,1620716400\"; d=\"scan'208\";a=\"483823559\"" ], "X-ExtLoop1": "1", "From": "Qi Zhang <qi.z.zhang@intel.com>", "To": "qiming.yang@intel.com", "Cc": "junfeng.guo@intel.com, dev@dpdk.org, Qi Zhang <qi.z.zhang@intel.com>,\n Vignesh Sridhar <vignesh.sridhar@intel.com>", "Date": "Tue, 10 Aug 2021 10:51:17 +0800", "Message-Id": "<20210810025140.1698163-6-qi.z.zhang@intel.com>", "X-Mailer": "git-send-email 2.26.2", "In-Reply-To": "<20210810025140.1698163-1-qi.z.zhang@intel.com>", "References": "<20210810025140.1698163-1-qi.z.zhang@intel.com>", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit", "Subject": "[dpdk-dev] [PATCH 05/28] net/ice/base: add timestamp masks", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "Adding macros for shift and masking of the lower timestamp work in the\nRx flex descriptor. The LSB of the timestamp-low word indicates the\nvalidity of the timestamp while the rest 7 bits contain the timestamp.\n\nSigned-off-by: Vignesh Sridhar <vignesh.sridhar@intel.com>\nSigned-off-by: Qi Zhang <qi.z.zhang@intel.com>\n---\n drivers/net/ice/base/ice_lan_tx_rx.h | 8 ++++++++\n 1 file changed, 8 insertions(+)", "diff": "diff --git a/drivers/net/ice/base/ice_lan_tx_rx.h b/drivers/net/ice/base/ice_lan_tx_rx.h\nindex 696c6a30ae..4255e9963e 100644\n--- a/drivers/net/ice/base/ice_lan_tx_rx.h\n+++ b/drivers/net/ice/base/ice_lan_tx_rx.h\n@@ -879,6 +879,14 @@ enum ice_rx_flex_desc_exstat_bits {\n \tICE_RX_FLEX_DESC_EXSTAT_OVERSIZE_S = 3,\n };\n \n+/* For ice_32b_rx_flex_desc.ts_low:\n+ * [0]: Timestamp-low validity bit\n+ * [1:7]: Timestamp-low value\n+ */\n+#define ICE_RX_FLEX_DESC_TS_L_VALID_S\t0x01\n+#define ICE_RX_FLEX_DESC_TS_L_VALID_M\tICE_RX_FLEX_DESC_TS_L_VALID_S\n+#define ICE_RX_FLEX_DESC_TS_L_M\t\t0xFE\n+\n #define ICE_RXQ_CTX_SIZE_DWORDS\t\t8\n #define ICE_RXQ_CTX_SZ\t\t\t(ICE_RXQ_CTX_SIZE_DWORDS * sizeof(u32))\n #define ICE_TX_CMPLTNQ_CTX_SIZE_DWORDS\t22\n", "prefixes": [ "05/28" ] }