get:
Show a patch.

patch:
Update a patch.

put:
Update a patch.

GET /api/patches/96762/?format=api
HTTP 200 OK
Allow: GET, PUT, PATCH, HEAD, OPTIONS
Content-Type: application/json
Vary: Accept

{
    "id": 96762,
    "url": "http://patchwork.dpdk.org/api/patches/96762/?format=api",
    "web_url": "http://patchwork.dpdk.org/project/dpdk/patch/20210810025140.1698163-24-qi.z.zhang@intel.com/",
    "project": {
        "id": 1,
        "url": "http://patchwork.dpdk.org/api/projects/1/?format=api",
        "name": "DPDK",
        "link_name": "dpdk",
        "list_id": "dev.dpdk.org",
        "list_email": "dev@dpdk.org",
        "web_url": "http://core.dpdk.org",
        "scm_url": "git://dpdk.org/dpdk",
        "webscm_url": "http://git.dpdk.org/dpdk",
        "list_archive_url": "https://inbox.dpdk.org/dev",
        "list_archive_url_format": "https://inbox.dpdk.org/dev/{}",
        "commit_url_format": ""
    },
    "msgid": "<20210810025140.1698163-24-qi.z.zhang@intel.com>",
    "list_archive_url": "https://inbox.dpdk.org/dev/20210810025140.1698163-24-qi.z.zhang@intel.com",
    "date": "2021-08-10T02:51:35",
    "name": "[23/28] net/ice/base: add RSS support for IPv4/L4 checksum",
    "commit_ref": null,
    "pull_url": null,
    "state": "accepted",
    "archived": true,
    "hash": "bb8cecdece4efe5f2c13b606d110e13b331917e6",
    "submitter": {
        "id": 504,
        "url": "http://patchwork.dpdk.org/api/people/504/?format=api",
        "name": "Qi Zhang",
        "email": "qi.z.zhang@intel.com"
    },
    "delegate": {
        "id": 1540,
        "url": "http://patchwork.dpdk.org/api/users/1540/?format=api",
        "username": "qzhan15",
        "first_name": "Qi",
        "last_name": "Zhang",
        "email": "qi.z.zhang@intel.com"
    },
    "mbox": "http://patchwork.dpdk.org/project/dpdk/patch/20210810025140.1698163-24-qi.z.zhang@intel.com/mbox/",
    "series": [
        {
            "id": 18242,
            "url": "http://patchwork.dpdk.org/api/series/18242/?format=api",
            "web_url": "http://patchwork.dpdk.org/project/dpdk/list/?series=18242",
            "date": "2021-08-10T02:51:12",
            "name": "ice: base code update",
            "version": 1,
            "mbox": "http://patchwork.dpdk.org/series/18242/mbox/"
        }
    ],
    "comments": "http://patchwork.dpdk.org/api/patches/96762/comments/",
    "check": "success",
    "checks": "http://patchwork.dpdk.org/api/patches/96762/checks/",
    "tags": {},
    "related": [],
    "headers": {
        "Return-Path": "<dev-bounces@dpdk.org>",
        "X-Original-To": "patchwork@inbox.dpdk.org",
        "Delivered-To": "patchwork@inbox.dpdk.org",
        "Received": [
            "from mails.dpdk.org (mails.dpdk.org [217.70.189.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id BCA11A0C54;\n\tTue, 10 Aug 2021 04:50:58 +0200 (CEST)",
            "from [217.70.189.124] (localhost [127.0.0.1])\n\tby mails.dpdk.org (Postfix) with ESMTP id 09E3A411EF;\n\tTue, 10 Aug 2021 04:49:33 +0200 (CEST)",
            "from mga02.intel.com (mga02.intel.com [134.134.136.20])\n by mails.dpdk.org (Postfix) with ESMTP id 237E4411A3\n for <dev@dpdk.org>; Tue, 10 Aug 2021 04:49:30 +0200 (CEST)",
            "from fmsmga008.fm.intel.com ([10.253.24.58])\n by orsmga101.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384;\n 09 Aug 2021 19:49:30 -0700",
            "from dpdk51.sh.intel.com ([10.67.111.142])\n by fmsmga008.fm.intel.com with ESMTP; 09 Aug 2021 19:49:28 -0700"
        ],
        "X-IronPort-AV": [
            "E=McAfee;i=\"6200,9189,10070\"; a=\"202002210\"",
            "E=Sophos;i=\"5.84,309,1620716400\"; d=\"scan'208\";a=\"202002210\"",
            "E=Sophos;i=\"5.84,309,1620716400\"; d=\"scan'208\";a=\"483823791\""
        ],
        "X-ExtLoop1": "1",
        "From": "Qi Zhang <qi.z.zhang@intel.com>",
        "To": "qiming.yang@intel.com",
        "Cc": "junfeng.guo@intel.com, dev@dpdk.org, Qi Zhang <qi.z.zhang@intel.com>,\n Alvin Zhang <alvinx.zhang@intel.com>",
        "Date": "Tue, 10 Aug 2021 10:51:35 +0800",
        "Message-Id": "<20210810025140.1698163-24-qi.z.zhang@intel.com>",
        "X-Mailer": "git-send-email 2.26.2",
        "In-Reply-To": "<20210810025140.1698163-1-qi.z.zhang@intel.com>",
        "References": "<20210810025140.1698163-1-qi.z.zhang@intel.com>",
        "MIME-Version": "1.0",
        "Content-Transfer-Encoding": "8bit",
        "Subject": "[dpdk-dev] [PATCH 23/28] net/ice/base: add RSS support for IPv4/L4\n checksum",
        "X-BeenThere": "dev@dpdk.org",
        "X-Mailman-Version": "2.1.29",
        "Precedence": "list",
        "List-Id": "DPDK patches and discussions <dev.dpdk.org>",
        "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>",
        "List-Archive": "<http://mails.dpdk.org/archives/dev/>",
        "List-Post": "<mailto:dev@dpdk.org>",
        "List-Help": "<mailto:dev-request@dpdk.org?subject=help>",
        "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>",
        "Errors-To": "dev-bounces@dpdk.org",
        "Sender": "\"dev\" <dev-bounces@dpdk.org>"
    },
    "content": "The IPv4/TCP/UDP/SCTP header checksum fields are defined in this\npatch and can be used as RSS input sets.\n\nSigned-off-by: Alvin Zhang <alvinx.zhang@intel.com>\nSigned-off-by: Qi Zhang <qi.z.zhang@intel.com>\n---\n drivers/net/ice/base/ice_flow.c | 17 +++++++++++++++++\n drivers/net/ice/base/ice_flow.h |  4 ++++\n 2 files changed, 21 insertions(+)",
    "diff": "diff --git a/drivers/net/ice/base/ice_flow.c b/drivers/net/ice/base/ice_flow.c\nindex 0b7d087c83..470548331b 100644\n--- a/drivers/net/ice/base/ice_flow.c\n+++ b/drivers/net/ice/base/ice_flow.c\n@@ -15,6 +15,10 @@\n #define ICE_FLOW_FLD_SZ_IPV6_PRE64_ADDR\t8\n #define ICE_FLOW_FLD_SZ_IPV4_ID\t\t2\n #define ICE_FLOW_FLD_SZ_IPV6_ID\t\t4\n+#define ICE_FLOW_FLD_SZ_IP_CHKSUM\t2\n+#define ICE_FLOW_FLD_SZ_TCP_CHKSUM\t2\n+#define ICE_FLOW_FLD_SZ_UDP_CHKSUM\t2\n+#define ICE_FLOW_FLD_SZ_SCTP_CHKSUM\t4\n #define ICE_FLOW_FLD_SZ_IP_DSCP\t\t1\n #define ICE_FLOW_FLD_SZ_IP_TTL\t\t1\n #define ICE_FLOW_FLD_SZ_IP_PROT\t\t1\n@@ -98,6 +102,8 @@ struct ice_flow_field_info ice_flds_info[ICE_FLOW_FIELD_IDX_MAX] = {\n \tICE_FLOW_FLD_INFO(ICE_FLOW_SEG_HDR_IPV6, 8, ICE_FLOW_FLD_SZ_IPV6_ADDR),\n \t/* ICE_FLOW_FIELD_IDX_IPV6_DA */\n \tICE_FLOW_FLD_INFO(ICE_FLOW_SEG_HDR_IPV6, 24, ICE_FLOW_FLD_SZ_IPV6_ADDR),\n+\t/* ICE_FLOW_FIELD_IDX_IPV4_CHKSUM */\n+\tICE_FLOW_FLD_INFO(ICE_FLOW_SEG_HDR_IPV4, 10, ICE_FLOW_FLD_SZ_IP_CHKSUM),\n \t/* ICE_FLOW_FIELD_IDX_IPV4_FRAG */\n \tICE_FLOW_FLD_INFO(ICE_FLOW_SEG_HDR_IPV_FRAG, 4,\n \t\t\t  ICE_FLOW_FLD_SZ_IPV4_ID),\n@@ -137,6 +143,13 @@ struct ice_flow_field_info ice_flds_info[ICE_FLOW_FIELD_IDX_MAX] = {\n \tICE_FLOW_FLD_INFO(ICE_FLOW_SEG_HDR_SCTP, 2, ICE_FLOW_FLD_SZ_PORT),\n \t/* ICE_FLOW_FIELD_IDX_TCP_FLAGS */\n \tICE_FLOW_FLD_INFO(ICE_FLOW_SEG_HDR_TCP, 13, ICE_FLOW_FLD_SZ_TCP_FLAGS),\n+\t/* ICE_FLOW_FIELD_IDX_TCP_CHKSUM */\n+\tICE_FLOW_FLD_INFO(ICE_FLOW_SEG_HDR_TCP, 16, ICE_FLOW_FLD_SZ_TCP_CHKSUM),\n+\t/* ICE_FLOW_FIELD_IDX_UDP_CHKSUM */\n+\tICE_FLOW_FLD_INFO(ICE_FLOW_SEG_HDR_UDP, 6, ICE_FLOW_FLD_SZ_UDP_CHKSUM),\n+\t/* ICE_FLOW_FIELD_IDX_SCTP_CHKSUM */\n+\tICE_FLOW_FLD_INFO(ICE_FLOW_SEG_HDR_SCTP, 8,\n+\t\t\t  ICE_FLOW_FLD_SZ_SCTP_CHKSUM),\n \t/* ARP */\n \t/* ICE_FLOW_FIELD_IDX_ARP_SIP */\n \tICE_FLOW_FLD_INFO(ICE_FLOW_SEG_HDR_ARP, 14, ICE_FLOW_FLD_SZ_IPV4_ADDR),\n@@ -1410,6 +1423,7 @@ ice_flow_xtract_fld(struct ice_hw *hw, struct ice_flow_prof_params *params,\n \t\tbreak;\n \tcase ICE_FLOW_FIELD_IDX_IPV4_SA:\n \tcase ICE_FLOW_FIELD_IDX_IPV4_DA:\n+\tcase ICE_FLOW_FIELD_IDX_IPV4_CHKSUM:\n \t\tprot_id = seg == 0 ? ICE_PROT_IPV4_OF_OR_S : ICE_PROT_IPV4_IL;\n \t\tif (params->prof->segs[0].hdrs & ICE_FLOW_SEG_HDR_GRE &&\n \t\t    params->prof->segs[1].hdrs & ICE_FLOW_SEG_HDR_GTPU &&\n@@ -1439,14 +1453,17 @@ ice_flow_xtract_fld(struct ice_hw *hw, struct ice_flow_prof_params *params,\n \tcase ICE_FLOW_FIELD_IDX_TCP_SRC_PORT:\n \tcase ICE_FLOW_FIELD_IDX_TCP_DST_PORT:\n \tcase ICE_FLOW_FIELD_IDX_TCP_FLAGS:\n+\tcase ICE_FLOW_FIELD_IDX_TCP_CHKSUM:\n \t\tprot_id = ICE_PROT_TCP_IL;\n \t\tbreak;\n \tcase ICE_FLOW_FIELD_IDX_UDP_SRC_PORT:\n \tcase ICE_FLOW_FIELD_IDX_UDP_DST_PORT:\n+\tcase ICE_FLOW_FIELD_IDX_UDP_CHKSUM:\n \t\tprot_id = ICE_PROT_UDP_IL_OR_S;\n \t\tbreak;\n \tcase ICE_FLOW_FIELD_IDX_SCTP_SRC_PORT:\n \tcase ICE_FLOW_FIELD_IDX_SCTP_DST_PORT:\n+\tcase ICE_FLOW_FIELD_IDX_SCTP_CHKSUM:\n \t\tprot_id = ICE_PROT_SCTP_IL;\n \t\tbreak;\n \tcase ICE_FLOW_FIELD_IDX_VXLAN_VNI:\ndiff --git a/drivers/net/ice/base/ice_flow.h b/drivers/net/ice/base/ice_flow.h\nindex 39408c5634..92beb75db8 100644\n--- a/drivers/net/ice/base/ice_flow.h\n+++ b/drivers/net/ice/base/ice_flow.h\n@@ -228,6 +228,7 @@ enum ice_flow_field {\n \tICE_FLOW_FIELD_IDX_IPV4_DA,\n \tICE_FLOW_FIELD_IDX_IPV6_SA,\n \tICE_FLOW_FIELD_IDX_IPV6_DA,\n+\tICE_FLOW_FIELD_IDX_IPV4_CHKSUM,\n \tICE_FLOW_FIELD_IDX_IPV4_ID,\n \tICE_FLOW_FIELD_IDX_IPV6_ID,\n \tICE_FLOW_FIELD_IDX_IPV6_PRE32_SA,\n@@ -244,6 +245,9 @@ enum ice_flow_field {\n \tICE_FLOW_FIELD_IDX_SCTP_SRC_PORT,\n \tICE_FLOW_FIELD_IDX_SCTP_DST_PORT,\n \tICE_FLOW_FIELD_IDX_TCP_FLAGS,\n+\tICE_FLOW_FIELD_IDX_TCP_CHKSUM,\n+\tICE_FLOW_FIELD_IDX_UDP_CHKSUM,\n+\tICE_FLOW_FIELD_IDX_SCTP_CHKSUM,\n \t/* ARP */\n \tICE_FLOW_FIELD_IDX_ARP_SIP,\n \tICE_FLOW_FIELD_IDX_ARP_DIP,\n",
    "prefixes": [
        "23/28"
    ]
}