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GET /api/patches/96769/?format=api
{ "id": 96769, "url": "http://patchwork.dpdk.org/api/patches/96769/?format=api", "web_url": "http://patchwork.dpdk.org/project/dpdk/patch/20210810060719.18553-2-ndabilpuram@marvell.com/", "project": { "id": 1, "url": "http://patchwork.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20210810060719.18553-2-ndabilpuram@marvell.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20210810060719.18553-2-ndabilpuram@marvell.com", "date": "2021-08-10T06:07:17", "name": "[v3,1/3] security: enforce semantics for Tx inline processing", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": true, "hash": "40cb85806fcfabb5b93ce79548d864cac7227189", "submitter": { "id": 1202, "url": "http://patchwork.dpdk.org/api/people/1202/?format=api", "name": "Nithin Dabilpuram", "email": "ndabilpuram@marvell.com" }, "delegate": { "id": 6690, "url": "http://patchwork.dpdk.org/api/users/6690/?format=api", "username": "akhil", "first_name": "akhil", "last_name": "goyal", "email": "gakhil@marvell.com" }, "mbox": "http://patchwork.dpdk.org/project/dpdk/patch/20210810060719.18553-2-ndabilpuram@marvell.com/mbox/", "series": [ { "id": 18243, "url": "http://patchwork.dpdk.org/api/series/18243/?format=api", "web_url": "http://patchwork.dpdk.org/project/dpdk/list/?series=18243", "date": "2021-08-10T06:07:16", "name": "security: Improve inline fast path routines", "version": 3, "mbox": "http://patchwork.dpdk.org/series/18243/mbox/" } ], "comments": "http://patchwork.dpdk.org/api/patches/96769/comments/", "check": "success", "checks": "http://patchwork.dpdk.org/api/patches/96769/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from mails.dpdk.org (mails.dpdk.org [217.70.189.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id 11C91A0C53;\n\tTue, 10 Aug 2021 08:07:41 +0200 (CEST)", "from [217.70.189.124] (localhost [127.0.0.1])\n\tby mails.dpdk.org (Postfix) with ESMTP id 1AD7A411AA;\n\tTue, 10 Aug 2021 08:07:38 +0200 (CEST)", "from mx0b-0016f401.pphosted.com (mx0b-0016f401.pphosted.com\n [67.231.156.173])\n by mails.dpdk.org (Postfix) with ESMTP id 3E6DF411A8\n for <dev@dpdk.org>; Tue, 10 Aug 2021 08:07:36 +0200 (CEST)", "from pps.filterd (m0045851.ppops.net [127.0.0.1])\n by mx0b-0016f401.pphosted.com (8.16.0.43/8.16.0.43) with SMTP id\n 17A62DuO002160; Mon, 9 Aug 2021 23:07:35 -0700", "from dc5-exch01.marvell.com ([199.233.59.181])\n by mx0b-0016f401.pphosted.com with ESMTP id 3aaxfkkpkc-2\n (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT);\n Mon, 09 Aug 2021 23:07:35 -0700", "from DC5-EXCH02.marvell.com (10.69.176.39) by DC5-EXCH01.marvell.com\n (10.69.176.38) with Microsoft SMTP Server (TLS) id 15.0.1497.18;\n Mon, 9 Aug 2021 23:07:33 -0700", "from maili.marvell.com (10.69.176.80) by DC5-EXCH02.marvell.com\n (10.69.176.39) with Microsoft SMTP Server id 15.0.1497.18 via Frontend\n Transport; Mon, 9 Aug 2021 23:07:33 -0700", "from hyd1588t430.marvell.com (unknown [10.29.52.204])\n by maili.marvell.com (Postfix) with ESMTP id 946F43F70A8;\n Mon, 9 Aug 2021 23:07:29 -0700 (PDT)" ], "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com;\n h=from : to : cc :\n subject : date : message-id : in-reply-to : references : mime-version :\n content-type; s=pfpt0220; bh=NeUilDkyMx/R8RSH9AahgE/cHqBfLMwdlu8VgAPi2j0=;\n b=kOnHSb3ScMgLMB3TK0LsRFf1QjplGquJSQuhUdTk7bqIx6KgMLvfFhJaIYZu8sn/hDWl\n s9Xct820n0OV3WlsWlc+gHC/G5nqbqlOtqifP0XoiqXPwRIm1LiFx74gRxs0g/twqrMh\n O08ibqoXHCT6mym1Xjd0ubYss0qJ7T2p20JuUt1dU8x9wOuJsidAHssQ8eKuoO2dPVVS\n CLF0u+/Nc2/x3wXqS794xLMW1+5L5CNDr2hvVV5mGiw7DnTlSisHTkwybqBHiXR64I+E\n TnZR23vL99LbWuUoWAZwUx0biI3XV8etjAxu9O8ifjVXmmcOdTyCokAkT8ABgfKoDJSc AA==", "From": "Nithin Dabilpuram <ndabilpuram@marvell.com>", "To": "<dev@dpdk.org>", "CC": "<jerinj@marvell.com>, <gakhil@marvell.com>, <hemant.agrawal@nxp.com>,\n <thomas@monjalon.net>, <g.singh@nxp.com>, <ferruh.yigit@intel.com>,\n <roy.fan.zhang@intel.com>, <olivier.matz@6wind.com>,\n <declan.doherty@intel.com>, <radu.nicolau@intel.com>,\n <jiawenwu@trustnetic.com>, <konstantin.ananyev@intel.com>,\n Nithin Dabilpuram <ndabilpuram@marvell.com>", "Date": "Tue, 10 Aug 2021 11:37:17 +0530", "Message-ID": "<20210810060719.18553-2-ndabilpuram@marvell.com>", "X-Mailer": "git-send-email 2.8.4", "In-Reply-To": "<20210810060719.18553-1-ndabilpuram@marvell.com>", "References": "<20210624102848.3878788-1-gakhil@marvell.com>\n <20210810060719.18553-1-ndabilpuram@marvell.com>", "MIME-Version": "1.0", "Content-Type": "text/plain", "X-Proofpoint-ORIG-GUID": "i3kRpbO8kkL-taWHWqSba1PFnxxRWXdU", "X-Proofpoint-GUID": "i3kRpbO8kkL-taWHWqSba1PFnxxRWXdU", "X-Proofpoint-Virus-Version": "vendor=fsecure engine=2.50.10434:6.0.391, 18.0.790\n definitions=2021-08-10_02:2021-08-06,\n 2021-08-10 signatures=0", "Subject": "[dpdk-dev] [PATCH v3 1/3] security: enforce semantics for Tx inline\n processing", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "Not all net PMD's/HW can parse packet and identify L2 header and\nL3 header locations on Tx. This is inline with other Tx offloads\nrequirements such as L3 checksum, L4 checksum offload, etc,\nwhere mbuf.l2_len, mbuf.l3_len etc, needs to be set for HW to be\nable to generate checksum. Since Inline IPSec is also such a Tx\noffload, some PMD's at least need mbuf.l2_len to be valid to\nfind L3 header and perform Outbound IPSec processing.\n\nHence, this patch updates documentation to enforce setting\nmbuf.l2_len while setting PKT_TX_SEC_OFFLOAD in mbuf.ol_flags\nfor Inline IPSec Crypto / Protocol offload processing to\nwork on Tx.\n\nSigned-off-by: Nithin Dabilpuram <ndabilpuram@marvell.com>\n---\n doc/guides/nics/features.rst | 2 ++\n lib/mbuf/rte_mbuf_core.h | 2 ++\n 2 files changed, 4 insertions(+)", "diff": "diff --git a/doc/guides/nics/features.rst b/doc/guides/nics/features.rst\nindex a96e12d..4fce8cd 100644\n--- a/doc/guides/nics/features.rst\n+++ b/doc/guides/nics/features.rst\n@@ -430,6 +430,7 @@ of protocol operations. See Security library and PMD documentation for more deta\n \n * **[uses] rte_eth_rxconf,rte_eth_rxmode**: ``offloads:DEV_RX_OFFLOAD_SECURITY``,\n * **[uses] rte_eth_txconf,rte_eth_txmode**: ``offloads:DEV_TX_OFFLOAD_SECURITY``.\n+* **[uses] mbuf**: ``mbuf.l2_len``.\n * **[implements] rte_security_ops**: ``session_create``, ``session_update``,\n ``session_stats_get``, ``session_destroy``, ``set_pkt_metadata``, ``capabilities_get``.\n * **[provides] rte_eth_dev_info**: ``rx_offload_capa,rx_queue_offload_capa:DEV_RX_OFFLOAD_SECURITY``,\n@@ -451,6 +452,7 @@ protocol operations. See security library and PMD documentation for more details\n \n * **[uses] rte_eth_rxconf,rte_eth_rxmode**: ``offloads:DEV_RX_OFFLOAD_SECURITY``,\n * **[uses] rte_eth_txconf,rte_eth_txmode**: ``offloads:DEV_TX_OFFLOAD_SECURITY``.\n+* **[uses] mbuf**: ``mbuf.l2_len``.\n * **[implements] rte_security_ops**: ``session_create``, ``session_update``,\n ``session_stats_get``, ``session_destroy``, ``set_pkt_metadata``, ``get_userdata``,\n ``capabilities_get``.\ndiff --git a/lib/mbuf/rte_mbuf_core.h b/lib/mbuf/rte_mbuf_core.h\nindex bb38d7f..9d8e3dd 100644\n--- a/lib/mbuf/rte_mbuf_core.h\n+++ b/lib/mbuf/rte_mbuf_core.h\n@@ -228,6 +228,8 @@ extern \"C\" {\n \n /**\n * Request security offload processing on the TX packet.\n+ * To use Tx security offload, the user needs to fill l2_len in mbuf\n+ * indicating L2 header size and where L3 header starts.\n */\n #define PKT_TX_SEC_OFFLOAD\t(1ULL << 43)\n \n", "prefixes": [ "v3", "1/3" ] }