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GET /api/patches/96914/?format=api
HTTP 200 OK
Allow: GET, PUT, PATCH, HEAD, OPTIONS
Content-Type: application/json
Vary: Accept

{
    "id": 96914,
    "url": "http://patchwork.dpdk.org/api/patches/96914/?format=api",
    "web_url": "http://patchwork.dpdk.org/project/dpdk/patch/1628873485-30596-5-git-send-email-nicolas.chautru@intel.com/",
    "project": {
        "id": 1,
        "url": "http://patchwork.dpdk.org/api/projects/1/?format=api",
        "name": "DPDK",
        "link_name": "dpdk",
        "list_id": "dev.dpdk.org",
        "list_email": "dev@dpdk.org",
        "web_url": "http://core.dpdk.org",
        "scm_url": "git://dpdk.org/dpdk",
        "webscm_url": "http://git.dpdk.org/dpdk",
        "list_archive_url": "https://inbox.dpdk.org/dev",
        "list_archive_url_format": "https://inbox.dpdk.org/dev/{}",
        "commit_url_format": ""
    },
    "msgid": "<1628873485-30596-5-git-send-email-nicolas.chautru@intel.com>",
    "list_archive_url": "https://inbox.dpdk.org/dev/1628873485-30596-5-git-send-email-nicolas.chautru@intel.com",
    "date": "2021-08-13T16:51:23",
    "name": "[v1,4/6] baseband/acc100: add support for 4G CRC drop",
    "commit_ref": null,
    "pull_url": null,
    "state": "superseded",
    "archived": true,
    "hash": "676a56502fb43d5f28061994d97a223533ffcff1",
    "submitter": {
        "id": 1314,
        "url": "http://patchwork.dpdk.org/api/people/1314/?format=api",
        "name": "Chautru, Nicolas",
        "email": "nicolas.chautru@intel.com"
    },
    "delegate": {
        "id": 6690,
        "url": "http://patchwork.dpdk.org/api/users/6690/?format=api",
        "username": "akhil",
        "first_name": "akhil",
        "last_name": "goyal",
        "email": "gakhil@marvell.com"
    },
    "mbox": "http://patchwork.dpdk.org/project/dpdk/patch/1628873485-30596-5-git-send-email-nicolas.chautru@intel.com/mbox/",
    "series": [
        {
            "id": 18283,
            "url": "http://patchwork.dpdk.org/api/series/18283/?format=api",
            "web_url": "http://patchwork.dpdk.org/project/dpdk/list/?series=18283",
            "date": "2021-08-13T16:51:19",
            "name": "bbdev update related to CRC usage",
            "version": 1,
            "mbox": "http://patchwork.dpdk.org/series/18283/mbox/"
        }
    ],
    "comments": "http://patchwork.dpdk.org/api/patches/96914/comments/",
    "check": "warning",
    "checks": "http://patchwork.dpdk.org/api/patches/96914/checks/",
    "tags": {},
    "related": [],
    "headers": {
        "Return-Path": "<dev-bounces@dpdk.org>",
        "X-Original-To": "patchwork@inbox.dpdk.org",
        "Delivered-To": "patchwork@inbox.dpdk.org",
        "Received": [
            "from mails.dpdk.org (mails.dpdk.org [217.70.189.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id ABD1BA0C45;\n\tFri, 13 Aug 2021 18:51:59 +0200 (CEST)",
            "from [217.70.189.124] (localhost [127.0.0.1])\n\tby mails.dpdk.org (Postfix) with ESMTP id 5EC8741285;\n\tFri, 13 Aug 2021 18:51:40 +0200 (CEST)",
            "from mga14.intel.com (mga14.intel.com [192.55.52.115])\n by mails.dpdk.org (Postfix) with ESMTP id 466BB41279\n for <dev@dpdk.org>; Fri, 13 Aug 2021 18:51:38 +0200 (CEST)",
            "from fmsmga008.fm.intel.com ([10.253.24.58])\n by fmsmga103.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384;\n 13 Aug 2021 09:51:37 -0700",
            "from unknown (HELO icx-npg-scs1-cp1.localdomain) ([10.233.180.245])\n by fmsmga008.fm.intel.com with ESMTP; 13 Aug 2021 09:51:36 -0700"
        ],
        "X-IronPort-AV": [
            "E=McAfee;i=\"6200,9189,10075\"; a=\"215320190\"",
            "E=Sophos;i=\"5.84,319,1620716400\"; d=\"scan'208\";a=\"215320190\"",
            "E=Sophos;i=\"5.84,319,1620716400\"; d=\"scan'208\";a=\"486025110\""
        ],
        "X-ExtLoop1": "1",
        "From": "Nicolas Chautru <nicolas.chautru@intel.com>",
        "To": "dev@dpdk.org,\n\tgakhil@marvell.com",
        "Cc": "thomas@monjalon.net, trix@redhat.com, hemant.agrawal@nxp.com,\n mingshan.zhang@intel.com, Nicolas Chautru <nicolas.chautru@intel.com>",
        "Date": "Fri, 13 Aug 2021 09:51:23 -0700",
        "Message-Id": "<1628873485-30596-5-git-send-email-nicolas.chautru@intel.com>",
        "X-Mailer": "git-send-email 1.8.3.1",
        "In-Reply-To": "<1628873485-30596-1-git-send-email-nicolas.chautru@intel.com>",
        "References": "<1628873485-30596-1-git-send-email-nicolas.chautru@intel.com>",
        "Subject": "[dpdk-dev] [PATCH v1 4/6] baseband/acc100: add support for 4G CRC\n drop",
        "X-BeenThere": "dev@dpdk.org",
        "X-Mailman-Version": "2.1.29",
        "Precedence": "list",
        "List-Id": "DPDK patches and discussions <dev.dpdk.org>",
        "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>",
        "List-Archive": "<http://mails.dpdk.org/archives/dev/>",
        "List-Post": "<mailto:dev@dpdk.org>",
        "List-Help": "<mailto:dev-request@dpdk.org?subject=help>",
        "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>",
        "Errors-To": "dev-bounces@dpdk.org",
        "Sender": "\"dev\" <dev-bounces@dpdk.org>"
    },
    "content": "This implements in PMD the option to drop the CB CRC\nafter 4G decoding to help transport block concatenation.\n\nSigned-off-by: Nicolas Chautru <nicolas.chautru@intel.com>\n---\n doc/guides/bbdevs/acc100.rst             |  1 +\n doc/guides/rel_notes/release_21_11.rst   |  4 ++++\n drivers/baseband/acc100/rte_acc100_pmd.c | 12 +++++++++---\n 3 files changed, 14 insertions(+), 3 deletions(-)",
    "diff": "diff --git a/doc/guides/bbdevs/acc100.rst b/doc/guides/bbdevs/acc100.rst\nindex ff0fa4b..9fff6ab 100644\n--- a/doc/guides/bbdevs/acc100.rst\n+++ b/doc/guides/bbdevs/acc100.rst\n@@ -58,6 +58,7 @@ ACC100 5G/4G FEC PMD supports the following BBDEV capabilities:\n    - ``RTE_BBDEV_TURBO_NEG_LLR_1_BIT_IN`` :  set if negative LLR encoder i/p is supported\n    - ``RTE_BBDEV_TURBO_POS_LLR_1_BIT_IN`` :  set if positive LLR encoder i/p is supported\n    - ``RTE_BBDEV_TURBO_DEC_TB_CRC_24B_KEEP`` :  keep CRC24B bits appended while decoding\n+   - ``RTE_BBDEV_TURBO_DEC_CRC_24B_DROP`` : option to drop the code block CRC after decoding\n    - ``RTE_BBDEV_TURBO_EARLY_TERMINATION`` :  set early termination feature\n    - ``RTE_BBDEV_TURBO_DEC_SCATTER_GATHER`` :  supports scatter-gather for input/output data\n    - ``RTE_BBDEV_TURBO_HALF_ITERATION_EVEN`` :  set half iteration granularity\ndiff --git a/doc/guides/rel_notes/release_21_11.rst b/doc/guides/rel_notes/release_21_11.rst\nindex 8ca59b7..f7843bc 100644\n--- a/doc/guides/rel_notes/release_21_11.rst\n+++ b/doc/guides/rel_notes/release_21_11.rst\n@@ -59,6 +59,10 @@ New Features\n \n   Added support for more comprehensive CRC options.\n \n+* **Updated the ACC100 bbdev PMD.**\n+\n+  Added support for more comprehensive CRC options.\n+\n Removed Items\n -------------\n \ndiff --git a/drivers/baseband/acc100/rte_acc100_pmd.c b/drivers/baseband/acc100/rte_acc100_pmd.c\nindex 68ba523..891be81 100644\n--- a/drivers/baseband/acc100/rte_acc100_pmd.c\n+++ b/drivers/baseband/acc100/rte_acc100_pmd.c\n@@ -980,6 +980,7 @@\n \t\t\t\t\tRTE_BBDEV_TURBO_NEG_LLR_1_BIT_IN |\n \t\t\t\t\tRTE_BBDEV_TURBO_MAP_DEC |\n \t\t\t\t\tRTE_BBDEV_TURBO_DEC_TB_CRC_24B_KEEP |\n+\t\t\t\t\tRTE_BBDEV_TURBO_DEC_CRC_24B_DROP |\n \t\t\t\t\tRTE_BBDEV_TURBO_DEC_SCATTER_GATHER,\n \t\t\t\t.max_llr_modulus = INT8_MAX,\n \t\t\t\t.num_buffers_src =\n@@ -1708,8 +1709,12 @@\n \t}\n \n \tif ((op->turbo_dec.code_block_mode == RTE_BBDEV_TRANSPORT_BLOCK)\n-\t\t&& !check_bit(op->turbo_dec.op_flags,\n-\t\tRTE_BBDEV_TURBO_DEC_TB_CRC_24B_KEEP))\n+\t\t\t&& !check_bit(op->turbo_dec.op_flags,\n+\t\t\tRTE_BBDEV_TURBO_DEC_TB_CRC_24B_KEEP))\n+\t\tcrc24_overlap = 24;\n+\tif ((op->turbo_dec.code_block_mode == RTE_BBDEV_CODE_BLOCK)\n+\t\t\t&& check_bit(op->turbo_dec.op_flags,\n+\t\t\tRTE_BBDEV_TURBO_DEC_CRC_24B_DROP))\n \t\tcrc24_overlap = 24;\n \n \t/* Calculates circular buffer size.\n@@ -1744,7 +1749,8 @@\n \n \tnext_triplet = acc100_dma_fill_blk_type_out(\n \t\t\tdesc, h_output, *h_out_offset,\n-\t\t\tk >> 3, next_triplet, ACC100_DMA_BLKID_OUT_HARD);\n+\t\t\t(k - crc24_overlap)  >> 3, next_triplet,\n+\t\t\tACC100_DMA_BLKID_OUT_HARD);\n \tif (unlikely(next_triplet < 0)) {\n \t\trte_bbdev_log(ERR,\n \t\t\t\t\"Mismatch between data to process and mbuf data length in bbdev_op: %p\",\n",
    "prefixes": [
        "v1",
        "4/6"
    ]
}