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GET /api/patches/97786/?format=api
{ "id": 97786, "url": "http://patchwork.dpdk.org/api/patches/97786/?format=api", "web_url": "http://patchwork.dpdk.org/project/dpdk/patch/61c10bd36641c9d241c8ce2ab7b2544437b714c5.1630584303.git.sthotton@marvell.com/", "project": { "id": 1, "url": "http://patchwork.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<61c10bd36641c9d241c8ce2ab7b2544437b714c5.1630584303.git.sthotton@marvell.com>", "list_archive_url": "https://inbox.dpdk.org/dev/61c10bd36641c9d241c8ce2ab7b2544437b714c5.1630584303.git.sthotton@marvell.com", "date": "2021-09-02T12:17:18", "name": "[v2,2/8] event/cnxk: add macro to set eventdev ops", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": true, "hash": "a9a1953baae1e8560d2db578e8f262df29fe3aad", "submitter": { "id": 2049, "url": "http://patchwork.dpdk.org/api/people/2049/?format=api", "name": "Shijith Thotton", "email": "sthotton@marvell.com" }, "delegate": { "id": 6690, "url": "http://patchwork.dpdk.org/api/users/6690/?format=api", "username": "akhil", "first_name": "akhil", "last_name": "goyal", "email": "gakhil@marvell.com" }, "mbox": "http://patchwork.dpdk.org/project/dpdk/patch/61c10bd36641c9d241c8ce2ab7b2544437b714c5.1630584303.git.sthotton@marvell.com/mbox/", "series": [ { "id": 18627, "url": "http://patchwork.dpdk.org/api/series/18627/?format=api", "web_url": "http://patchwork.dpdk.org/project/dpdk/list/?series=18627", "date": "2021-09-02T12:17:16", "name": "Crypto adapter support for Marvell CNXK driver", "version": 2, "mbox": "http://patchwork.dpdk.org/series/18627/mbox/" } ], "comments": "http://patchwork.dpdk.org/api/patches/97786/comments/", "check": "warning", "checks": "http://patchwork.dpdk.org/api/patches/97786/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from mails.dpdk.org (mails.dpdk.org [217.70.189.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id DD2F0A0C47;\n\tThu, 2 Sep 2021 14:20:19 +0200 (CEST)", "from [217.70.189.124] (localhost [127.0.0.1])\n\tby mails.dpdk.org (Postfix) with ESMTP id CB7C840140;\n\tThu, 2 Sep 2021 14:20:19 +0200 (CEST)", "from mx0b-0016f401.pphosted.com (mx0a-0016f401.pphosted.com\n [67.231.148.174])\n by mails.dpdk.org (Postfix) with ESMTP id 0E15440041\n for <dev@dpdk.org>; Thu, 2 Sep 2021 14:20:18 +0200 (CEST)", "from pps.filterd (m0045849.ppops.net [127.0.0.1])\n by mx0a-0016f401.pphosted.com (8.16.1.2/8.16.1.2) with SMTP id 1825LHAd028361\n for <dev@dpdk.org>; Thu, 2 Sep 2021 05:20:18 -0700", "from dc5-exch01.marvell.com ([199.233.59.181])\n by mx0a-0016f401.pphosted.com with ESMTP id 3atrd2he12-1\n (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT)\n for <dev@dpdk.org>; Thu, 02 Sep 2021 05:20:18 -0700", "from DC5-EXCH02.marvell.com (10.69.176.39) by DC5-EXCH01.marvell.com\n (10.69.176.38) with Microsoft SMTP Server (TLS) id 15.0.1497.18;\n Thu, 2 Sep 2021 05:20:16 -0700", "from maili.marvell.com (10.69.176.80) by DC5-EXCH02.marvell.com\n (10.69.176.39) with Microsoft SMTP Server id 15.0.1497.18 via Frontend\n Transport; Thu, 2 Sep 2021 05:20:16 -0700", "from localhost.localdomain (unknown [10.28.34.29])\n by maili.marvell.com (Postfix) with ESMTP id 009053F705E;\n Thu, 2 Sep 2021 05:20:13 -0700 (PDT)" ], "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com;\n h=from : to : cc :\n subject : date : message-id : in-reply-to : references : mime-version :\n content-transfer-encoding : content-type; s=pfpt0220;\n bh=HAdfCe0zOtIhc81dyRFAf9j5viwq1SgGRaC/A/ehrCI=;\n b=Vw2tG4QfnY+Nsgxu6rxhzHbJGow/KNYcETI1KyodjvEBe7XBkth/LIx+kvT14Zmbm6TY\n NDUZF/3EG0QxmTG4upR/dMhBjGr1lCad86JHwfX9meEuPbD0tK+VNblCUo7E8BQd19qJ\n cNzAs8a84nfsCZGQV8PRUQ4v2+yfJi2EJqpfXZfpBnIr4A4bj3NWLGnFIXkqhUjYblhi\n +N4zyLCHEpFRa8jQl9E1aQvoMyhD9CVVFRjC2GXGtL6GG1ThpqMpe1PN+UJ0O94Fb7lm\n UJbDL47rM0CaQnLQGgB8Qa+KfvWwI/uundpMGhv06ngDC/iAcgTjOIlWCecEBF4agEKu kg==", "From": "Shijith Thotton <sthotton@marvell.com>", "To": "<dev@dpdk.org>", "CC": "Shijith Thotton <sthotton@marvell.com>, <jerinj@marvell.com>,\n <ndabilpuram@marvell.com>, <anoobj@marvell.com>,\n <pbhagavatula@marvell.com>, <gakhil@marvell.com>", "Date": "Thu, 2 Sep 2021 17:47:18 +0530", "Message-ID": "\n <61c10bd36641c9d241c8ce2ab7b2544437b714c5.1630584303.git.sthotton@marvell.com>", "X-Mailer": "git-send-email 2.25.1", "In-Reply-To": "<cover.1630584303.git.sthotton@marvell.com>", "References": "<cover.1630315730.git.sthotton@marvell.com>\n <cover.1630584303.git.sthotton@marvell.com>", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit", "Content-Type": "text/plain", "X-Proofpoint-GUID": "ACYFejdeIhrWFgebSUru4OyfTbL-c7oc", "X-Proofpoint-ORIG-GUID": "ACYFejdeIhrWFgebSUru4OyfTbL-c7oc", "X-Proofpoint-Virus-Version": "vendor=baseguard\n engine=ICAP:2.0.182.1,Aquarius:18.0.790,Hydra:6.0.391,FMLib:17.0.607.475\n definitions=2021-09-02_04,2021-09-02_01,2020-04-07_01", "Subject": "[dpdk-dev] [PATCH v2 2/8] event/cnxk: add macro to set eventdev ops", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "Added a common macro to set eventdev enqueue and dequeue operations to\nreduce code.\n\nSigned-off-by: Shijith Thotton <sthotton@marvell.com>\nSigned-off-by: Nithin Dabilpuram <ndabilpuram@marvell.com>\n---\n drivers/event/cnxk/cn10k_eventdev.c | 139 +++++---------\n drivers/event/cnxk/cn9k_eventdev.c | 273 +++++++---------------------\n 2 files changed, 114 insertions(+), 298 deletions(-)", "diff": "diff --git a/drivers/event/cnxk/cn10k_eventdev.c b/drivers/event/cnxk/cn10k_eventdev.c\nindex 6f37c5bd23..2533baae63 100644\n--- a/drivers/event/cnxk/cn10k_eventdev.c\n+++ b/drivers/event/cnxk/cn10k_eventdev.c\n@@ -6,6 +6,28 @@\n #include \"cnxk_eventdev.h\"\n #include \"cnxk_worker.h\"\n \n+#define CN10K_SET_EVDEV_DEQ_OP(dev, deq_op, deq_ops) \\\n+\tdo { \\\n+\t\tdeq_op = deq_ops \\\n+\t\t\t[!!(dev->rx_offloads & NIX_RX_OFFLOAD_VLAN_STRIP_F)] \\\n+\t\t\t[!!(dev->rx_offloads & NIX_RX_OFFLOAD_TSTAMP_F)] \\\n+\t\t\t[!!(dev->rx_offloads & NIX_RX_OFFLOAD_MARK_UPDATE_F)] \\\n+\t\t\t[!!(dev->rx_offloads & NIX_RX_OFFLOAD_CHECKSUM_F)] \\\n+\t\t\t[!!(dev->rx_offloads & NIX_RX_OFFLOAD_PTYPE_F)] \\\n+\t\t\t[!!(dev->rx_offloads & NIX_RX_OFFLOAD_RSS_F)]; \\\n+\t} while (0)\n+\n+#define CN10K_SET_EVDEV_ENQ_OP(dev, enq_op, enq_ops) \\\n+\tdo { \\\n+\t\tenq_op = enq_ops \\\n+\t\t\t[!!(dev->tx_offloads & NIX_TX_OFFLOAD_TSTAMP_F)] \\\n+\t\t\t[!!(dev->tx_offloads & NIX_TX_OFFLOAD_TSO_F)] \\\n+\t\t\t[!!(dev->tx_offloads & NIX_TX_OFFLOAD_MBUF_NOFF_F)] \\\n+\t\t\t[!!(dev->tx_offloads & NIX_TX_OFFLOAD_VLAN_QINQ_F)] \\\n+\t\t\t[!!(dev->tx_offloads & NIX_TX_OFFLOAD_OL3_OL4_CSUM_F)] \\\n+\t\t\t[!!(dev->tx_offloads & NIX_TX_OFFLOAD_L3_L4_CSUM_F)]; \\\n+\t} while (0)\n+\n static uint32_t\n cn10k_sso_gw_mode_wdata(struct cnxk_sso_evdev *dev)\n {\n@@ -285,14 +307,14 @@ cn10k_sso_fp_fns_set(struct rte_eventdev *event_dev)\n #undef R\n \t};\n \n-\tconst event_dequeue_t sso_hws_tmo_deq[2][2][2][2][2][2] = {\n+\tconst event_dequeue_t sso_hws_deq_tmo[2][2][2][2][2][2] = {\n #define R(name, f5, f4, f3, f2, f1, f0, flags) \\\n \t[f5][f4][f3][f2][f1][f0] = cn10k_sso_hws_deq_tmo_##name,\n \t\tNIX_RX_FASTPATH_MODES\n #undef R\n \t};\n \n-\tconst event_dequeue_burst_t sso_hws_tmo_deq_burst[2][2][2][2][2][2] = {\n+\tconst event_dequeue_burst_t sso_hws_deq_tmo_burst[2][2][2][2][2][2] = {\n #define R(name, f5, f4, f3, f2, f1, f0, flags) \\\n \t[f5][f4][f3][f2][f1][f0] = cn10k_sso_hws_deq_tmo_burst_##name,\n \t\tNIX_RX_FASTPATH_MODES\n@@ -313,7 +335,7 @@ cn10k_sso_fp_fns_set(struct rte_eventdev *event_dev)\n #undef R\n \t};\n \n-\tconst event_dequeue_t sso_hws_tmo_deq_seg[2][2][2][2][2][2] = {\n+\tconst event_dequeue_t sso_hws_deq_tmo_seg[2][2][2][2][2][2] = {\n #define R(name, f5, f4, f3, f2, f1, f0, flags) \\\n \t[f5][f4][f3][f2][f1][f0] = cn10k_sso_hws_deq_tmo_seg_##name,\n \t\tNIX_RX_FASTPATH_MODES\n@@ -321,7 +343,7 @@ cn10k_sso_fp_fns_set(struct rte_eventdev *event_dev)\n \t};\n \n \tconst event_dequeue_burst_t\n-\t\tsso_hws_tmo_deq_seg_burst[2][2][2][2][2][2] = {\n+\t\tsso_hws_deq_tmo_seg_burst[2][2][2][2][2][2] = {\n #define R(name, f5, f4, f3, f2, f1, f0, flags) \\\n \t[f5][f4][f3][f2][f1][f0] = cn10k_sso_hws_deq_tmo_seg_burst_##name,\n \t\t\tNIX_RX_FASTPATH_MODES\n@@ -350,99 +372,34 @@ cn10k_sso_fp_fns_set(struct rte_eventdev *event_dev)\n \tevent_dev->enqueue_new_burst = cn10k_sso_hws_enq_new_burst;\n \tevent_dev->enqueue_forward_burst = cn10k_sso_hws_enq_fwd_burst;\n \tif (dev->rx_offloads & NIX_RX_MULTI_SEG_F) {\n-\t\tevent_dev->dequeue = sso_hws_deq_seg\n-\t\t\t[!!(dev->rx_offloads & NIX_RX_OFFLOAD_VLAN_STRIP_F)]\n-\t\t\t[!!(dev->rx_offloads & NIX_RX_OFFLOAD_TSTAMP_F)]\n-\t\t\t[!!(dev->rx_offloads & NIX_RX_OFFLOAD_MARK_UPDATE_F)]\n-\t\t\t[!!(dev->rx_offloads & NIX_RX_OFFLOAD_CHECKSUM_F)]\n-\t\t\t[!!(dev->rx_offloads & NIX_RX_OFFLOAD_PTYPE_F)]\n-\t\t\t[!!(dev->rx_offloads & NIX_RX_OFFLOAD_RSS_F)];\n-\t\tevent_dev->dequeue_burst = sso_hws_deq_seg_burst\n-\t\t\t[!!(dev->rx_offloads & NIX_RX_OFFLOAD_VLAN_STRIP_F)]\n-\t\t\t[!!(dev->rx_offloads & NIX_RX_OFFLOAD_TSTAMP_F)]\n-\t\t\t[!!(dev->rx_offloads & NIX_RX_OFFLOAD_MARK_UPDATE_F)]\n-\t\t\t[!!(dev->rx_offloads & NIX_RX_OFFLOAD_CHECKSUM_F)]\n-\t\t\t[!!(dev->rx_offloads & NIX_RX_OFFLOAD_PTYPE_F)]\n-\t\t\t[!!(dev->rx_offloads & NIX_RX_OFFLOAD_RSS_F)];\n+\t\tCN10K_SET_EVDEV_DEQ_OP(dev, event_dev->dequeue,\n+\t\t\t\t sso_hws_deq_seg);\n+\t\tCN10K_SET_EVDEV_DEQ_OP(dev, event_dev->dequeue_burst,\n+\t\t\t\t sso_hws_deq_seg_burst);\n \t\tif (dev->is_timeout_deq) {\n-\t\t\tevent_dev->dequeue = sso_hws_tmo_deq_seg\n-\t\t\t\t[!!(dev->rx_offloads &\n-\t\t\t\t NIX_RX_OFFLOAD_VLAN_STRIP_F)]\n-\t\t\t\t[!!(dev->rx_offloads & NIX_RX_OFFLOAD_TSTAMP_F)]\n-\t\t\t\t[!!(dev->rx_offloads &\n-\t\t\t\t NIX_RX_OFFLOAD_MARK_UPDATE_F)]\n-\t\t\t\t[!!(dev->rx_offloads &\n-\t\t\t\t NIX_RX_OFFLOAD_CHECKSUM_F)]\n-\t\t\t\t[!!(dev->rx_offloads & NIX_RX_OFFLOAD_PTYPE_F)]\n-\t\t\t\t[!!(dev->rx_offloads & NIX_RX_OFFLOAD_RSS_F)];\n-\t\t\tevent_dev->dequeue_burst = sso_hws_tmo_deq_seg_burst\n-\t\t\t\t[!!(dev->rx_offloads &\n-\t\t\t\t NIX_RX_OFFLOAD_VLAN_STRIP_F)]\n-\t\t\t\t[!!(dev->rx_offloads & NIX_RX_OFFLOAD_TSTAMP_F)]\n-\t\t\t\t[!!(dev->rx_offloads &\n-\t\t\t\t NIX_RX_OFFLOAD_MARK_UPDATE_F)]\n-\t\t\t\t[!!(dev->rx_offloads &\n-\t\t\t\t NIX_RX_OFFLOAD_CHECKSUM_F)]\n-\t\t\t\t[!!(dev->rx_offloads & NIX_RX_OFFLOAD_PTYPE_F)]\n-\t\t\t\t[!!(dev->rx_offloads & NIX_RX_OFFLOAD_RSS_F)];\n+\t\t\tCN10K_SET_EVDEV_DEQ_OP(dev, event_dev->dequeue,\n+\t\t\t\t\t sso_hws_deq_tmo_seg);\n+\t\t\tCN10K_SET_EVDEV_DEQ_OP(dev, event_dev->dequeue_burst,\n+\t\t\t\t\t sso_hws_deq_tmo_seg_burst);\n \t\t}\n \t} else {\n-\t\tevent_dev->dequeue = sso_hws_deq\n-\t\t\t[!!(dev->rx_offloads & NIX_RX_OFFLOAD_VLAN_STRIP_F)]\n-\t\t\t[!!(dev->rx_offloads & NIX_RX_OFFLOAD_TSTAMP_F)]\n-\t\t\t[!!(dev->rx_offloads & NIX_RX_OFFLOAD_MARK_UPDATE_F)]\n-\t\t\t[!!(dev->rx_offloads & NIX_RX_OFFLOAD_CHECKSUM_F)]\n-\t\t\t[!!(dev->rx_offloads & NIX_RX_OFFLOAD_PTYPE_F)]\n-\t\t\t[!!(dev->rx_offloads & NIX_RX_OFFLOAD_RSS_F)];\n-\t\tevent_dev->dequeue_burst = sso_hws_deq_burst\n-\t\t\t[!!(dev->rx_offloads & NIX_RX_OFFLOAD_VLAN_STRIP_F)]\n-\t\t\t[!!(dev->rx_offloads & NIX_RX_OFFLOAD_TSTAMP_F)]\n-\t\t\t[!!(dev->rx_offloads & NIX_RX_OFFLOAD_MARK_UPDATE_F)]\n-\t\t\t[!!(dev->rx_offloads & NIX_RX_OFFLOAD_CHECKSUM_F)]\n-\t\t\t[!!(dev->rx_offloads & NIX_RX_OFFLOAD_PTYPE_F)]\n-\t\t\t[!!(dev->rx_offloads & NIX_RX_OFFLOAD_RSS_F)];\n+\t\tCN10K_SET_EVDEV_DEQ_OP(dev, event_dev->dequeue, sso_hws_deq);\n+\t\tCN10K_SET_EVDEV_DEQ_OP(dev, event_dev->dequeue_burst,\n+\t\t\t\t sso_hws_deq_burst);\n \t\tif (dev->is_timeout_deq) {\n-\t\t\tevent_dev->dequeue = sso_hws_tmo_deq\n-\t\t\t\t[!!(dev->rx_offloads &\n-\t\t\t\t NIX_RX_OFFLOAD_VLAN_STRIP_F)]\n-\t\t\t\t[!!(dev->rx_offloads & NIX_RX_OFFLOAD_TSTAMP_F)]\n-\t\t\t\t[!!(dev->rx_offloads &\n-\t\t\t\t NIX_RX_OFFLOAD_MARK_UPDATE_F)]\n-\t\t\t\t[!!(dev->rx_offloads &\n-\t\t\t\t NIX_RX_OFFLOAD_CHECKSUM_F)]\n-\t\t\t\t[!!(dev->rx_offloads & NIX_RX_OFFLOAD_PTYPE_F)]\n-\t\t\t\t[!!(dev->rx_offloads & NIX_RX_OFFLOAD_RSS_F)];\n-\t\t\tevent_dev->dequeue_burst = sso_hws_tmo_deq_burst\n-\t\t\t\t[!!(dev->rx_offloads &\n-\t\t\t\t NIX_RX_OFFLOAD_VLAN_STRIP_F)]\n-\t\t\t\t[!!(dev->rx_offloads & NIX_RX_OFFLOAD_TSTAMP_F)]\n-\t\t\t\t[!!(dev->rx_offloads &\n-\t\t\t\t NIX_RX_OFFLOAD_MARK_UPDATE_F)]\n-\t\t\t\t[!!(dev->rx_offloads &\n-\t\t\t\t NIX_RX_OFFLOAD_CHECKSUM_F)]\n-\t\t\t\t[!!(dev->rx_offloads & NIX_RX_OFFLOAD_PTYPE_F)]\n-\t\t\t\t[!!(dev->rx_offloads & NIX_RX_OFFLOAD_RSS_F)];\n+\t\t\tCN10K_SET_EVDEV_DEQ_OP(dev, event_dev->dequeue,\n+\t\t\t\t\t sso_hws_deq_tmo);\n+\t\t\tCN10K_SET_EVDEV_DEQ_OP(dev, event_dev->dequeue_burst,\n+\t\t\t\t\t sso_hws_deq_tmo_burst);\n \t\t}\n \t}\n \n-\tif (dev->tx_offloads & NIX_TX_MULTI_SEG_F) {\n-\t\t/* [SEC] [TSMP] [MBUF_NOFF] [VLAN] [OL3_L4_CSUM] [L3_L4_CSUM] */\n-\t\tevent_dev->txa_enqueue = sso_hws_tx_adptr_enq_seg\n-\t\t\t[!!(dev->tx_offloads & NIX_TX_OFFLOAD_TSTAMP_F)]\n-\t\t\t[!!(dev->tx_offloads & NIX_TX_OFFLOAD_TSO_F)]\n-\t\t\t[!!(dev->tx_offloads & NIX_TX_OFFLOAD_MBUF_NOFF_F)]\n-\t\t\t[!!(dev->tx_offloads & NIX_TX_OFFLOAD_VLAN_QINQ_F)]\n-\t\t\t[!!(dev->tx_offloads & NIX_TX_OFFLOAD_OL3_OL4_CSUM_F)]\n-\t\t\t[!!(dev->tx_offloads & NIX_TX_OFFLOAD_L3_L4_CSUM_F)];\n-\t} else {\n-\t\tevent_dev->txa_enqueue = sso_hws_tx_adptr_enq\n-\t\t\t[!!(dev->tx_offloads & NIX_TX_OFFLOAD_TSTAMP_F)]\n-\t\t\t[!!(dev->tx_offloads & NIX_TX_OFFLOAD_TSO_F)]\n-\t\t\t[!!(dev->tx_offloads & NIX_TX_OFFLOAD_MBUF_NOFF_F)]\n-\t\t\t[!!(dev->tx_offloads & NIX_TX_OFFLOAD_VLAN_QINQ_F)]\n-\t\t\t[!!(dev->tx_offloads & NIX_TX_OFFLOAD_OL3_OL4_CSUM_F)]\n-\t\t\t[!!(dev->tx_offloads & NIX_TX_OFFLOAD_L3_L4_CSUM_F)];\n-\t}\n+\tif (dev->tx_offloads & NIX_TX_MULTI_SEG_F)\n+\t\tCN10K_SET_EVDEV_ENQ_OP(dev, event_dev->txa_enqueue,\n+\t\t\t\t sso_hws_tx_adptr_enq_seg);\n+\telse\n+\t\tCN10K_SET_EVDEV_ENQ_OP(dev, event_dev->txa_enqueue,\n+\t\t\t\t sso_hws_tx_adptr_enq);\n \n \tevent_dev->txa_enqueue_same_dest = event_dev->txa_enqueue;\n }\n@@ -864,7 +821,7 @@ cn10k_sso_init(struct rte_eventdev *event_dev)\n \tint rc;\n \n \tif (RTE_CACHE_LINE_SIZE != 64) {\n-\t\tplt_err(\"Driver not compiled for CN9K\");\n+\t\tplt_err(\"Driver not compiled for CN10K\");\n \t\treturn -EFAULT;\n \t}\n \ndiff --git a/drivers/event/cnxk/cn9k_eventdev.c b/drivers/event/cnxk/cn9k_eventdev.c\nindex a69edff195..06c364d26a 100644\n--- a/drivers/event/cnxk/cn9k_eventdev.c\n+++ b/drivers/event/cnxk/cn9k_eventdev.c\n@@ -9,6 +9,28 @@\n #define CN9K_DUAL_WS_NB_WS\t 2\n #define CN9K_DUAL_WS_PAIR_ID(x, id) (((x)*CN9K_DUAL_WS_NB_WS) + id)\n \n+#define CN9K_SET_EVDEV_DEQ_OP(dev, deq_op, deq_ops) \\\n+\tdo { \\\n+\t\tdeq_op = deq_ops \\\n+\t\t\t[!!(dev->rx_offloads & NIX_RX_OFFLOAD_VLAN_STRIP_F)] \\\n+\t\t\t[!!(dev->rx_offloads & NIX_RX_OFFLOAD_TSTAMP_F)] \\\n+\t\t\t[!!(dev->rx_offloads & NIX_RX_OFFLOAD_MARK_UPDATE_F)] \\\n+\t\t\t[!!(dev->rx_offloads & NIX_RX_OFFLOAD_CHECKSUM_F)] \\\n+\t\t\t[!!(dev->rx_offloads & NIX_RX_OFFLOAD_PTYPE_F)] \\\n+\t\t\t[!!(dev->rx_offloads & NIX_RX_OFFLOAD_RSS_F)]; \\\n+\t} while (0)\n+\n+#define CN9K_SET_EVDEV_ENQ_OP(dev, enq_op, enq_ops) \\\n+\tdo { \\\n+\t\tenq_op = enq_ops \\\n+\t\t\t[!!(dev->tx_offloads & NIX_TX_OFFLOAD_TSTAMP_F)] \\\n+\t\t\t[!!(dev->tx_offloads & NIX_TX_OFFLOAD_TSO_F)] \\\n+\t\t\t[!!(dev->tx_offloads & NIX_TX_OFFLOAD_MBUF_NOFF_F)] \\\n+\t\t\t[!!(dev->tx_offloads & NIX_TX_OFFLOAD_VLAN_QINQ_F)] \\\n+\t\t\t[!!(dev->tx_offloads & NIX_TX_OFFLOAD_OL3_OL4_CSUM_F)] \\\n+\t\t\t[!!(dev->tx_offloads & NIX_TX_OFFLOAD_L3_L4_CSUM_F)]; \\\n+\t} while (0)\n+\n static void\n cn9k_init_hws_ops(struct cn9k_sso_hws_state *ws, uintptr_t base)\n {\n@@ -468,99 +490,33 @@ cn9k_sso_fp_fns_set(struct rte_eventdev *event_dev)\n \tevent_dev->enqueue_new_burst = cn9k_sso_hws_enq_new_burst;\n \tevent_dev->enqueue_forward_burst = cn9k_sso_hws_enq_fwd_burst;\n \tif (dev->rx_offloads & NIX_RX_MULTI_SEG_F) {\n-\t\tevent_dev->dequeue = sso_hws_deq_seg\n-\t\t\t[!!(dev->rx_offloads & NIX_RX_OFFLOAD_VLAN_STRIP_F)]\n-\t\t\t[!!(dev->rx_offloads & NIX_RX_OFFLOAD_TSTAMP_F)]\n-\t\t\t[!!(dev->rx_offloads & NIX_RX_OFFLOAD_MARK_UPDATE_F)]\n-\t\t\t[!!(dev->rx_offloads & NIX_RX_OFFLOAD_CHECKSUM_F)]\n-\t\t\t[!!(dev->rx_offloads & NIX_RX_OFFLOAD_PTYPE_F)]\n-\t\t\t[!!(dev->rx_offloads & NIX_RX_OFFLOAD_RSS_F)];\n-\t\tevent_dev->dequeue_burst = sso_hws_deq_seg_burst\n-\t\t\t[!!(dev->rx_offloads & NIX_RX_OFFLOAD_VLAN_STRIP_F)]\n-\t\t\t[!!(dev->rx_offloads & NIX_RX_OFFLOAD_TSTAMP_F)]\n-\t\t\t[!!(dev->rx_offloads & NIX_RX_OFFLOAD_MARK_UPDATE_F)]\n-\t\t\t[!!(dev->rx_offloads & NIX_RX_OFFLOAD_CHECKSUM_F)]\n-\t\t\t[!!(dev->rx_offloads & NIX_RX_OFFLOAD_PTYPE_F)]\n-\t\t\t[!!(dev->rx_offloads & NIX_RX_OFFLOAD_RSS_F)];\n+\t\tCN9K_SET_EVDEV_DEQ_OP(dev, event_dev->dequeue, sso_hws_deq_seg);\n+\t\tCN9K_SET_EVDEV_DEQ_OP(dev, event_dev->dequeue_burst,\n+\t\t\t\t sso_hws_deq_seg_burst);\n \t\tif (dev->is_timeout_deq) {\n-\t\t\tevent_dev->dequeue = sso_hws_deq_tmo_seg\n-\t\t\t\t[!!(dev->rx_offloads &\n-\t\t\t\t NIX_RX_OFFLOAD_VLAN_STRIP_F)]\n-\t\t\t\t[!!(dev->rx_offloads & NIX_RX_OFFLOAD_TSTAMP_F)]\n-\t\t\t\t[!!(dev->rx_offloads &\n-\t\t\t\t NIX_RX_OFFLOAD_MARK_UPDATE_F)]\n-\t\t\t\t[!!(dev->rx_offloads &\n-\t\t\t\t NIX_RX_OFFLOAD_CHECKSUM_F)]\n-\t\t\t\t[!!(dev->rx_offloads & NIX_RX_OFFLOAD_PTYPE_F)]\n-\t\t\t\t[!!(dev->rx_offloads & NIX_RX_OFFLOAD_RSS_F)];\n-\t\t\tevent_dev->dequeue_burst = sso_hws_deq_tmo_seg_burst\n-\t\t\t\t[!!(dev->rx_offloads &\n-\t\t\t\t NIX_RX_OFFLOAD_VLAN_STRIP_F)]\n-\t\t\t\t[!!(dev->rx_offloads & NIX_RX_OFFLOAD_TSTAMP_F)]\n-\t\t\t\t[!!(dev->rx_offloads &\n-\t\t\t\t NIX_RX_OFFLOAD_MARK_UPDATE_F)]\n-\t\t\t\t[!!(dev->rx_offloads &\n-\t\t\t\t NIX_RX_OFFLOAD_CHECKSUM_F)]\n-\t\t\t\t[!!(dev->rx_offloads & NIX_RX_OFFLOAD_PTYPE_F)]\n-\t\t\t\t[!!(dev->rx_offloads & NIX_RX_OFFLOAD_RSS_F)];\n+\t\t\tCN9K_SET_EVDEV_DEQ_OP(dev, event_dev->dequeue,\n+\t\t\t\t\t sso_hws_deq_tmo_seg);\n+\t\t\tCN9K_SET_EVDEV_DEQ_OP(dev, event_dev->dequeue_burst,\n+\t\t\t\t\t sso_hws_deq_tmo_seg_burst);\n \t\t}\n \t} else {\n-\t\tevent_dev->dequeue = sso_hws_deq\n-\t\t\t[!!(dev->rx_offloads & NIX_RX_OFFLOAD_VLAN_STRIP_F)]\n-\t\t\t[!!(dev->rx_offloads & NIX_RX_OFFLOAD_TSTAMP_F)]\n-\t\t\t[!!(dev->rx_offloads & NIX_RX_OFFLOAD_MARK_UPDATE_F)]\n-\t\t\t[!!(dev->rx_offloads & NIX_RX_OFFLOAD_CHECKSUM_F)]\n-\t\t\t[!!(dev->rx_offloads & NIX_RX_OFFLOAD_PTYPE_F)]\n-\t\t\t[!!(dev->rx_offloads & NIX_RX_OFFLOAD_RSS_F)];\n-\t\tevent_dev->dequeue_burst = sso_hws_deq_burst\n-\t\t\t[!!(dev->rx_offloads & NIX_RX_OFFLOAD_VLAN_STRIP_F)]\n-\t\t\t[!!(dev->rx_offloads & NIX_RX_OFFLOAD_TSTAMP_F)]\n-\t\t\t[!!(dev->rx_offloads & NIX_RX_OFFLOAD_MARK_UPDATE_F)]\n-\t\t\t[!!(dev->rx_offloads & NIX_RX_OFFLOAD_CHECKSUM_F)]\n-\t\t\t[!!(dev->rx_offloads & NIX_RX_OFFLOAD_PTYPE_F)]\n-\t\t\t[!!(dev->rx_offloads & NIX_RX_OFFLOAD_RSS_F)];\n+\t\tCN9K_SET_EVDEV_DEQ_OP(dev, event_dev->dequeue, sso_hws_deq);\n+\t\tCN9K_SET_EVDEV_DEQ_OP(dev, event_dev->dequeue_burst,\n+\t\t\t\t sso_hws_deq_burst);\n \t\tif (dev->is_timeout_deq) {\n-\t\t\tevent_dev->dequeue = sso_hws_deq_tmo\n-\t\t\t\t[!!(dev->rx_offloads &\n-\t\t\t\t NIX_RX_OFFLOAD_VLAN_STRIP_F)]\n-\t\t\t\t[!!(dev->rx_offloads & NIX_RX_OFFLOAD_TSTAMP_F)]\n-\t\t\t\t[!!(dev->rx_offloads &\n-\t\t\t\t NIX_RX_OFFLOAD_MARK_UPDATE_F)]\n-\t\t\t\t[!!(dev->rx_offloads &\n-\t\t\t\t NIX_RX_OFFLOAD_CHECKSUM_F)]\n-\t\t\t\t[!!(dev->rx_offloads & NIX_RX_OFFLOAD_PTYPE_F)]\n-\t\t\t\t[!!(dev->rx_offloads & NIX_RX_OFFLOAD_RSS_F)];\n-\t\t\tevent_dev->dequeue_burst = sso_hws_deq_tmo_burst\n-\t\t\t\t[!!(dev->rx_offloads &\n-\t\t\t\t NIX_RX_OFFLOAD_VLAN_STRIP_F)]\n-\t\t\t\t[!!(dev->rx_offloads & NIX_RX_OFFLOAD_TSTAMP_F)]\n-\t\t\t\t[!!(dev->rx_offloads &\n-\t\t\t\t NIX_RX_OFFLOAD_MARK_UPDATE_F)]\n-\t\t\t\t[!!(dev->rx_offloads &\n-\t\t\t\t NIX_RX_OFFLOAD_CHECKSUM_F)]\n-\t\t\t\t[!!(dev->rx_offloads & NIX_RX_OFFLOAD_PTYPE_F)]\n-\t\t\t\t[!!(dev->rx_offloads & NIX_RX_OFFLOAD_RSS_F)];\n+\t\t\tCN9K_SET_EVDEV_DEQ_OP(dev, event_dev->dequeue,\n+\t\t\t\t\t sso_hws_deq_tmo);\n+\t\t\tCN9K_SET_EVDEV_DEQ_OP(dev, event_dev->dequeue_burst,\n+\t\t\t\t\t sso_hws_deq_tmo_burst);\n \t\t}\n \t}\n \n-\tif (dev->tx_offloads & NIX_TX_MULTI_SEG_F) {\n-\t\t/* [SEC] [TSMP] [MBUF_NOFF] [VLAN] [OL3_L4_CSUM] [L3_L4_CSUM] */\n-\t\tevent_dev->txa_enqueue = sso_hws_tx_adptr_enq_seg\n-\t\t\t[!!(dev->tx_offloads & NIX_TX_OFFLOAD_TSTAMP_F)]\n-\t\t\t[!!(dev->tx_offloads & NIX_TX_OFFLOAD_TSO_F)]\n-\t\t\t[!!(dev->tx_offloads & NIX_TX_OFFLOAD_MBUF_NOFF_F)]\n-\t\t\t[!!(dev->tx_offloads & NIX_TX_OFFLOAD_VLAN_QINQ_F)]\n-\t\t\t[!!(dev->tx_offloads & NIX_TX_OFFLOAD_OL3_OL4_CSUM_F)]\n-\t\t\t[!!(dev->tx_offloads & NIX_TX_OFFLOAD_L3_L4_CSUM_F)];\n-\t} else {\n-\t\tevent_dev->txa_enqueue = sso_hws_tx_adptr_enq\n-\t\t\t[!!(dev->tx_offloads & NIX_TX_OFFLOAD_TSTAMP_F)]\n-\t\t\t[!!(dev->tx_offloads & NIX_TX_OFFLOAD_TSO_F)]\n-\t\t\t[!!(dev->tx_offloads & NIX_TX_OFFLOAD_MBUF_NOFF_F)]\n-\t\t\t[!!(dev->tx_offloads & NIX_TX_OFFLOAD_VLAN_QINQ_F)]\n-\t\t\t[!!(dev->tx_offloads & NIX_TX_OFFLOAD_OL3_OL4_CSUM_F)]\n-\t\t\t[!!(dev->tx_offloads & NIX_TX_OFFLOAD_L3_L4_CSUM_F)];\n-\t}\n+\tif (dev->tx_offloads & NIX_TX_MULTI_SEG_F)\n+\t\tCN9K_SET_EVDEV_ENQ_OP(dev, event_dev->txa_enqueue,\n+\t\t\t\t sso_hws_tx_adptr_enq_seg);\n+\telse\n+\t\tCN9K_SET_EVDEV_ENQ_OP(dev, event_dev->txa_enqueue,\n+\t\t\t\t sso_hws_tx_adptr_enq);\n \n \tif (dev->dual_ws) {\n \t\tevent_dev->enqueue = cn9k_sso_hws_dual_enq;\n@@ -570,134 +526,37 @@ cn9k_sso_fp_fns_set(struct rte_eventdev *event_dev)\n \t\t\tcn9k_sso_hws_dual_enq_fwd_burst;\n \n \t\tif (dev->rx_offloads & NIX_RX_MULTI_SEG_F) {\n-\t\t\tevent_dev->dequeue = sso_hws_dual_deq_seg\n-\t\t\t\t[!!(dev->rx_offloads &\n-\t\t\t\t NIX_RX_OFFLOAD_VLAN_STRIP_F)]\n-\t\t\t\t[!!(dev->rx_offloads & NIX_RX_OFFLOAD_TSTAMP_F)]\n-\t\t\t\t[!!(dev->rx_offloads &\n-\t\t\t\t NIX_RX_OFFLOAD_MARK_UPDATE_F)]\n-\t\t\t\t[!!(dev->rx_offloads &\n-\t\t\t\t NIX_RX_OFFLOAD_CHECKSUM_F)]\n-\t\t\t\t[!!(dev->rx_offloads & NIX_RX_OFFLOAD_PTYPE_F)]\n-\t\t\t\t[!!(dev->rx_offloads & NIX_RX_OFFLOAD_RSS_F)];\n-\t\t\tevent_dev->dequeue_burst = sso_hws_dual_deq_seg_burst\n-\t\t\t\t[!!(dev->rx_offloads &\n-\t\t\t\t NIX_RX_OFFLOAD_VLAN_STRIP_F)]\n-\t\t\t\t[!!(dev->rx_offloads & NIX_RX_OFFLOAD_TSTAMP_F)]\n-\t\t\t\t[!!(dev->rx_offloads &\n-\t\t\t\t NIX_RX_OFFLOAD_MARK_UPDATE_F)]\n-\t\t\t\t[!!(dev->rx_offloads &\n-\t\t\t\t NIX_RX_OFFLOAD_CHECKSUM_F)]\n-\t\t\t\t[!!(dev->rx_offloads & NIX_RX_OFFLOAD_PTYPE_F)]\n-\t\t\t\t[!!(dev->rx_offloads & NIX_RX_OFFLOAD_RSS_F)];\n+\t\t\tCN9K_SET_EVDEV_DEQ_OP(dev, event_dev->dequeue,\n+\t\t\t\t\t sso_hws_dual_deq_seg);\n+\t\t\tCN9K_SET_EVDEV_DEQ_OP(dev, event_dev->dequeue_burst,\n+\t\t\t\t\t sso_hws_dual_deq_seg_burst);\n \t\t\tif (dev->is_timeout_deq) {\n-\t\t\t\tevent_dev->dequeue = sso_hws_dual_deq_tmo_seg\n-\t\t\t\t\t[!!(dev->rx_offloads &\n-\t\t\t\t\t NIX_RX_OFFLOAD_VLAN_STRIP_F)]\n-\t\t\t\t\t[!!(dev->rx_offloads &\n-\t\t\t\t\t NIX_RX_OFFLOAD_TSTAMP_F)]\n-\t\t\t\t\t[!!(dev->rx_offloads &\n-\t\t\t\t\t NIX_RX_OFFLOAD_MARK_UPDATE_F)]\n-\t\t\t\t\t[!!(dev->rx_offloads &\n-\t\t\t\t\t NIX_RX_OFFLOAD_CHECKSUM_F)]\n-\t\t\t\t\t[!!(dev->rx_offloads &\n-\t\t\t\t\t NIX_RX_OFFLOAD_PTYPE_F)]\n-\t\t\t\t\t[!!(dev->rx_offloads &\n-\t\t\t\t\t NIX_RX_OFFLOAD_RSS_F)];\n-\t\t\t\tevent_dev->dequeue_burst =\n-\t\t\t\t\tsso_hws_dual_deq_tmo_seg_burst\n-\t\t\t\t\t\t[!!(dev->rx_offloads &\n-\t\t\t\t\t\t NIX_RX_OFFLOAD_VLAN_STRIP_F)]\n-\t\t\t\t\t\t[!!(dev->rx_offloads &\n-\t\t\t\t\t\t NIX_RX_OFFLOAD_TSTAMP_F)]\n-\t\t\t\t\t\t[!!(dev->rx_offloads &\n-\t\t\t\t\t\t NIX_RX_OFFLOAD_MARK_UPDATE_F)]\n-\t\t\t\t\t\t[!!(dev->rx_offloads &\n-\t\t\t\t\t\t NIX_RX_OFFLOAD_CHECKSUM_F)]\n-\t\t\t\t\t\t[!!(dev->rx_offloads &\n-\t\t\t\t\t\t NIX_RX_OFFLOAD_PTYPE_F)]\n-\t\t\t\t\t\t[!!(dev->rx_offloads &\n-\t\t\t\t\t\t NIX_RX_OFFLOAD_RSS_F)];\n+\t\t\t\tCN9K_SET_EVDEV_DEQ_OP(dev, event_dev->dequeue,\n+\t\t\t\t\t\t sso_hws_dual_deq_tmo_seg);\n+\t\t\t\tCN9K_SET_EVDEV_DEQ_OP(\n+\t\t\t\t\tdev, event_dev->dequeue_burst,\n+\t\t\t\t\tsso_hws_dual_deq_tmo_seg_burst);\n \t\t\t}\n \t\t} else {\n-\t\t\tevent_dev->dequeue = sso_hws_dual_deq\n-\t\t\t\t[!!(dev->rx_offloads &\n-\t\t\t\t NIX_RX_OFFLOAD_VLAN_STRIP_F)]\n-\t\t\t\t[!!(dev->rx_offloads & NIX_RX_OFFLOAD_TSTAMP_F)]\n-\t\t\t\t[!!(dev->rx_offloads &\n-\t\t\t\t NIX_RX_OFFLOAD_MARK_UPDATE_F)]\n-\t\t\t\t[!!(dev->rx_offloads &\n-\t\t\t\t NIX_RX_OFFLOAD_CHECKSUM_F)]\n-\t\t\t\t[!!(dev->rx_offloads & NIX_RX_OFFLOAD_PTYPE_F)]\n-\t\t\t\t[!!(dev->rx_offloads & NIX_RX_OFFLOAD_RSS_F)];\n-\t\t\tevent_dev->dequeue_burst = sso_hws_dual_deq_burst\n-\t\t\t\t[!!(dev->rx_offloads &\n-\t\t\t\t NIX_RX_OFFLOAD_VLAN_STRIP_F)]\n-\t\t\t\t[!!(dev->rx_offloads & NIX_RX_OFFLOAD_TSTAMP_F)]\n-\t\t\t\t[!!(dev->rx_offloads &\n-\t\t\t\t NIX_RX_OFFLOAD_MARK_UPDATE_F)]\n-\t\t\t\t[!!(dev->rx_offloads &\n-\t\t\t\t NIX_RX_OFFLOAD_CHECKSUM_F)]\n-\t\t\t\t[!!(dev->rx_offloads & NIX_RX_OFFLOAD_PTYPE_F)]\n-\t\t\t\t[!!(dev->rx_offloads & NIX_RX_OFFLOAD_RSS_F)];\n+\t\t\tCN9K_SET_EVDEV_DEQ_OP(dev, event_dev->dequeue,\n+\t\t\t\t\t sso_hws_dual_deq);\n+\t\t\tCN9K_SET_EVDEV_DEQ_OP(dev, event_dev->dequeue_burst,\n+\t\t\t\t\t sso_hws_dual_deq_burst);\n \t\t\tif (dev->is_timeout_deq) {\n-\t\t\t\tevent_dev->dequeue = sso_hws_dual_deq_tmo\n-\t\t\t\t\t[!!(dev->rx_offloads &\n-\t\t\t\t\t NIX_RX_OFFLOAD_VLAN_STRIP_F)]\n-\t\t\t\t\t[!!(dev->rx_offloads &\n-\t\t\t\t\t NIX_RX_OFFLOAD_TSTAMP_F)]\n-\t\t\t\t\t[!!(dev->rx_offloads &\n-\t\t\t\t\t NIX_RX_OFFLOAD_MARK_UPDATE_F)]\n-\t\t\t\t\t[!!(dev->rx_offloads &\n-\t\t\t\t\t NIX_RX_OFFLOAD_CHECKSUM_F)]\n-\t\t\t\t\t[!!(dev->rx_offloads &\n-\t\t\t\t\t NIX_RX_OFFLOAD_PTYPE_F)]\n-\t\t\t\t\t[!!(dev->rx_offloads &\n-\t\t\t\t\t NIX_RX_OFFLOAD_RSS_F)];\n-\t\t\t\tevent_dev->dequeue_burst =\n-\t\t\t\t\tsso_hws_dual_deq_tmo_burst\n-\t\t\t\t\t\t[!!(dev->rx_offloads &\n-\t\t\t\t\t\t NIX_RX_OFFLOAD_VLAN_STRIP_F)]\n-\t\t\t\t\t\t[!!(dev->rx_offloads &\n-\t\t\t\t\t\t NIX_RX_OFFLOAD_TSTAMP_F)]\n-\t\t\t\t\t\t[!!(dev->rx_offloads &\n-\t\t\t\t\t\t NIX_RX_OFFLOAD_MARK_UPDATE_F)]\n-\t\t\t\t\t\t[!!(dev->rx_offloads &\n-\t\t\t\t\t\t NIX_RX_OFFLOAD_CHECKSUM_F)]\n-\t\t\t\t\t\t[!!(dev->rx_offloads &\n-\t\t\t\t\t\t NIX_RX_OFFLOAD_PTYPE_F)]\n-\t\t\t\t\t\t[!!(dev->rx_offloads &\n-\t\t\t\t\t\t NIX_RX_OFFLOAD_RSS_F)];\n+\t\t\t\tCN9K_SET_EVDEV_DEQ_OP(dev, event_dev->dequeue,\n+\t\t\t\t\t\t sso_hws_dual_deq_tmo);\n+\t\t\t\tCN9K_SET_EVDEV_DEQ_OP(\n+\t\t\t\t\tdev, event_dev->dequeue_burst,\n+\t\t\t\t\tsso_hws_dual_deq_tmo_burst);\n \t\t\t}\n \t\t}\n \n-\t\tif (dev->tx_offloads & NIX_TX_MULTI_SEG_F) {\n-\t\t\t/* [TSMP] [MBUF_NOFF] [VLAN] [OL3_L4_CSUM] [L3_L4_CSUM]\n-\t\t\t */\n-\t\t\tevent_dev->txa_enqueue = sso_hws_dual_tx_adptr_enq_seg\n-\t\t\t\t[!!(dev->tx_offloads & NIX_TX_OFFLOAD_TSTAMP_F)]\n-\t\t\t\t[!!(dev->tx_offloads & NIX_TX_OFFLOAD_TSO_F)]\n-\t\t\t\t[!!(dev->tx_offloads &\n-\t\t\t\t NIX_TX_OFFLOAD_MBUF_NOFF_F)]\n-\t\t\t\t[!!(dev->tx_offloads &\n-\t\t\t\t NIX_TX_OFFLOAD_VLAN_QINQ_F)]\n-\t\t\t\t[!!(dev->tx_offloads &\n-\t\t\t\t NIX_TX_OFFLOAD_OL3_OL4_CSUM_F)]\n-\t\t\t\t[!!(dev->tx_offloads &\n-\t\t\t\t NIX_TX_OFFLOAD_L3_L4_CSUM_F)];\n-\t\t} else {\n-\t\t\tevent_dev->txa_enqueue = sso_hws_dual_tx_adptr_enq\n-\t\t\t\t[!!(dev->tx_offloads & NIX_TX_OFFLOAD_TSTAMP_F)]\n-\t\t\t\t[!!(dev->tx_offloads & NIX_TX_OFFLOAD_TSO_F)]\n-\t\t\t\t[!!(dev->tx_offloads &\n-\t\t\t\t NIX_TX_OFFLOAD_MBUF_NOFF_F)]\n-\t\t\t\t[!!(dev->tx_offloads &\n-\t\t\t\t NIX_TX_OFFLOAD_VLAN_QINQ_F)]\n-\t\t\t\t[!!(dev->tx_offloads &\n-\t\t\t\t NIX_TX_OFFLOAD_OL3_OL4_CSUM_F)]\n-\t\t\t\t[!!(dev->tx_offloads &\n-\t\t\t\t NIX_TX_OFFLOAD_L3_L4_CSUM_F)];\n-\t\t}\n+\t\tif (dev->tx_offloads & NIX_TX_MULTI_SEG_F)\n+\t\t\tCN9K_SET_EVDEV_ENQ_OP(dev, event_dev->txa_enqueue,\n+\t\t\t\t\t sso_hws_dual_tx_adptr_enq_seg);\n+\t\telse\n+\t\t\tCN9K_SET_EVDEV_ENQ_OP(dev, event_dev->txa_enqueue,\n+\t\t\t\t\t sso_hws_dual_tx_adptr_enq);\n \t}\n \n \tevent_dev->txa_enqueue_same_dest = event_dev->txa_enqueue;\n", "prefixes": [ "v2", "2/8" ] }