Patch Detail
get:
Show a patch.
patch:
Update a patch.
put:
Update a patch.
GET /api/patches/97789/?format=api
{ "id": 97789, "url": "http://patchwork.dpdk.org/api/patches/97789/?format=api", "web_url": "http://patchwork.dpdk.org/project/dpdk/patch/f77448479b1b7b094fa13fb81fdfeaff4a98664e.1630584303.git.sthotton@marvell.com/", "project": { "id": 1, "url": "http://patchwork.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<f77448479b1b7b094fa13fb81fdfeaff4a98664e.1630584303.git.sthotton@marvell.com>", "list_archive_url": "https://inbox.dpdk.org/dev/f77448479b1b7b094fa13fb81fdfeaff4a98664e.1630584303.git.sthotton@marvell.com", "date": "2021-09-02T12:17:21", "name": "[v2,5/8] crypto/cnxk: add cn9k crypto adapter fast path ops", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": true, "hash": "890558e64e4d0042328298be212b06ffeaf209a0", "submitter": { "id": 2049, "url": "http://patchwork.dpdk.org/api/people/2049/?format=api", "name": "Shijith Thotton", "email": "sthotton@marvell.com" }, "delegate": { "id": 6690, "url": "http://patchwork.dpdk.org/api/users/6690/?format=api", "username": "akhil", "first_name": "akhil", "last_name": "goyal", "email": "gakhil@marvell.com" }, "mbox": "http://patchwork.dpdk.org/project/dpdk/patch/f77448479b1b7b094fa13fb81fdfeaff4a98664e.1630584303.git.sthotton@marvell.com/mbox/", "series": [ { "id": 18627, "url": "http://patchwork.dpdk.org/api/series/18627/?format=api", "web_url": "http://patchwork.dpdk.org/project/dpdk/list/?series=18627", "date": "2021-09-02T12:17:16", "name": "Crypto adapter support for Marvell CNXK driver", "version": 2, "mbox": "http://patchwork.dpdk.org/series/18627/mbox/" } ], "comments": "http://patchwork.dpdk.org/api/patches/97789/comments/", "check": "success", "checks": "http://patchwork.dpdk.org/api/patches/97789/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from mails.dpdk.org (mails.dpdk.org [217.70.189.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id B6DFFA0C47;\n\tThu, 2 Sep 2021 14:21:50 +0200 (CEST)", "from [217.70.189.124] (localhost [127.0.0.1])\n\tby mails.dpdk.org (Postfix) with ESMTP id A536040DF7;\n\tThu, 2 Sep 2021 14:21:50 +0200 (CEST)", "from mx0b-0016f401.pphosted.com (mx0b-0016f401.pphosted.com\n [67.231.156.173])\n by mails.dpdk.org (Postfix) with ESMTP id DEDFE40686\n for <dev@dpdk.org>; Thu, 2 Sep 2021 14:21:48 +0200 (CEST)", "from pps.filterd (m0045851.ppops.net [127.0.0.1])\n by mx0b-0016f401.pphosted.com (8.16.1.2/8.16.1.2) with SMTP id\n 18280Snd010729;\n Thu, 2 Sep 2021 05:21:46 -0700", "from dc5-exch02.marvell.com ([199.233.59.182])\n by mx0b-0016f401.pphosted.com with ESMTP id 3attqmguj0-1\n (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT);\n Thu, 02 Sep 2021 05:21:46 -0700", "from DC5-EXCH01.marvell.com (10.69.176.38) by DC5-EXCH02.marvell.com\n (10.69.176.39) with Microsoft SMTP Server (TLS) id 15.0.1497.18;\n Thu, 2 Sep 2021 05:21:44 -0700", "from maili.marvell.com (10.69.176.80) by DC5-EXCH01.marvell.com\n (10.69.176.38) with Microsoft SMTP Server id 15.0.1497.18 via Frontend\n Transport; Thu, 2 Sep 2021 05:21:44 -0700", "from localhost.localdomain (unknown [10.28.34.29])\n by maili.marvell.com (Postfix) with ESMTP id B96B73F7064;\n Thu, 2 Sep 2021 05:21:40 -0700 (PDT)" ], "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com;\n h=from : to : cc :\n subject : date : message-id : in-reply-to : references : mime-version :\n content-transfer-encoding : content-type; s=pfpt0220;\n bh=Uu/o3UgC+SEMExwrD7a4JsZ0I/6+hF4/nzdMBef3Ikc=;\n b=AFUD/g0N3IiQRGjhhx6SqchGC4whE63l6snnW3eWPoPswGzo08PXAWdQR0X20KxmN4nJ\n vxLwNFCmcM59BlpWJwEGhKskXJvVU56EyYxr2y3K+Ob99NWpg2DJ+wdctzP+zsaciC8C\n skpwOw2o3hj9lRANbFCJMO2fQ/uWAGys74REtlJlOEw9NJKYIqghqA5+ZOVF7hpc9b0g\n hthwPsywXhXJMeO5oz25Sqe/84otDsbtBBz0/mtyztxzmjVwcm3npxzIjwkzNCavmAyZ\n vSCdsOek8xMYRCTXPyFIT9Vm8JtgasY8jddvMNWNnGDIWlYWENbkeEU2ScA15MmcStim mw==", "From": "Shijith Thotton <sthotton@marvell.com>", "To": "<dev@dpdk.org>", "CC": "Shijith Thotton <sthotton@marvell.com>, <jerinj@marvell.com>,\n <ndabilpuram@marvell.com>, <anoobj@marvell.com>,\n <pbhagavatula@marvell.com>, <gakhil@marvell.com>,\n Ray Kinsella <mdr@ashroe.eu>, Ankur Dwivedi <adwivedi@marvell.com>,\n Tejasree Kondoj <ktejasree@marvell.com>", "Date": "Thu, 2 Sep 2021 17:47:21 +0530", "Message-ID": "\n <f77448479b1b7b094fa13fb81fdfeaff4a98664e.1630584303.git.sthotton@marvell.com>", "X-Mailer": "git-send-email 2.25.1", "In-Reply-To": "<cover.1630584303.git.sthotton@marvell.com>", "References": "<cover.1630315730.git.sthotton@marvell.com>\n <cover.1630584303.git.sthotton@marvell.com>", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit", "Content-Type": "text/plain", "X-Proofpoint-GUID": "H0kO_QWChlm6IZNvapa-bpqgH50hah9m", "X-Proofpoint-ORIG-GUID": "H0kO_QWChlm6IZNvapa-bpqgH50hah9m", "X-Proofpoint-Virus-Version": "vendor=baseguard\n engine=ICAP:2.0.182.1,Aquarius:18.0.790,Hydra:6.0.391,FMLib:17.0.607.475\n definitions=2021-09-02_04,2021-09-02_01,2020-04-07_01", "Subject": "[dpdk-dev] [PATCH v2 5/8] crypto/cnxk: add cn9k crypto adapter fast\n path ops", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "Added crypto adapter enqueue and dequeue operations for CN9K.\n\nSigned-off-by: Shijith Thotton <sthotton@marvell.com>\nAcked-by: Ray Kinsella <mdr@ashroe.eu>\nAcked-by: Anoob Joseph <anoobj@marvell.com>\n---\n drivers/crypto/cnxk/cn9k_cryptodev_ops.c | 235 ++++++++++++++++-------\n drivers/crypto/cnxk/cn9k_cryptodev_ops.h | 6 +\n drivers/crypto/cnxk/cnxk_cryptodev_ops.h | 28 +++\n drivers/crypto/cnxk/meson.build | 2 +-\n drivers/crypto/cnxk/version.map | 5 +\n 5 files changed, 205 insertions(+), 71 deletions(-)", "diff": "diff --git a/drivers/crypto/cnxk/cn9k_cryptodev_ops.c b/drivers/crypto/cnxk/cn9k_cryptodev_ops.c\nindex 724965be5b..08f08c8339 100644\n--- a/drivers/crypto/cnxk/cn9k_cryptodev_ops.c\n+++ b/drivers/crypto/cnxk/cn9k_cryptodev_ops.c\n@@ -4,6 +4,7 @@\n \n #include <rte_cryptodev.h>\n #include <rte_cryptodev_pmd.h>\n+#include <rte_event_crypto_adapter.h>\n \n #include \"cn9k_cryptodev.h\"\n #include \"cn9k_cryptodev_ops.h\"\n@@ -62,27 +63,94 @@ cn9k_cpt_sym_temp_sess_create(struct cnxk_cpt_qp *qp, struct rte_crypto_op *op)\n \treturn NULL;\n }\n \n+static inline int\n+cn9k_cpt_prepare_instruction(struct cnxk_cpt_qp *qp, struct rte_crypto_op *op,\n+\t\t\t struct cpt_inflight_req *infl_req,\n+\t\t\t struct cpt_inst_s *inst)\n+{\n+\tint ret;\n+\n+\tif (op->type == RTE_CRYPTO_OP_TYPE_SYMMETRIC) {\n+\t\tstruct rte_crypto_sym_op *sym_op;\n+\t\tstruct cnxk_se_sess *sess;\n+\n+\t\tif (op->sess_type == RTE_CRYPTO_OP_WITH_SESSION) {\n+\t\t\tsym_op = op->sym;\n+\t\t\tsess = get_sym_session_private_data(\n+\t\t\t\tsym_op->session, cn9k_cryptodev_driver_id);\n+\t\t\tret = cn9k_cpt_sym_inst_fill(qp, op, sess, infl_req,\n+\t\t\t\t\t\t inst);\n+\t\t} else {\n+\t\t\tsess = cn9k_cpt_sym_temp_sess_create(qp, op);\n+\t\t\tif (unlikely(sess == NULL)) {\n+\t\t\t\tplt_dp_err(\"Could not create temp session\");\n+\t\t\t\treturn -1;\n+\t\t\t}\n+\n+\t\t\tret = cn9k_cpt_sym_inst_fill(qp, op, sess, infl_req,\n+\t\t\t\t\t\t inst);\n+\t\t\tif (unlikely(ret)) {\n+\t\t\t\tsym_session_clear(cn9k_cryptodev_driver_id,\n+\t\t\t\t\t\t op->sym->session);\n+\t\t\t\trte_mempool_put(qp->sess_mp, op->sym->session);\n+\t\t\t}\n+\t\t}\n+\t\tinst->w7.u64 = sess->cpt_inst_w7;\n+\t} else if (op->type == RTE_CRYPTO_OP_TYPE_ASYMMETRIC) {\n+\t\tstruct rte_crypto_asym_op *asym_op;\n+\t\tstruct cnxk_ae_sess *sess;\n+\n+\t\tif (op->sess_type == RTE_CRYPTO_OP_WITH_SESSION) {\n+\t\t\tasym_op = op->asym;\n+\t\t\tsess = get_asym_session_private_data(\n+\t\t\t\tasym_op->session, cn9k_cryptodev_driver_id);\n+\t\t\tret = cnxk_ae_enqueue(qp, op, infl_req, inst, sess);\n+\t\t\tinst->w7.u64 = sess->cpt_inst_w7;\n+\t\t} else {\n+\t\t\tret = -EINVAL;\n+\t\t}\n+\t} else {\n+\t\tret = -EINVAL;\n+\t\tplt_dp_err(\"Unsupported op type\");\n+\t}\n+\n+\treturn ret;\n+}\n+\n+static inline void\n+cn9k_cpt_submit_instruction(struct cpt_inst_s *inst, uint64_t lmtline,\n+\t\t\t uint64_t io_addr)\n+{\n+\tuint64_t lmt_status;\n+\n+\tdo {\n+\t\t/* Copy CPT command to LMTLINE */\n+\t\troc_lmt_mov((void *)lmtline, inst, 2);\n+\n+\t\t/*\n+\t\t * Make sure compiler does not reorder memcpy and ldeor.\n+\t\t * LMTST transactions are always flushed from the write\n+\t\t * buffer immediately, a DMB is not required to push out\n+\t\t * LMTSTs.\n+\t\t */\n+\t\trte_io_wmb();\n+\t\tlmt_status = roc_lmt_submit_ldeor(io_addr);\n+\t} while (lmt_status == 0);\n+}\n+\n static uint16_t\n cn9k_cpt_enqueue_burst(void *qptr, struct rte_crypto_op **ops, uint16_t nb_ops)\n {\n \tstruct cpt_inflight_req *infl_req;\n-\tstruct rte_crypto_asym_op *asym_op;\n-\tstruct rte_crypto_sym_op *sym_op;\n \tuint16_t nb_allowed, count = 0;\n \tstruct cnxk_cpt_qp *qp = qptr;\n \tstruct pending_queue *pend_q;\n \tstruct rte_crypto_op *op;\n \tstruct cpt_inst_s inst;\n-\tuint64_t lmt_status;\n-\tuint64_t lmtline;\n-\tuint64_t io_addr;\n \tint ret;\n \n \tpend_q = &qp->pend_q;\n \n-\tlmtline = qp->lmtline.lmt_base;\n-\tio_addr = qp->lmtline.io_addr;\n-\n \tinst.w0.u64 = 0;\n \tinst.w2.u64 = 0;\n \tinst.w3.u64 = 0;\n@@ -95,77 +163,18 @@ cn9k_cpt_enqueue_burst(void *qptr, struct rte_crypto_op **ops, uint16_t nb_ops)\n \t\tinfl_req = &pend_q->req_queue[pend_q->enq_tail];\n \t\tinfl_req->op_flags = 0;\n \n-\t\tif (op->type == RTE_CRYPTO_OP_TYPE_SYMMETRIC) {\n-\t\t\tstruct cnxk_se_sess *sess;\n-\n-\t\t\tif (op->sess_type == RTE_CRYPTO_OP_WITH_SESSION) {\n-\t\t\t\tsym_op = op->sym;\n-\t\t\t\tsess = get_sym_session_private_data(\n-\t\t\t\t\tsym_op->session,\n-\t\t\t\t\tcn9k_cryptodev_driver_id);\n-\t\t\t\tret = cn9k_cpt_sym_inst_fill(qp, op, sess,\n-\t\t\t\t\t\t\t infl_req, &inst);\n-\t\t\t} else {\n-\t\t\t\tsess = cn9k_cpt_sym_temp_sess_create(qp, op);\n-\t\t\t\tif (unlikely(sess == NULL)) {\n-\t\t\t\t\tplt_dp_err(\n-\t\t\t\t\t\t\"Could not create temp session\");\n-\t\t\t\t\tbreak;\n-\t\t\t\t}\n-\n-\t\t\t\tret = cn9k_cpt_sym_inst_fill(qp, op, sess,\n-\t\t\t\t\t\t\t infl_req, &inst);\n-\t\t\t\tif (unlikely(ret)) {\n-\t\t\t\t\tsym_session_clear(\n-\t\t\t\t\t\tcn9k_cryptodev_driver_id,\n-\t\t\t\t\t\top->sym->session);\n-\t\t\t\t\trte_mempool_put(qp->sess_mp,\n-\t\t\t\t\t\t\top->sym->session);\n-\t\t\t\t}\n-\t\t\t}\n-\t\t\tinst.w7.u64 = sess->cpt_inst_w7;\n-\t\t} else if (op->type == RTE_CRYPTO_OP_TYPE_ASYMMETRIC) {\n-\t\t\tstruct cnxk_ae_sess *sess;\n-\n-\t\t\tret = -EINVAL;\n-\t\t\tif (op->sess_type == RTE_CRYPTO_OP_WITH_SESSION) {\n-\t\t\t\tasym_op = op->asym;\n-\t\t\t\tsess = get_asym_session_private_data(\n-\t\t\t\t\tasym_op->session,\n-\t\t\t\t\tcn9k_cryptodev_driver_id);\n-\t\t\t\tret = cnxk_ae_enqueue(qp, op, infl_req, &inst,\n-\t\t\t\t\t\t sess);\n-\t\t\t\tinst.w7.u64 = sess->cpt_inst_w7;\n-\t\t\t}\n-\t\t} else {\n-\t\t\tplt_dp_err(\"Unsupported op type\");\n-\t\t\tbreak;\n-\t\t}\n-\n+\t\tret = cn9k_cpt_prepare_instruction(qp, op, infl_req, &inst);\n \t\tif (unlikely(ret)) {\n \t\t\tplt_dp_err(\"Could not process op: %p\", op);\n \t\t\tbreak;\n \t\t}\n \n \t\tinfl_req->cop = op;\n-\n \t\tinfl_req->res.cn9k.compcode = CPT_COMP_NOT_DONE;\n \t\tinst.res_addr = (uint64_t)&infl_req->res;\n \n-\t\tdo {\n-\t\t\t/* Copy CPT command to LMTLINE */\n-\t\t\tmemcpy((void *)lmtline, &inst, sizeof(inst));\n-\n-\t\t\t/*\n-\t\t\t * Make sure compiler does not reorder memcpy and ldeor.\n-\t\t\t * LMTST transactions are always flushed from the write\n-\t\t\t * buffer immediately, a DMB is not required to push out\n-\t\t\t * LMTSTs.\n-\t\t\t */\n-\t\t\trte_io_wmb();\n-\t\t\tlmt_status = roc_lmt_submit_ldeor(io_addr);\n-\t\t} while (lmt_status == 0);\n-\n+\t\tcn9k_cpt_submit_instruction(&inst, qp->lmtline.lmt_base,\n+\t\t\t\t\t qp->lmtline.io_addr);\n \t\tMOD_INC(pend_q->enq_tail, qp->lf.nb_desc);\n \t}\n \n@@ -176,6 +185,72 @@ cn9k_cpt_enqueue_burst(void *qptr, struct rte_crypto_op **ops, uint16_t nb_ops)\n \treturn count;\n }\n \n+uint16_t\n+cn9k_cpt_crypto_adapter_enqueue(uintptr_t tag_op, struct rte_crypto_op *op)\n+{\n+\tunion rte_event_crypto_metadata *ec_mdata;\n+\tstruct cpt_inflight_req *infl_req;\n+\tstruct rte_event *rsp_info;\n+\tstruct cnxk_cpt_qp *qp;\n+\tstruct cpt_inst_s inst;\n+\tuint8_t cdev_id;\n+\tuint16_t qp_id;\n+\tint ret;\n+\n+\tec_mdata = cnxk_event_crypto_mdata_get(op);\n+\tif (!ec_mdata) {\n+\t\trte_errno = EINVAL;\n+\t\treturn 0;\n+\t}\n+\n+\tcdev_id = ec_mdata->request_info.cdev_id;\n+\tqp_id = ec_mdata->request_info.queue_pair_id;\n+\tqp = rte_cryptodevs[cdev_id].data->queue_pairs[qp_id];\n+\trsp_info = &ec_mdata->response_info;\n+\n+\tif (unlikely(!qp->ca.enabled)) {\n+\t\trte_errno = EINVAL;\n+\t\treturn 0;\n+\t}\n+\n+\tif (unlikely(rte_mempool_get(qp->ca.req_mp, (void **)&infl_req))) {\n+\t\trte_errno = ENOMEM;\n+\t\treturn 0;\n+\t}\n+\tinfl_req->op_flags = 0;\n+\n+\tret = cn9k_cpt_prepare_instruction(qp, op, infl_req, &inst);\n+\tif (unlikely(ret)) {\n+\t\tplt_dp_err(\"Could not process op: %p\", op);\n+\t\trte_mempool_put(qp->ca.req_mp, infl_req);\n+\t\treturn 0;\n+\t}\n+\n+\tinfl_req->cop = op;\n+\tinfl_req->res.cn9k.compcode = CPT_COMP_NOT_DONE;\n+\tinfl_req->qp = qp;\n+\tinst.w0.u64 = 0;\n+\tinst.res_addr = (uint64_t)&infl_req->res;\n+\tinst.w2.u64 = CNXK_CPT_INST_W2(\n+\t\t(RTE_EVENT_TYPE_CRYPTODEV << 28) | rsp_info->flow_id,\n+\t\trsp_info->sched_type, rsp_info->queue_id, 0);\n+\tinst.w3.u64 = CNXK_CPT_INST_W3(1, infl_req);\n+\n+\tif (roc_cpt_is_iq_full(&qp->lf)) {\n+\t\trte_mempool_put(qp->ca.req_mp, infl_req);\n+\t\trte_errno = EAGAIN;\n+\t\treturn 0;\n+\t}\n+\n+\tif (!rsp_info->sched_type)\n+\t\troc_sso_hws_head_wait(tag_op);\n+\n+\tcn9k_cpt_submit_instruction(&inst, qp->lmtline.lmt_base,\n+\t\t\t\t qp->lmtline.io_addr);\n+\n+\treturn 1;\n+}\n+\n static inline void\n cn9k_cpt_dequeue_post_process(struct cnxk_cpt_qp *qp, struct rte_crypto_op *cop,\n \t\t\t struct cpt_inflight_req *infl_req)\n@@ -249,6 +324,26 @@ cn9k_cpt_dequeue_post_process(struct cnxk_cpt_qp *qp, struct rte_crypto_op *cop,\n \t}\n }\n \n+uintptr_t\n+cn9k_cpt_crypto_adapter_dequeue(uintptr_t get_work1)\n+{\n+\tstruct cpt_inflight_req *infl_req;\n+\tstruct rte_crypto_op *cop;\n+\tstruct cnxk_cpt_qp *qp;\n+\n+\tinfl_req = (struct cpt_inflight_req *)(get_work1);\n+\tcop = infl_req->cop;\n+\tqp = infl_req->qp;\n+\n+\tcn9k_cpt_dequeue_post_process(qp, infl_req->cop, infl_req);\n+\n+\tif (unlikely(infl_req->op_flags & CPT_OP_FLAGS_METABUF))\n+\t\trte_mempool_put(qp->meta_info.pool, infl_req->mdata);\n+\n+\trte_mempool_put(qp->ca.req_mp, infl_req);\n+\treturn (uintptr_t)cop;\n+}\n+\n static uint16_t\n cn9k_cpt_dequeue_burst(void *qptr, struct rte_crypto_op **ops, uint16_t nb_ops)\n {\ndiff --git a/drivers/crypto/cnxk/cn9k_cryptodev_ops.h b/drivers/crypto/cnxk/cn9k_cryptodev_ops.h\nindex 2277f6bcfb..1255de33ae 100644\n--- a/drivers/crypto/cnxk/cn9k_cryptodev_ops.h\n+++ b/drivers/crypto/cnxk/cn9k_cryptodev_ops.h\n@@ -11,4 +11,10 @@ extern struct rte_cryptodev_ops cn9k_cpt_ops;\n \n void cn9k_cpt_set_enqdeq_fns(struct rte_cryptodev *dev);\n \n+__rte_internal\n+uint16_t cn9k_cpt_crypto_adapter_enqueue(uintptr_t tag_op,\n+\t\t\t\t\t struct rte_crypto_op *op);\n+__rte_internal\n+uintptr_t cn9k_cpt_crypto_adapter_dequeue(uintptr_t get_work1);\n+\n #endif /* _CN9K_CRYPTODEV_OPS_H_ */\ndiff --git a/drivers/crypto/cnxk/cnxk_cryptodev_ops.h b/drivers/crypto/cnxk/cnxk_cryptodev_ops.h\nindex 22dc2ab78d..0d02d44799 100644\n--- a/drivers/crypto/cnxk/cnxk_cryptodev_ops.h\n+++ b/drivers/crypto/cnxk/cnxk_cryptodev_ops.h\n@@ -6,6 +6,7 @@\n #define _CNXK_CRYPTODEV_OPS_H_\n \n #include <rte_cryptodev.h>\n+#include <rte_event_crypto_adapter.h>\n \n #include \"roc_api.h\"\n \n@@ -16,6 +17,13 @@\n \n #define MOD_INC(i, l) ((i) == (l - 1) ? (i) = 0 : (i)++)\n \n+/* Macros to form words in CPT instruction */\n+#define CNXK_CPT_INST_W2(tag, tt, grp, rvu_pf_func) \\\n+\t((tag) | ((uint64_t)(tt) << 32) | ((uint64_t)(grp) << 34) | \\\n+\t ((uint64_t)(rvu_pf_func) << 48))\n+#define CNXK_CPT_INST_W3(qord, wqe_ptr) \\\n+\t(qord | ((uintptr_t)(wqe_ptr) >> 3) << 3)\n+\n struct cpt_qp_meta_info {\n \tstruct rte_mempool *pool;\n \tint mlen;\n@@ -40,6 +48,7 @@ struct cpt_inflight_req {\n \tstruct rte_crypto_op *cop;\n \tvoid *mdata;\n \tuint8_t op_flags;\n+\tvoid *qp;\n } __rte_aligned(16);\n \n struct pending_queue {\n@@ -122,4 +131,23 @@ int cnxk_ae_session_cfg(struct rte_cryptodev *dev,\n \t\t\tstruct rte_crypto_asym_xform *xform,\n \t\t\tstruct rte_cryptodev_asym_session *sess,\n \t\t\tstruct rte_mempool *pool);\n+\n+static inline union rte_event_crypto_metadata *\n+cnxk_event_crypto_mdata_get(struct rte_crypto_op *op)\n+{\n+\tunion rte_event_crypto_metadata *ec_mdata;\n+\n+\tif (op->sess_type == RTE_CRYPTO_OP_WITH_SESSION)\n+\t\tec_mdata = rte_cryptodev_sym_session_get_user_data(\n+\t\t\top->sym->session);\n+\telse if (op->sess_type == RTE_CRYPTO_OP_SESSIONLESS &&\n+\t\t op->private_data_offset)\n+\t\tec_mdata = (union rte_event_crypto_metadata\n+\t\t\t\t *)((uint8_t *)op + op->private_data_offset);\n+\telse\n+\t\treturn NULL;\n+\n+\treturn ec_mdata;\n+}\n+\n #endif /* _CNXK_CRYPTODEV_OPS_H_ */\ndiff --git a/drivers/crypto/cnxk/meson.build b/drivers/crypto/cnxk/meson.build\nindex c56d6cf35d..e076783629 100644\n--- a/drivers/crypto/cnxk/meson.build\n+++ b/drivers/crypto/cnxk/meson.build\n@@ -20,6 +20,6 @@ sources = files(\n 'cnxk_cryptodev_sec.c',\n )\n \n-deps += ['bus_pci', 'common_cnxk', 'security']\n+deps += ['bus_pci', 'common_cnxk', 'security', 'eventdev']\n \n includes += include_directories('../../../lib/net')\ndiff --git a/drivers/crypto/cnxk/version.map b/drivers/crypto/cnxk/version.map\nindex ee80c51721..0817743947 100644\n--- a/drivers/crypto/cnxk/version.map\n+++ b/drivers/crypto/cnxk/version.map\n@@ -1,3 +1,8 @@\n INTERNAL {\n+\tglobal:\n+\n+\tcn9k_cpt_crypto_adapter_enqueue;\n+\tcn9k_cpt_crypto_adapter_dequeue;\n+\n \tlocal: *;\n };\n", "prefixes": [ "v2", "5/8" ] }