get:
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patch:
Update a patch.

put:
Update a patch.

GET /api/patches/98032/?format=api
HTTP 200 OK
Allow: GET, PUT, PATCH, HEAD, OPTIONS
Content-Type: application/json
Vary: Accept

{
    "id": 98032,
    "url": "http://patchwork.dpdk.org/api/patches/98032/?format=api",
    "web_url": "http://patchwork.dpdk.org/project/dpdk/patch/20210906055144.46801-3-haiyue.wang@intel.com/",
    "project": {
        "id": 1,
        "url": "http://patchwork.dpdk.org/api/projects/1/?format=api",
        "name": "DPDK",
        "link_name": "dpdk",
        "list_id": "dev.dpdk.org",
        "list_email": "dev@dpdk.org",
        "web_url": "http://core.dpdk.org",
        "scm_url": "git://dpdk.org/dpdk",
        "webscm_url": "http://git.dpdk.org/dpdk",
        "list_archive_url": "https://inbox.dpdk.org/dev",
        "list_archive_url_format": "https://inbox.dpdk.org/dev/{}",
        "commit_url_format": ""
    },
    "msgid": "<20210906055144.46801-3-haiyue.wang@intel.com>",
    "list_archive_url": "https://inbox.dpdk.org/dev/20210906055144.46801-3-haiyue.wang@intel.com",
    "date": "2021-09-06T05:51:42",
    "name": "[v2,2/4] common/iavf: add proto hdr field support for L4 checksum",
    "commit_ref": null,
    "pull_url": null,
    "state": "superseded",
    "archived": true,
    "hash": "6cc787c1446ffff3530f48f90f8e2fd1ed80f3b1",
    "submitter": {
        "id": 1044,
        "url": "http://patchwork.dpdk.org/api/people/1044/?format=api",
        "name": "Wang, Haiyue",
        "email": "haiyue.wang@intel.com"
    },
    "delegate": {
        "id": 1540,
        "url": "http://patchwork.dpdk.org/api/users/1540/?format=api",
        "username": "qzhan15",
        "first_name": "Qi",
        "last_name": "Zhang",
        "email": "qi.z.zhang@intel.com"
    },
    "mbox": "http://patchwork.dpdk.org/project/dpdk/patch/20210906055144.46801-3-haiyue.wang@intel.com/mbox/",
    "series": [
        {
            "id": 18692,
            "url": "http://patchwork.dpdk.org/api/series/18692/?format=api",
            "web_url": "http://patchwork.dpdk.org/project/dpdk/list/?series=18692",
            "date": "2021-09-06T05:51:40",
            "name": "iavf base code update",
            "version": 2,
            "mbox": "http://patchwork.dpdk.org/series/18692/mbox/"
        }
    ],
    "comments": "http://patchwork.dpdk.org/api/patches/98032/comments/",
    "check": "success",
    "checks": "http://patchwork.dpdk.org/api/patches/98032/checks/",
    "tags": {},
    "related": [],
    "headers": {
        "Return-Path": "<dev-bounces@dpdk.org>",
        "X-Original-To": "patchwork@inbox.dpdk.org",
        "Delivered-To": "patchwork@inbox.dpdk.org",
        "Received": [
            "from mails.dpdk.org (mails.dpdk.org [217.70.189.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id BE5ABA0C4D;\n\tMon,  6 Sep 2021 08:22:14 +0200 (CEST)",
            "from [217.70.189.124] (localhost [127.0.0.1])\n\tby mails.dpdk.org (Postfix) with ESMTP id E85F741109;\n\tMon,  6 Sep 2021 08:22:04 +0200 (CEST)",
            "from mga06.intel.com (mga06.intel.com [134.134.136.31])\n by mails.dpdk.org (Postfix) with ESMTP id 5C85041101\n for <dev@dpdk.org>; Mon,  6 Sep 2021 08:22:03 +0200 (CEST)",
            "from fmsmga003.fm.intel.com ([10.253.24.29])\n by orsmga104.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384;\n 05 Sep 2021 23:22:03 -0700",
            "from npg-dpdk-haiyue-2.sh.intel.com ([10.67.119.63])\n by FMSMGA003.fm.intel.com with ESMTP; 05 Sep 2021 23:22:01 -0700"
        ],
        "X-IronPort-AV": [
            "E=McAfee;i=\"6200,9189,10098\"; a=\"280909335\"",
            "E=Sophos;i=\"5.85,271,1624345200\"; d=\"scan'208\";a=\"280909335\"",
            "E=Sophos;i=\"5.85,271,1624345200\"; d=\"scan'208\";a=\"536503959\""
        ],
        "X-ExtLoop1": "1",
        "From": "Haiyue Wang <haiyue.wang@intel.com>",
        "To": "dev@dpdk.org",
        "Cc": "Alvin Zhang <alvinx.zhang@intel.com>, Haiyue Wang <haiyue.wang@intel.com>,\n Jingjing Wu <jingjing.wu@intel.com>, Beilei Xing <beilei.xing@intel.com>",
        "Date": "Mon,  6 Sep 2021 13:51:42 +0800",
        "Message-Id": "<20210906055144.46801-3-haiyue.wang@intel.com>",
        "X-Mailer": "git-send-email 2.33.0",
        "In-Reply-To": "<20210906055144.46801-1-haiyue.wang@intel.com>",
        "References": "<20210817071652.9939-1-haiyue.wang@intel.com>\n <20210906055144.46801-1-haiyue.wang@intel.com>",
        "MIME-Version": "1.0",
        "Content-Transfer-Encoding": "8bit",
        "Subject": "[dpdk-dev] [PATCH v2 2/4] common/iavf: add proto hdr field support\n for L4 checksum",
        "X-BeenThere": "dev@dpdk.org",
        "X-Mailman-Version": "2.1.29",
        "Precedence": "list",
        "List-Id": "DPDK patches and discussions <dev.dpdk.org>",
        "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>",
        "List-Archive": "<http://mails.dpdk.org/archives/dev/>",
        "List-Post": "<mailto:dev@dpdk.org>",
        "List-Help": "<mailto:dev-request@dpdk.org?subject=help>",
        "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>",
        "Errors-To": "dev-bounces@dpdk.org",
        "Sender": "\"dev\" <dev-bounces@dpdk.org>"
    },
    "content": "From: Alvin Zhang <alvinx.zhang@intel.com>\n\nAdd TCP/UDP/SCTP header checksum field selectors, they can be used in\ncreating FDIR or RSS rules related to TCP/UDP/SCTP header checksum.\n\nSigned-off-by: Alvin Zhang <alvinx.zhang@intel.com>\nSigned-off-by: Haiyue Wang <haiyue.wang@intel.com>\n---\n drivers/common/iavf/virtchnl.h | 3 +++\n 1 file changed, 3 insertions(+)",
    "diff": "diff --git a/drivers/common/iavf/virtchnl.h b/drivers/common/iavf/virtchnl.h\nindex 9fa5e3e891..c56c668cff 100644\n--- a/drivers/common/iavf/virtchnl.h\n+++ b/drivers/common/iavf/virtchnl.h\n@@ -1598,14 +1598,17 @@ enum virtchnl_proto_hdr_field {\n \tVIRTCHNL_PROTO_HDR_TCP_SRC_PORT =\n \t\tPROTO_HDR_FIELD_START(VIRTCHNL_PROTO_HDR_TCP),\n \tVIRTCHNL_PROTO_HDR_TCP_DST_PORT,\n+\tVIRTCHNL_PROTO_HDR_TCP_CHKSUM,\n \t/* UDP */\n \tVIRTCHNL_PROTO_HDR_UDP_SRC_PORT =\n \t\tPROTO_HDR_FIELD_START(VIRTCHNL_PROTO_HDR_UDP),\n \tVIRTCHNL_PROTO_HDR_UDP_DST_PORT,\n+\tVIRTCHNL_PROTO_HDR_UDP_CHKSUM,\n \t/* SCTP */\n \tVIRTCHNL_PROTO_HDR_SCTP_SRC_PORT =\n \t\tPROTO_HDR_FIELD_START(VIRTCHNL_PROTO_HDR_SCTP),\n \tVIRTCHNL_PROTO_HDR_SCTP_DST_PORT,\n+\tVIRTCHNL_PROTO_HDR_SCTP_CHKSUM,\n \t/* GTPU_IP */\n \tVIRTCHNL_PROTO_HDR_GTPU_IP_TEID =\n \t\tPROTO_HDR_FIELD_START(VIRTCHNL_PROTO_HDR_GTPU_IP),\n",
    "prefixes": [
        "v2",
        "2/4"
    ]
}