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GET /api/patches/98041/?format=api
{ "id": 98041, "url": "http://patchwork.dpdk.org/api/patches/98041/?format=api", "web_url": "http://patchwork.dpdk.org/project/dpdk/patch/20210906075450.1452123-4-skori@marvell.com/", "project": { "id": 1, "url": "http://patchwork.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20210906075450.1452123-4-skori@marvell.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20210906075450.1452123-4-skori@marvell.com", "date": "2021-09-06T07:54:27", "name": "[04/27] common/cnxk: support RoC API to alloc bandwidth profiles", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": true, "hash": "4c21d9423fb46622af626c648afb1fba147b56be", "submitter": { "id": 1318, "url": "http://patchwork.dpdk.org/api/people/1318/?format=api", "name": "Sunil Kumar Kori", "email": "skori@marvell.com" }, "delegate": { "id": 310, "url": "http://patchwork.dpdk.org/api/users/310/?format=api", "username": "jerin", "first_name": "Jerin", "last_name": "Jacob", "email": "jerinj@marvell.com" }, "mbox": "http://patchwork.dpdk.org/project/dpdk/patch/20210906075450.1452123-4-skori@marvell.com/mbox/", "series": [ { "id": 18696, "url": "http://patchwork.dpdk.org/api/series/18696/?format=api", "web_url": "http://patchwork.dpdk.org/project/dpdk/list/?series=18696", "date": "2021-09-06T07:54:24", "name": "[01/27] common/cnxk: update policer MBOX APIs and HW definitions", "version": 1, "mbox": "http://patchwork.dpdk.org/series/18696/mbox/" } ], "comments": "http://patchwork.dpdk.org/api/patches/98041/comments/", "check": "success", "checks": "http://patchwork.dpdk.org/api/patches/98041/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from mails.dpdk.org (mails.dpdk.org [217.70.189.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id 5CFFCA0C4D;\n\tMon, 6 Sep 2021 09:55:18 +0200 (CEST)", "from [217.70.189.124] (localhost [127.0.0.1])\n\tby mails.dpdk.org (Postfix) with ESMTP id A31EF41102;\n\tMon, 6 Sep 2021 09:55:10 +0200 (CEST)", "from mx0b-0016f401.pphosted.com (mx0b-0016f401.pphosted.com\n [67.231.156.173])\n by mails.dpdk.org (Postfix) with ESMTP id 2DD2740E5A\n for <dev@dpdk.org>; Mon, 6 Sep 2021 09:55:09 +0200 (CEST)", "from pps.filterd (m0045851.ppops.net [127.0.0.1])\n by mx0b-0016f401.pphosted.com (8.16.1.2/8.16.1.2) with SMTP id\n 185NKWYC025766;\n Mon, 6 Sep 2021 00:55:07 -0700", "from dc5-exch02.marvell.com ([199.233.59.182])\n by mx0b-0016f401.pphosted.com with ESMTP id 3aw2sp1skc-1\n (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT);\n Mon, 06 Sep 2021 00:55:07 -0700", "from DC5-EXCH02.marvell.com (10.69.176.39) by DC5-EXCH02.marvell.com\n (10.69.176.39) with Microsoft SMTP Server (TLS) id 15.0.1497.18;\n Mon, 6 Sep 2021 00:55:05 -0700", "from maili.marvell.com (10.69.176.80) by DC5-EXCH02.marvell.com\n (10.69.176.39) with Microsoft SMTP Server id 15.0.1497.18 via Frontend\n Transport; Mon, 6 Sep 2021 00:55:05 -0700", "from localhost.localdomain (unknown [10.28.34.25])\n by maili.marvell.com (Postfix) with ESMTP id 456F03F70A3;\n Mon, 6 Sep 2021 00:55:03 -0700 (PDT)" ], "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com;\n h=from : to : cc :\n subject : date : message-id : in-reply-to : references : mime-version :\n content-transfer-encoding : content-type; s=pfpt0220;\n bh=Vu6Vjg+jgFGktT7J5PY1+S6//hYMWWmVszSjkgaULE4=;\n b=UrO5OHxe8wQRdEo0Y+/2ajaPQ9NgzIjWh3atFiZI1mBODFmF1C0oFtJVocn7zpD/j4pV\n H1h/8HGw2vJOFZkdnAom2td/GR03nBmOWCg9G7sQloSX/pFBoItIBn5xyqj9gYugUYyc\n eWFNXLxNh4+FdEopAxfGckciW+cbdP6XgVhT7tnnflgp6crUeb8KB9D+XN1XdEGmLegD\n uAkvg8ov0Nb1rqjR4/nLku3P8hmM9k7qQRQYVARvVTWT0FDmplgdG8rccqAz1qiU3zos\n YnSQg1l0z5Z8bG4ooCJu1jx0qHUs+ljXCJ0MTnBLyAG2tb7ubbnB6jCer+6czsoIOgdQ lw==", "From": "<skori@marvell.com>", "To": "Nithin Dabilpuram <ndabilpuram@marvell.com>, Kiran Kumar K\n <kirankumark@marvell.com>, Sunil Kumar Kori <skori@marvell.com>, Satha Rao\n <skoteshwar@marvell.com>, Ray Kinsella <mdr@ashroe.eu>", "CC": "<dev@dpdk.org>", "Date": "Mon, 6 Sep 2021 13:24:27 +0530", "Message-ID": "<20210906075450.1452123-4-skori@marvell.com>", "X-Mailer": "git-send-email 2.25.1", "In-Reply-To": "<20210906075450.1452123-1-skori@marvell.com>", "References": "<20210906075450.1452123-1-skori@marvell.com>", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit", "Content-Type": "text/plain", "X-Proofpoint-GUID": "muGGiyKSgoHOelcbFdk7cbGr1LeWpW33", "X-Proofpoint-ORIG-GUID": "muGGiyKSgoHOelcbFdk7cbGr1LeWpW33", "X-Proofpoint-Virus-Version": "vendor=baseguard\n engine=ICAP:2.0.182.1,Aquarius:18.0.790,Hydra:6.0.391,FMLib:17.0.607.475\n definitions=2021-09-06_02,2021-09-03_01,2020-04-07_01", "Subject": "[dpdk-dev] [PATCH 04/27] common/cnxk: support RoC API to alloc\n bandwidth profiles", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "From: Sunil Kumar Kori <skori@marvell.com>\n\nImplement RoC API to allocate HW resources i.e. bandwidth\nprofiles for policer processing on CN10K platform.\n\nSigned-off-by: Sunil Kumar Kori <skori@marvell.com>\n---\n drivers/common/cnxk/roc_nix.h | 11 ++++\n drivers/common/cnxk/roc_nix_bpf.c | 104 ++++++++++++++++++++++++++++++\n drivers/common/cnxk/version.map | 1 +\n 3 files changed, 116 insertions(+)", "diff": "diff --git a/drivers/common/cnxk/roc_nix.h b/drivers/common/cnxk/roc_nix.h\nindex e96328005e..2ce3ebbb5f 100644\n--- a/drivers/common/cnxk/roc_nix.h\n+++ b/drivers/common/cnxk/roc_nix.h\n@@ -6,6 +6,7 @@\n #define _ROC_NIX_H_\n \n /* Constants */\n+#define ROC_NIX_BPF_PER_PFFUNC\t 64\n #define ROC_NIX_BPF_LEVEL_IDX_INVALID 0xFF\n #define ROC_NIX_BPF_LEVEL_MAX\t 3\n \n@@ -38,6 +39,12 @@ enum roc_nix_bpf_level_flag {\n \tROC_NIX_BPF_LEVEL_F_TOP = BIT(2),\n };\n \n+struct roc_nix_bpf_objs {\n+\tuint16_t level;\n+\tuint16_t count;\n+\tuint16_t ids[ROC_NIX_BPF_PER_PFFUNC];\n+};\n+\n struct roc_nix_vlan_config {\n \tuint32_t type;\n \tunion {\n@@ -478,6 +485,10 @@ int __roc_api\n roc_nix_bpf_count_get(struct roc_nix *roc_nix, uint8_t lvl_mask,\n \t\t uint16_t count[ROC_NIX_BPF_LEVEL_MAX] /* Out */);\n \n+int __roc_api roc_nix_bpf_alloc(struct roc_nix *roc_nix, uint8_t lvl_mask,\n+\t\t\t\tuint16_t per_lvl_cnt[ROC_NIX_BPF_LEVEL_MAX],\n+\t\t\t\tstruct roc_nix_bpf_objs *profs /* Out */);\n+\n uint8_t __roc_api\n roc_nix_bpf_level_to_idx(enum roc_nix_bpf_level_flag lvl_flag);\n \ndiff --git a/drivers/common/cnxk/roc_nix_bpf.c b/drivers/common/cnxk/roc_nix_bpf.c\nindex af9dffa90c..06394bda07 100644\n--- a/drivers/common/cnxk/roc_nix_bpf.c\n+++ b/drivers/common/cnxk/roc_nix_bpf.c\n@@ -13,6 +13,19 @@\n \t(ROC_NIX_BPF_LEVEL_F_LEAF | ROC_NIX_BPF_LEVEL_F_MID | \\\n \t ROC_NIX_BPF_LEVEL_F_TOP)\n \n+static uint8_t sw_to_hw_lvl_map[] = {NIX_RX_BAND_PROF_LAYER_LEAF,\n+\t\t\t\t NIX_RX_BAND_PROF_LAYER_MIDDLE,\n+\t\t\t\t NIX_RX_BAND_PROF_LAYER_TOP};\n+\n+static inline struct mbox *\n+get_mbox(struct roc_nix *roc_nix)\n+{\n+\tstruct nix *nix = roc_nix_to_nix_priv(roc_nix);\n+\tstruct dev *dev = &nix->dev;\n+\n+\treturn dev->mbox;\n+}\n+\n uint8_t\n roc_nix_bpf_level_to_idx(enum roc_nix_bpf_level_flag level_f)\n {\n@@ -66,3 +79,94 @@ roc_nix_bpf_count_get(struct roc_nix *roc_nix, uint8_t lvl_mask,\n \n \treturn 0;\n }\n+\n+int\n+roc_nix_bpf_alloc(struct roc_nix *roc_nix, uint8_t lvl_mask,\n+\t\t uint16_t per_lvl_cnt[ROC_NIX_BPF_LEVEL_MAX],\n+\t\t struct roc_nix_bpf_objs *profs)\n+{\n+\tuint8_t mask = lvl_mask & NIX_BPF_LEVEL_F_MASK;\n+\tstruct mbox *mbox = get_mbox(roc_nix);\n+\tstruct nix_bandprof_alloc_req *req;\n+\tstruct nix_bandprof_alloc_rsp *rsp;\n+\tuint8_t leaf_idx, mid_idx, top_idx;\n+\tint rc = -ENOSPC, i;\n+\n+\tif (roc_model_is_cn9k())\n+\t\treturn NIX_ERR_HW_NOTSUP;\n+\n+\tif (!mask)\n+\t\treturn NIX_ERR_PARAM;\n+\n+\tleaf_idx = roc_nix_bpf_level_to_idx(mask & ROC_NIX_BPF_LEVEL_F_LEAF);\n+\tmid_idx = roc_nix_bpf_level_to_idx(mask & ROC_NIX_BPF_LEVEL_F_MID);\n+\ttop_idx = roc_nix_bpf_level_to_idx(mask & ROC_NIX_BPF_LEVEL_F_TOP);\n+\n+\tif ((leaf_idx != ROC_NIX_BPF_LEVEL_IDX_INVALID) &&\n+\t (per_lvl_cnt[leaf_idx] > NIX_MAX_BPF_COUNT_LEAF_LAYER))\n+\t\treturn NIX_ERR_INVALID_RANGE;\n+\n+\tif ((mid_idx != ROC_NIX_BPF_LEVEL_IDX_INVALID) &&\n+\t (per_lvl_cnt[mid_idx] > NIX_MAX_BPF_COUNT_MID_LAYER))\n+\t\treturn NIX_ERR_INVALID_RANGE;\n+\n+\tif ((top_idx != ROC_NIX_BPF_LEVEL_IDX_INVALID) &&\n+\t (per_lvl_cnt[top_idx] > NIX_MAX_BPF_COUNT_TOP_LAYER))\n+\t\treturn NIX_ERR_INVALID_RANGE;\n+\n+\treq = mbox_alloc_msg_nix_bandprof_alloc(mbox);\n+\tif (req == NULL)\n+\t\tgoto exit;\n+\n+\tif (leaf_idx != ROC_NIX_BPF_LEVEL_IDX_INVALID) {\n+\t\treq->prof_count[sw_to_hw_lvl_map[leaf_idx]] =\n+\t\t\tper_lvl_cnt[leaf_idx];\n+\t}\n+\n+\tif (mid_idx != ROC_NIX_BPF_LEVEL_IDX_INVALID) {\n+\t\treq->prof_count[sw_to_hw_lvl_map[mid_idx]] =\n+\t\t\tper_lvl_cnt[mid_idx];\n+\t}\n+\n+\tif (top_idx != ROC_NIX_BPF_LEVEL_IDX_INVALID) {\n+\t\treq->prof_count[sw_to_hw_lvl_map[top_idx]] =\n+\t\t\tper_lvl_cnt[top_idx];\n+\t}\n+\n+\trc = mbox_process_msg(mbox, (void *)&rsp);\n+\tif (rc)\n+\t\tgoto exit;\n+\n+\tif (leaf_idx != ROC_NIX_BPF_LEVEL_IDX_INVALID) {\n+\t\tprofs[leaf_idx].level = leaf_idx;\n+\t\tprofs[leaf_idx].count =\n+\t\t\trsp->prof_count[sw_to_hw_lvl_map[leaf_idx]];\n+\t\tfor (i = 0; i < profs[leaf_idx].count; i++) {\n+\t\t\tprofs[leaf_idx].ids[i] =\n+\t\t\t\trsp->prof_idx[sw_to_hw_lvl_map[leaf_idx]][i];\n+\t\t}\n+\t}\n+\n+\tif (mid_idx != ROC_NIX_BPF_LEVEL_IDX_INVALID) {\n+\t\tprofs[mid_idx].level = mid_idx;\n+\t\tprofs[mid_idx].count =\n+\t\t\trsp->prof_count[sw_to_hw_lvl_map[mid_idx]];\n+\t\tfor (i = 0; i < profs[mid_idx].count; i++) {\n+\t\t\tprofs[mid_idx].ids[i] =\n+\t\t\t\trsp->prof_idx[sw_to_hw_lvl_map[mid_idx]][i];\n+\t\t}\n+\t}\n+\n+\tif (top_idx != ROC_NIX_BPF_LEVEL_IDX_INVALID) {\n+\t\tprofs[top_idx].level = top_idx;\n+\t\tprofs[top_idx].count =\n+\t\t\trsp->prof_count[sw_to_hw_lvl_map[top_idx]];\n+\t\tfor (i = 0; i < profs[top_idx].count; i++) {\n+\t\t\tprofs[top_idx].ids[i] =\n+\t\t\t\trsp->prof_idx[sw_to_hw_lvl_map[top_idx]][i];\n+\t\t}\n+\t}\n+\n+exit:\n+\treturn rc;\n+}\ndiff --git a/drivers/common/cnxk/version.map b/drivers/common/cnxk/version.map\nindex 7cae7dfc74..b7e1d4e8c8 100644\n--- a/drivers/common/cnxk/version.map\n+++ b/drivers/common/cnxk/version.map\n@@ -74,6 +74,7 @@ INTERNAL {\n \troc_model;\n \troc_se_auth_key_set;\n \troc_se_ciph_key_set;\n+\troc_nix_bpf_alloc;\n \troc_nix_bpf_count_get;\n \troc_nix_bpf_level_to_idx;\n \troc_nix_cq_dump;\n", "prefixes": [ "04/27" ] }