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GET /api/patches/98045/?format=api
{ "id": 98045, "url": "http://patchwork.dpdk.org/api/patches/98045/?format=api", "web_url": "http://patchwork.dpdk.org/project/dpdk/patch/20210906075450.1452123-8-skori@marvell.com/", "project": { "id": 1, "url": "http://patchwork.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20210906075450.1452123-8-skori@marvell.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20210906075450.1452123-8-skori@marvell.com", "date": "2021-09-06T07:54:31", "name": "[08/27] common/cnxk: support RoC API to dump bandwidth profile", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": true, "hash": "a81ca5370af6e5f3797551f9ee64970610e9976e", "submitter": { "id": 1318, "url": "http://patchwork.dpdk.org/api/people/1318/?format=api", "name": "Sunil Kumar Kori", "email": "skori@marvell.com" }, "delegate": { "id": 310, "url": "http://patchwork.dpdk.org/api/users/310/?format=api", "username": "jerin", "first_name": "Jerin", "last_name": "Jacob", "email": "jerinj@marvell.com" }, "mbox": "http://patchwork.dpdk.org/project/dpdk/patch/20210906075450.1452123-8-skori@marvell.com/mbox/", "series": [ { "id": 18696, "url": "http://patchwork.dpdk.org/api/series/18696/?format=api", "web_url": "http://patchwork.dpdk.org/project/dpdk/list/?series=18696", "date": "2021-09-06T07:54:24", "name": "[01/27] common/cnxk: update policer MBOX APIs and HW definitions", "version": 1, "mbox": "http://patchwork.dpdk.org/series/18696/mbox/" } ], "comments": "http://patchwork.dpdk.org/api/patches/98045/comments/", "check": "success", "checks": "http://patchwork.dpdk.org/api/patches/98045/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from mails.dpdk.org (mails.dpdk.org [217.70.189.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id 5D34AA0C4D;\n\tMon, 6 Sep 2021 09:55:42 +0200 (CEST)", "from [217.70.189.124] (localhost [127.0.0.1])\n\tby mails.dpdk.org (Postfix) with ESMTP id 1E57C41142;\n\tMon, 6 Sep 2021 09:55:20 +0200 (CEST)", "from mx0b-0016f401.pphosted.com (mx0b-0016f401.pphosted.com\n [67.231.156.173])\n by mails.dpdk.org (Postfix) with ESMTP id 5625A410ED\n for <dev@dpdk.org>; Mon, 6 Sep 2021 09:55:18 +0200 (CEST)", "from pps.filterd (m0045851.ppops.net [127.0.0.1])\n by mx0b-0016f401.pphosted.com (8.16.1.2/8.16.1.2) with SMTP id\n 185N0bDx022892;\n Mon, 6 Sep 2021 00:55:16 -0700", "from dc5-exch02.marvell.com ([199.233.59.182])\n by mx0b-0016f401.pphosted.com with ESMTP id 3aw2sp1sky-1\n (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT);\n Mon, 06 Sep 2021 00:55:16 -0700", "from DC5-EXCH02.marvell.com (10.69.176.39) by DC5-EXCH02.marvell.com\n (10.69.176.39) with Microsoft SMTP Server (TLS) id 15.0.1497.18;\n Mon, 6 Sep 2021 00:55:14 -0700", "from maili.marvell.com (10.69.176.80) by DC5-EXCH02.marvell.com\n (10.69.176.39) with Microsoft SMTP Server id 15.0.1497.18 via Frontend\n Transport; Mon, 6 Sep 2021 00:55:14 -0700", "from localhost.localdomain (unknown [10.28.34.25])\n by maili.marvell.com (Postfix) with ESMTP id 8EA8F3F7089;\n Mon, 6 Sep 2021 00:55:12 -0700 (PDT)" ], "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com;\n h=from : to : cc :\n subject : date : message-id : in-reply-to : references : mime-version :\n content-transfer-encoding : content-type; s=pfpt0220;\n bh=ruuvyfH2TpGl5a1o7QSvvKXvMHuv5DFQyLcrjKNsiW0=;\n b=jn9OutuM93GGTcjSDUIyPjgVir4FfWWxuCjMLwZld9aGFFaOqUEx1yW8UJxRYqecwiQJ\n GRJwbBN7xA0dexPdxOzXG2UempUsGTcu72T2Nq+z3yRTraEA9JTvlPMmt9KWF6lNxQwJ\n 2CYq/0kzcwWYd0vI1FDs9+VqC/LIef+nC7qbEtyPitcVmEdHuCSorp16k3TEiQSmuM8k\n QEY5mry7lDv/lRJaM+pijWv71TRTYwf/0sl4rbQzVTDJ2cu0LwwmuSjcvyQ+8Tyd5/KV\n FYwQXp+jB7QIzQfhnSU1Px2FJOyR2uFputGyvMs6/Hd09cfJxgo0q/4KjxkabYhqILi6 9g==", "From": "<skori@marvell.com>", "To": "Nithin Dabilpuram <ndabilpuram@marvell.com>, Kiran Kumar K\n <kirankumark@marvell.com>, Sunil Kumar Kori <skori@marvell.com>, Satha Rao\n <skoteshwar@marvell.com>, Ray Kinsella <mdr@ashroe.eu>", "CC": "<dev@dpdk.org>", "Date": "Mon, 6 Sep 2021 13:24:31 +0530", "Message-ID": "<20210906075450.1452123-8-skori@marvell.com>", "X-Mailer": "git-send-email 2.25.1", "In-Reply-To": "<20210906075450.1452123-1-skori@marvell.com>", "References": "<20210906075450.1452123-1-skori@marvell.com>", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit", "Content-Type": "text/plain", "X-Proofpoint-GUID": "lX2jcVvPZqMaTz9drU9Nc5JmOHfamHwR", "X-Proofpoint-ORIG-GUID": "lX2jcVvPZqMaTz9drU9Nc5JmOHfamHwR", "X-Proofpoint-Virus-Version": "vendor=baseguard\n engine=ICAP:2.0.182.1,Aquarius:18.0.790,Hydra:6.0.391,FMLib:17.0.607.475\n definitions=2021-09-06_02,2021-09-03_01,2020-04-07_01", "Subject": "[dpdk-dev] [PATCH 08/27] common/cnxk: support RoC API to dump\n bandwidth profile", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "From: Sunil Kumar Kori <skori@marvell.com>\n\nImplement RoC API to dump bandwidth profile on CN10K\nplatform.\n\nSigned-off-by: Sunil Kumar Kori <skori@marvell.com>\n---\n drivers/common/cnxk/roc_nix.h | 3 ++\n drivers/common/cnxk/roc_nix_bpf.c | 86 ++++++++++++++++++++++++++++++\n drivers/common/cnxk/roc_platform.h | 1 +\n drivers/common/cnxk/version.map | 1 +\n 4 files changed, 91 insertions(+)", "diff": "diff --git a/drivers/common/cnxk/roc_nix.h b/drivers/common/cnxk/roc_nix.h\nindex 478426ecc9..19c376e9c4 100644\n--- a/drivers/common/cnxk/roc_nix.h\n+++ b/drivers/common/cnxk/roc_nix.h\n@@ -607,6 +607,9 @@ int __roc_api roc_nix_bpf_config(struct roc_nix *roc_nix, uint16_t id,\n int __roc_api roc_nix_bpf_ena_dis(struct roc_nix *roc_nix, uint16_t id,\n \t\t\t\t struct roc_nix_rq *rq, bool enable);\n \n+int __roc_api roc_nix_bpf_dump(struct roc_nix *roc_nix, uint16_t id,\n+\t\t\t enum roc_nix_bpf_level_flag lvl_flag);\n+\n uint8_t __roc_api\n roc_nix_bpf_level_to_idx(enum roc_nix_bpf_level_flag lvl_flag);\n \ndiff --git a/drivers/common/cnxk/roc_nix_bpf.c b/drivers/common/cnxk/roc_nix_bpf.c\nindex fed6c03e9c..2b2be20491 100644\n--- a/drivers/common/cnxk/roc_nix_bpf.c\n+++ b/drivers/common/cnxk/roc_nix_bpf.c\n@@ -123,6 +123,60 @@ meter_burst_to_nix(uint64_t value, uint64_t *exponent_p, uint64_t *mantissa_p)\n \treturn METER_BURST(exponent, mantissa);\n }\n \n+static inline void\n+nix_lf_bpf_dump(__io struct nix_band_prof_s *bpf)\n+{\n+\tplt_dump(\"W0: cir_mantissa \\t\\t\\t%d\\nW0: pebs_mantissa \\t\\t\\t0x%03x\",\n+\t\t bpf->cir_mantissa, bpf->pebs_mantissa);\n+\tplt_dump(\"W0: peir_matissa \\t\\t\\t\\t%d\\nW0: cbs_exponent \\t\\t\\t%d\",\n+\t\t bpf->peir_mantissa, bpf->cbs_exponent);\n+\tplt_dump(\"W0: cir_exponent \\t\\t\\t%d\\nW0: pebs_exponent \\t\\t\\t%d\",\n+\t\t bpf->cir_exponent, bpf->pebs_exponent);\n+\tplt_dump(\"W0: peir_exponent \\t\\t\\t%d\\n\", bpf->peir_exponent);\n+\tplt_dump(\"W0: tnl_ena \\t\\t\\t%d\\n\", bpf->tnl_ena);\n+\tplt_dump(\"W0: icolor \\t\\t\\t%d\\n\", bpf->icolor);\n+\tplt_dump(\"W0: pc_mode \\t\\t\\t%d\\n\", bpf->pc_mode);\n+\tplt_dump(\"W1: hl_en \\t\\t%d\\nW1: band_prof_id \\t\\t%d\", bpf->hl_en,\n+\t\t bpf->band_prof_id);\n+\tplt_dump(\"W1: meter_algo \\t\\t%d\\nW1: rc_action \\t\\t%d\", bpf->meter_algo,\n+\t\t bpf->rc_action);\n+\tplt_dump(\"W1: yc_action \\t\\t\\t%d\\nW1: gc_action \\t\\t\\t%d\",\n+\t\t bpf->yc_action, bpf->gc_action);\n+\tplt_dump(\"W1: adjust_mantissa\\t\\t\\t%d\\nW1: adjust_exponent \\t\\t\\t%d\",\n+\t\t bpf->adjust_mantissa, bpf->adjust_exponent);\n+\tplt_dump(\"W1: rdiv \\t\\t\\t%d\\n\", bpf->rdiv);\n+\tplt_dump(\"W1: l_select \\t\\t%d\\nW2: lmode \\t\\t%d\", bpf->l_sellect,\n+\t\t bpf->lmode);\n+\tplt_dump(\"W1: cbs_mantissa \\t\\t\\t%d\\n\", bpf->cbs_mantissa);\n+\tplt_dump(\"W2: tsa \\t\\t\\t0x%\" PRIx64 \"\\n\", (uint64_t)bpf->ts);\n+\tplt_dump(\"W3: c_accum \\t\\t%d\\nW3: pe_accum \\t\\t%d\", bpf->c_accum,\n+\t\t bpf->pe_accum);\n+\tplt_dump(\"W4: green_pkt_pass \\t\\t\\t0x%\" PRIx64 \"\",\n+\t\t (uint64_t)bpf->green_pkt_pass);\n+\tplt_dump(\"W5: yellow_pkt_pass \\t\\t\\t0x%\" PRIx64 \"\",\n+\t\t (uint64_t)bpf->yellow_pkt_pass);\n+\tplt_dump(\"W6: red_pkt_pass \\t\\t\\t0x%\" PRIx64 \"\",\n+\t\t (uint64_t)bpf->red_pkt_pass);\n+\tplt_dump(\"W7: green_octs_pass \\t\\t\\t0x%\" PRIx64 \"\",\n+\t\t (uint64_t)bpf->green_octs_pass);\n+\tplt_dump(\"W8: yellow_octs_pass \\t\\t\\t0x%\" PRIx64 \"\",\n+\t\t (uint64_t)bpf->yellow_octs_pass);\n+\tplt_dump(\"W9: red_octs_pass \\t\\t\\t0x%\" PRIx64 \"\",\n+\t\t (uint64_t)bpf->red_octs_pass);\n+\tplt_dump(\"W10: green_pkt_drop \\t\\t\\t0x%\" PRIx64 \"\",\n+\t\t (uint64_t)bpf->green_pkt_drop);\n+\tplt_dump(\"W11: yellow_pkt_drop \\t\\t\\t0x%\" PRIx64 \"\",\n+\t\t (uint64_t)bpf->yellow_pkt_drop);\n+\tplt_dump(\"W12: red_pkt_drop \\t\\t\\t0x%\" PRIx64 \"\",\n+\t\t (uint64_t)bpf->red_pkt_drop);\n+\tplt_dump(\"W13: green_octs_drop \\t\\t\\t0x%\" PRIx64 \"\",\n+\t\t (uint64_t)bpf->green_octs_drop);\n+\tplt_dump(\"W14: yellow_octs_drop \\t\\t\\t0x%\" PRIx64 \"\",\n+\t\t (uint64_t)bpf->yellow_octs_drop);\n+\tplt_dump(\"W15: red_octs_drop \\t\\t\\t0x%\" PRIx64 \"\",\n+\t\t (uint64_t)bpf->red_octs_drop);\n+}\n+\n uint8_t\n roc_nix_bpf_level_to_idx(enum roc_nix_bpf_level_flag level_f)\n {\n@@ -469,3 +523,35 @@ roc_nix_bpf_ena_dis(struct roc_nix *roc_nix, uint16_t id, struct roc_nix_rq *rq,\n exit:\n \treturn rc;\n }\n+\n+int\n+roc_nix_bpf_dump(struct roc_nix *roc_nix, uint16_t id,\n+\t\t enum roc_nix_bpf_level_flag lvl_flag)\n+{\n+\tstruct mbox *mbox = get_mbox(roc_nix);\n+\tstruct nix_cn10k_aq_enq_rsp *rsp;\n+\tstruct nix_cn10k_aq_enq_req *aq;\n+\tuint8_t level_idx;\n+\tint rc;\n+\n+\tif (roc_model_is_cn9k())\n+\t\treturn NIX_ERR_HW_NOTSUP;\n+\n+\tlevel_idx = roc_nix_bpf_level_to_idx(lvl_flag);\n+\tif (level_idx == ROC_NIX_BPF_LEVEL_IDX_INVALID)\n+\t\treturn NIX_ERR_PARAM;\n+\n+\taq = mbox_alloc_msg_nix_cn10k_aq_enq(mbox);\n+\tif (aq == NULL)\n+\t\treturn -ENOSPC;\n+\taq->qidx = (sw_to_hw_lvl_map[level_idx] << 14 | id);\n+\taq->ctype = NIX_AQ_CTYPE_BAND_PROF;\n+\taq->op = NIX_AQ_INSTOP_READ;\n+\trc = mbox_process_msg(mbox, (void *)&rsp);\n+\tif (!rc) {\n+\t\tplt_dump(\"============= band prof id =%d ===============\", id);\n+\t\tnix_lf_bpf_dump(&rsp->prof);\n+\t}\n+\n+\treturn rc;\n+}\ndiff --git a/drivers/common/cnxk/roc_platform.h b/drivers/common/cnxk/roc_platform.h\nindex 285b24b82d..69b7c49d8b 100644\n--- a/drivers/common/cnxk/roc_platform.h\n+++ b/drivers/common/cnxk/roc_platform.h\n@@ -155,6 +155,7 @@ extern int cnxk_logtype_tm;\n #define plt_info(fmt, args...) RTE_LOG(INFO, PMD, fmt \"\\n\", ##args)\n #define plt_warn(fmt, args...) RTE_LOG(WARNING, PMD, fmt \"\\n\", ##args)\n #define plt_print(fmt, args...) RTE_LOG(INFO, PMD, fmt \"\\n\", ##args)\n+#define plt_dump(fmt, ...) fprintf(stderr, fmt \"\\n\", ##__VA_ARGS__)\n \n /**\n * Log debug message if given subsystem logging is enabled.\ndiff --git a/drivers/common/cnxk/version.map b/drivers/common/cnxk/version.map\nindex abde92ed09..a201f6a755 100644\n--- a/drivers/common/cnxk/version.map\n+++ b/drivers/common/cnxk/version.map\n@@ -77,6 +77,7 @@ INTERNAL {\n \troc_nix_bpf_alloc;\n \troc_nix_bpf_config;\n \troc_nix_bpf_count_get;\n+\troc_nix_bpf_dump;\n \troc_nix_bpf_ena_dis;\n \troc_nix_bpf_free;\n \troc_nix_bpf_free_all;\n", "prefixes": [ "08/27" ] }