Series Detail
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GET /api/series/17759/?format=api
http://patchwork.dpdk.org/api/series/17759/?format=api", "web_url": "http://patchwork.dpdk.org/project/dpdk/list/?series=17759", "project": { "id": 1, "url": "http://patchwork.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "name": "net/mlx5: insertion rate optimization", "date": "2021-07-12T01:46:29", "submitter": { "id": 1887, "url": "http://patchwork.dpdk.org/api/people/1887/?format=api", "name": "Suanming Mou", "email": "suanmingm@nvidia.com" }, "version": 5, "total": 26, "received_total": 26, "received_all": true, "mbox": "http://patchwork.dpdk.org/series/17759/mbox/", "cover_letter": { "id": 95658, "url": "http://patchwork.dpdk.org/api/covers/95658/?format=api", "web_url": "http://patchwork.dpdk.org/project/dpdk/cover/20210712014654.32428-1-suanmingm@nvidia.com/", "msgid": "<20210712014654.32428-1-suanmingm@nvidia.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20210712014654.32428-1-suanmingm@nvidia.com", "date": "2021-07-12T01:46:28", "name": "[v5,00/26] net/mlx5: insertion rate optimization", "mbox": "http://patchwork.dpdk.org/project/dpdk/cover/20210712014654.32428-1-suanmingm@nvidia.com/mbox/" }, "patches": [ { "id": 95657, "url": "http://patchwork.dpdk.org/api/patches/95657/?format=api", "web_url": "http://patchwork.dpdk.org/project/dpdk/patch/20210712014654.32428-2-suanmingm@nvidia.com/", "msgid": "<20210712014654.32428-2-suanmingm@nvidia.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20210712014654.32428-2-suanmingm@nvidia.com", "date": "2021-07-12T01:46:29", "name": "[v5,01/26] net/mlx5: allow limiting the index pool maximum index", "mbox": "http://patchwork.dpdk.org/project/dpdk/patch/20210712014654.32428-2-suanmingm@nvidia.com/mbox/" }, { "id": 95659, "url": "http://patchwork.dpdk.org/api/patches/95659/?format=api", "web_url": "http://patchwork.dpdk.org/project/dpdk/patch/20210712014654.32428-3-suanmingm@nvidia.com/", "msgid": "<20210712014654.32428-3-suanmingm@nvidia.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20210712014654.32428-3-suanmingm@nvidia.com", "date": "2021-07-12T01:46:30", "name": "[v5,02/26] net/mlx5: add indexed pool local cache", "mbox": "http://patchwork.dpdk.org/project/dpdk/patch/20210712014654.32428-3-suanmingm@nvidia.com/mbox/" }, { "id": 95660, "url": "http://patchwork.dpdk.org/api/patches/95660/?format=api", "web_url": "http://patchwork.dpdk.org/project/dpdk/patch/20210712014654.32428-4-suanmingm@nvidia.com/", "msgid": "<20210712014654.32428-4-suanmingm@nvidia.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20210712014654.32428-4-suanmingm@nvidia.com", "date": "2021-07-12T01:46:31", "name": "[v5,03/26] net/mlx5: add index pool foreach define", "mbox": "http://patchwork.dpdk.org/project/dpdk/patch/20210712014654.32428-4-suanmingm@nvidia.com/mbox/" }, { "id": 95661, "url": "http://patchwork.dpdk.org/api/patches/95661/?format=api", "web_url": "http://patchwork.dpdk.org/project/dpdk/patch/20210712014654.32428-5-suanmingm@nvidia.com/", "msgid": "<20210712014654.32428-5-suanmingm@nvidia.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20210712014654.32428-5-suanmingm@nvidia.com", "date": "2021-07-12T01:46:32", "name": "[v5,04/26] net/mlx5: support index pool non-lcore operations", "mbox": "http://patchwork.dpdk.org/project/dpdk/patch/20210712014654.32428-5-suanmingm@nvidia.com/mbox/" }, { "id": 95662, "url": "http://patchwork.dpdk.org/api/patches/95662/?format=api", "web_url": "http://patchwork.dpdk.org/project/dpdk/patch/20210712014654.32428-6-suanmingm@nvidia.com/", "msgid": "<20210712014654.32428-6-suanmingm@nvidia.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20210712014654.32428-6-suanmingm@nvidia.com", "date": "2021-07-12T01:46:33", "name": "[v5,05/26] net/mlx5: replace flow list with index pool", "mbox": "http://patchwork.dpdk.org/project/dpdk/patch/20210712014654.32428-6-suanmingm@nvidia.com/mbox/" }, { "id": 95663, "url": "http://patchwork.dpdk.org/api/patches/95663/?format=api", "web_url": "http://patchwork.dpdk.org/project/dpdk/patch/20210712014654.32428-7-suanmingm@nvidia.com/", "msgid": "<20210712014654.32428-7-suanmingm@nvidia.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20210712014654.32428-7-suanmingm@nvidia.com", "date": "2021-07-12T01:46:34", "name": "[v5,06/26] net/mlx5: optimize modify header action memory", "mbox": "http://patchwork.dpdk.org/project/dpdk/patch/20210712014654.32428-7-suanmingm@nvidia.com/mbox/" }, { "id": 95665, "url": "http://patchwork.dpdk.org/api/patches/95665/?format=api", "web_url": "http://patchwork.dpdk.org/project/dpdk/patch/20210712014654.32428-8-suanmingm@nvidia.com/", "msgid": "<20210712014654.32428-8-suanmingm@nvidia.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20210712014654.32428-8-suanmingm@nvidia.com", "date": "2021-07-12T01:46:35", "name": "[v5,07/26] net/mlx5: remove cache term from the list utility", "mbox": "http://patchwork.dpdk.org/project/dpdk/patch/20210712014654.32428-8-suanmingm@nvidia.com/mbox/" }, { "id": 95666, "url": "http://patchwork.dpdk.org/api/patches/95666/?format=api", "web_url": "http://patchwork.dpdk.org/project/dpdk/patch/20210712014654.32428-9-suanmingm@nvidia.com/", "msgid": "<20210712014654.32428-9-suanmingm@nvidia.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20210712014654.32428-9-suanmingm@nvidia.com", "date": "2021-07-12T01:46:36", "name": "[v5,08/26] net/mlx5: add per lcore cache to the list utility", "mbox": "http://patchwork.dpdk.org/project/dpdk/patch/20210712014654.32428-9-suanmingm@nvidia.com/mbox/" }, { "id": 95664, "url": "http://patchwork.dpdk.org/api/patches/95664/?format=api", "web_url": "http://patchwork.dpdk.org/project/dpdk/patch/20210712014654.32428-10-suanmingm@nvidia.com/", "msgid": "<20210712014654.32428-10-suanmingm@nvidia.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20210712014654.32428-10-suanmingm@nvidia.com", "date": "2021-07-12T01:46:37", "name": "[v5,09/26] net/mlx5: minimize list critical sections", "mbox": "http://patchwork.dpdk.org/project/dpdk/patch/20210712014654.32428-10-suanmingm@nvidia.com/mbox/" }, { "id": 95667, "url": "http://patchwork.dpdk.org/api/patches/95667/?format=api", "web_url": "http://patchwork.dpdk.org/project/dpdk/patch/20210712014654.32428-11-suanmingm@nvidia.com/", "msgid": "<20210712014654.32428-11-suanmingm@nvidia.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20210712014654.32428-11-suanmingm@nvidia.com", "date": "2021-07-12T01:46:38", "name": "[v5,10/26] net/mlx5: manage list cache entries release", "mbox": "http://patchwork.dpdk.org/project/dpdk/patch/20210712014654.32428-11-suanmingm@nvidia.com/mbox/" }, { "id": 95668, "url": "http://patchwork.dpdk.org/api/patches/95668/?format=api", "web_url": "http://patchwork.dpdk.org/project/dpdk/patch/20210712014654.32428-12-suanmingm@nvidia.com/", "msgid": "<20210712014654.32428-12-suanmingm@nvidia.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20210712014654.32428-12-suanmingm@nvidia.com", "date": "2021-07-12T01:46:39", "name": "[v5,11/26] net/mlx5: relax the list utility atomic operations", "mbox": "http://patchwork.dpdk.org/project/dpdk/patch/20210712014654.32428-12-suanmingm@nvidia.com/mbox/" }, { "id": 95671, "url": "http://patchwork.dpdk.org/api/patches/95671/?format=api", "web_url": "http://patchwork.dpdk.org/project/dpdk/patch/20210712014654.32428-13-suanmingm@nvidia.com/", "msgid": "<20210712014654.32428-13-suanmingm@nvidia.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20210712014654.32428-13-suanmingm@nvidia.com", "date": "2021-07-12T01:46:40", "name": "[v5,12/26] net/mlx5: allocate list memory by the create API", "mbox": "http://patchwork.dpdk.org/project/dpdk/patch/20210712014654.32428-13-suanmingm@nvidia.com/mbox/" }, { "id": 95669, "url": "http://patchwork.dpdk.org/api/patches/95669/?format=api", "web_url": "http://patchwork.dpdk.org/project/dpdk/patch/20210712014654.32428-14-suanmingm@nvidia.com/", "msgid": "<20210712014654.32428-14-suanmingm@nvidia.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20210712014654.32428-14-suanmingm@nvidia.com", "date": "2021-07-12T01:46:41", "name": "[v5,13/26] common/mlx5: move list utility to common", "mbox": "http://patchwork.dpdk.org/project/dpdk/patch/20210712014654.32428-14-suanmingm@nvidia.com/mbox/" }, { "id": 95670, "url": "http://patchwork.dpdk.org/api/patches/95670/?format=api", "web_url": "http://patchwork.dpdk.org/project/dpdk/patch/20210712014654.32428-15-suanmingm@nvidia.com/", "msgid": "<20210712014654.32428-15-suanmingm@nvidia.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20210712014654.32428-15-suanmingm@nvidia.com", "date": "2021-07-12T01:46:42", "name": "[v5,14/26] common/mlx5: add list lcore share", "mbox": "http://patchwork.dpdk.org/project/dpdk/patch/20210712014654.32428-15-suanmingm@nvidia.com/mbox/" }, { "id": 95672, "url": "http://patchwork.dpdk.org/api/patches/95672/?format=api", "web_url": "http://patchwork.dpdk.org/project/dpdk/patch/20210712014654.32428-16-suanmingm@nvidia.com/", "msgid": "<20210712014654.32428-16-suanmingm@nvidia.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20210712014654.32428-16-suanmingm@nvidia.com", "date": "2021-07-12T01:46:43", "name": "[v5,15/26] common/mlx5: call list callbacks with context", "mbox": "http://patchwork.dpdk.org/project/dpdk/patch/20210712014654.32428-16-suanmingm@nvidia.com/mbox/" }, { "id": 95674, "url": "http://patchwork.dpdk.org/api/patches/95674/?format=api", "web_url": "http://patchwork.dpdk.org/project/dpdk/patch/20210712014654.32428-17-suanmingm@nvidia.com/", "msgid": "<20210712014654.32428-17-suanmingm@nvidia.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20210712014654.32428-17-suanmingm@nvidia.com", "date": "2021-07-12T01:46:44", "name": "[v5,16/26] common/mlx5: add per-lcore cache to hash list utility", "mbox": "http://patchwork.dpdk.org/project/dpdk/patch/20210712014654.32428-17-suanmingm@nvidia.com/mbox/" }, { "id": 95673, "url": "http://patchwork.dpdk.org/api/patches/95673/?format=api", "web_url": "http://patchwork.dpdk.org/project/dpdk/patch/20210712014654.32428-18-suanmingm@nvidia.com/", "msgid": "<20210712014654.32428-18-suanmingm@nvidia.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20210712014654.32428-18-suanmingm@nvidia.com", "date": "2021-07-12T01:46:45", "name": "[v5,17/26] common/mlx5: allocate cache list memory individually", "mbox": "http://patchwork.dpdk.org/project/dpdk/patch/20210712014654.32428-18-suanmingm@nvidia.com/mbox/" }, { "id": 95675, "url": "http://patchwork.dpdk.org/api/patches/95675/?format=api", "web_url": "http://patchwork.dpdk.org/project/dpdk/patch/20210712014654.32428-19-suanmingm@nvidia.com/", "msgid": "<20210712014654.32428-19-suanmingm@nvidia.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20210712014654.32428-19-suanmingm@nvidia.com", "date": "2021-07-12T01:46:46", "name": "[v5,18/26] common/mlx5: optimize cache list object memory", "mbox": "http://patchwork.dpdk.org/project/dpdk/patch/20210712014654.32428-19-suanmingm@nvidia.com/mbox/" }, { "id": 95676, "url": "http://patchwork.dpdk.org/api/patches/95676/?format=api", "web_url": "http://patchwork.dpdk.org/project/dpdk/patch/20210712014654.32428-20-suanmingm@nvidia.com/", "msgid": "<20210712014654.32428-20-suanmingm@nvidia.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20210712014654.32428-20-suanmingm@nvidia.com", "date": "2021-07-12T01:46:47", "name": "[v5,19/26] common/mlx5: support list non-lcore operations", "mbox": "http://patchwork.dpdk.org/project/dpdk/patch/20210712014654.32428-20-suanmingm@nvidia.com/mbox/" }, { "id": 95678, "url": "http://patchwork.dpdk.org/api/patches/95678/?format=api", "web_url": "http://patchwork.dpdk.org/project/dpdk/patch/20210712014654.32428-21-suanmingm@nvidia.com/", "msgid": "<20210712014654.32428-21-suanmingm@nvidia.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20210712014654.32428-21-suanmingm@nvidia.com", "date": "2021-07-12T01:46:48", "name": "[v5,20/26] net/mlx5: move modify header allocator to ipool", "mbox": "http://patchwork.dpdk.org/project/dpdk/patch/20210712014654.32428-21-suanmingm@nvidia.com/mbox/" }, { "id": 95677, "url": "http://patchwork.dpdk.org/api/patches/95677/?format=api", "web_url": "http://patchwork.dpdk.org/project/dpdk/patch/20210712014654.32428-22-suanmingm@nvidia.com/", "msgid": "<20210712014654.32428-22-suanmingm@nvidia.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20210712014654.32428-22-suanmingm@nvidia.com", "date": "2021-07-12T01:46:49", "name": "[v5,21/26] net/mlx5: adjust the hash bucket size", "mbox": "http://patchwork.dpdk.org/project/dpdk/patch/20210712014654.32428-22-suanmingm@nvidia.com/mbox/" }, { "id": 95679, "url": "http://patchwork.dpdk.org/api/patches/95679/?format=api", "web_url": "http://patchwork.dpdk.org/project/dpdk/patch/20210712014654.32428-23-suanmingm@nvidia.com/", "msgid": "<20210712014654.32428-23-suanmingm@nvidia.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20210712014654.32428-23-suanmingm@nvidia.com", "date": "2021-07-12T01:46:50", "name": "[v5,22/26] net/mlx5: enable index pool per-core cache", "mbox": "http://patchwork.dpdk.org/project/dpdk/patch/20210712014654.32428-23-suanmingm@nvidia.com/mbox/" }, { "id": 95681, "url": "http://patchwork.dpdk.org/api/patches/95681/?format=api", "web_url": "http://patchwork.dpdk.org/project/dpdk/patch/20210712014654.32428-24-suanmingm@nvidia.com/", "msgid": "<20210712014654.32428-24-suanmingm@nvidia.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20210712014654.32428-24-suanmingm@nvidia.com", "date": "2021-07-12T01:46:51", "name": "[v5,23/26] net/mlx5: optimize hash list table allocate on demand", "mbox": "http://patchwork.dpdk.org/project/dpdk/patch/20210712014654.32428-24-suanmingm@nvidia.com/mbox/" }, { "id": 95680, "url": "http://patchwork.dpdk.org/api/patches/95680/?format=api", "web_url": "http://patchwork.dpdk.org/project/dpdk/patch/20210712014654.32428-25-suanmingm@nvidia.com/", "msgid": "<20210712014654.32428-25-suanmingm@nvidia.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20210712014654.32428-25-suanmingm@nvidia.com", "date": "2021-07-12T01:46:52", "name": "[v5,24/26] net/mlx5: change memory release configuration", "mbox": "http://patchwork.dpdk.org/project/dpdk/patch/20210712014654.32428-25-suanmingm@nvidia.com/mbox/" }, { "id": 95682, "url": "http://patchwork.dpdk.org/api/patches/95682/?format=api", "web_url": "http://patchwork.dpdk.org/project/dpdk/patch/20210712014654.32428-26-suanmingm@nvidia.com/", "msgid": "<20210712014654.32428-26-suanmingm@nvidia.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20210712014654.32428-26-suanmingm@nvidia.com", "date": "2021-07-12T01:46:53", "name": "[v5,25/26] net/mlx5: optimize Rx queue match", "mbox": "http://patchwork.dpdk.org/project/dpdk/patch/20210712014654.32428-26-suanmingm@nvidia.com/mbox/" }, { "id": 95683, "url": "http://patchwork.dpdk.org/api/patches/95683/?format=api", "web_url": "http://patchwork.dpdk.org/project/dpdk/patch/20210712014654.32428-27-suanmingm@nvidia.com/", "msgid": "<20210712014654.32428-27-suanmingm@nvidia.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20210712014654.32428-27-suanmingm@nvidia.com", "date": "2021-07-12T01:46:54", "name": "[v5,26/26] doc: add mlx5 multiple-thread flow insertion optimization", "mbox": "http://patchwork.dpdk.org/project/dpdk/patch/20210712014654.32428-27-suanmingm@nvidia.com/mbox/" } ] }{ "id": 17759, "url": "