Series Detail
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GET /api/series/17790/?format=api
http://patchwork.dpdk.org/api/series/17790/?format=api", "web_url": "http://patchwork.dpdk.org/project/dpdk/list/?series=17790", "project": { "id": 1, "url": "http://patchwork.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "name": "net/mlx5: insertion rate optimization", "date": "2021-07-13T08:44:34", "submitter": { "id": 1887, "url": "http://patchwork.dpdk.org/api/people/1887/?format=api", "name": "Suanming Mou", "email": "suanmingm@nvidia.com" }, "version": 6, "total": 26, "received_total": 26, "received_all": true, "mbox": "http://patchwork.dpdk.org/series/17790/mbox/", "cover_letter": { "id": 95731, "url": "http://patchwork.dpdk.org/api/covers/95731/?format=api", "web_url": "http://patchwork.dpdk.org/project/dpdk/cover/20210713084500.19964-1-suanmingm@nvidia.com/", "msgid": "<20210713084500.19964-1-suanmingm@nvidia.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20210713084500.19964-1-suanmingm@nvidia.com", "date": "2021-07-13T08:44:34", "name": "[v6,00/26] net/mlx5: insertion rate optimization", "mbox": "http://patchwork.dpdk.org/project/dpdk/cover/20210713084500.19964-1-suanmingm@nvidia.com/mbox/" }, "patches": [ { "id": 95732, "url": "http://patchwork.dpdk.org/api/patches/95732/?format=api", "web_url": "http://patchwork.dpdk.org/project/dpdk/patch/20210713084500.19964-2-suanmingm@nvidia.com/", "msgid": "<20210713084500.19964-2-suanmingm@nvidia.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20210713084500.19964-2-suanmingm@nvidia.com", "date": "2021-07-13T08:44:35", "name": "[v6,01/26] net/mlx5: allow limiting the index pool maximum index", "mbox": "http://patchwork.dpdk.org/project/dpdk/patch/20210713084500.19964-2-suanmingm@nvidia.com/mbox/" }, { "id": 95733, "url": "http://patchwork.dpdk.org/api/patches/95733/?format=api", "web_url": "http://patchwork.dpdk.org/project/dpdk/patch/20210713084500.19964-3-suanmingm@nvidia.com/", "msgid": "<20210713084500.19964-3-suanmingm@nvidia.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20210713084500.19964-3-suanmingm@nvidia.com", "date": "2021-07-13T08:44:36", "name": "[v6,02/26] net/mlx5: add indexed pool local cache", "mbox": "http://patchwork.dpdk.org/project/dpdk/patch/20210713084500.19964-3-suanmingm@nvidia.com/mbox/" }, { "id": 95734, "url": "http://patchwork.dpdk.org/api/patches/95734/?format=api", "web_url": "http://patchwork.dpdk.org/project/dpdk/patch/20210713084500.19964-4-suanmingm@nvidia.com/", "msgid": "<20210713084500.19964-4-suanmingm@nvidia.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20210713084500.19964-4-suanmingm@nvidia.com", "date": "2021-07-13T08:44:37", "name": "[v6,03/26] net/mlx5: add index pool foreach define", "mbox": "http://patchwork.dpdk.org/project/dpdk/patch/20210713084500.19964-4-suanmingm@nvidia.com/mbox/" }, { "id": 95735, "url": "http://patchwork.dpdk.org/api/patches/95735/?format=api", "web_url": "http://patchwork.dpdk.org/project/dpdk/patch/20210713084500.19964-5-suanmingm@nvidia.com/", "msgid": "<20210713084500.19964-5-suanmingm@nvidia.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20210713084500.19964-5-suanmingm@nvidia.com", "date": "2021-07-13T08:44:38", "name": "[v6,04/26] net/mlx5: support index pool non-lcore operations", "mbox": "http://patchwork.dpdk.org/project/dpdk/patch/20210713084500.19964-5-suanmingm@nvidia.com/mbox/" }, { "id": 95736, "url": "http://patchwork.dpdk.org/api/patches/95736/?format=api", "web_url": "http://patchwork.dpdk.org/project/dpdk/patch/20210713084500.19964-6-suanmingm@nvidia.com/", "msgid": "<20210713084500.19964-6-suanmingm@nvidia.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20210713084500.19964-6-suanmingm@nvidia.com", "date": "2021-07-13T08:44:39", "name": "[v6,05/26] net/mlx5: replace flow list with index pool", "mbox": "http://patchwork.dpdk.org/project/dpdk/patch/20210713084500.19964-6-suanmingm@nvidia.com/mbox/" }, { "id": 95737, "url": "http://patchwork.dpdk.org/api/patches/95737/?format=api", "web_url": "http://patchwork.dpdk.org/project/dpdk/patch/20210713084500.19964-7-suanmingm@nvidia.com/", "msgid": "<20210713084500.19964-7-suanmingm@nvidia.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20210713084500.19964-7-suanmingm@nvidia.com", "date": "2021-07-13T08:44:40", "name": "[v6,06/26] net/mlx5: optimize modify header action memory", "mbox": "http://patchwork.dpdk.org/project/dpdk/patch/20210713084500.19964-7-suanmingm@nvidia.com/mbox/" }, { "id": 95738, "url": "http://patchwork.dpdk.org/api/patches/95738/?format=api", "web_url": "http://patchwork.dpdk.org/project/dpdk/patch/20210713084500.19964-8-suanmingm@nvidia.com/", "msgid": "<20210713084500.19964-8-suanmingm@nvidia.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20210713084500.19964-8-suanmingm@nvidia.com", "date": "2021-07-13T08:44:41", "name": "[v6,07/26] net/mlx5: remove cache term from the list utility", "mbox": "http://patchwork.dpdk.org/project/dpdk/patch/20210713084500.19964-8-suanmingm@nvidia.com/mbox/" }, { "id": 95739, "url": "http://patchwork.dpdk.org/api/patches/95739/?format=api", "web_url": "http://patchwork.dpdk.org/project/dpdk/patch/20210713084500.19964-9-suanmingm@nvidia.com/", "msgid": "<20210713084500.19964-9-suanmingm@nvidia.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20210713084500.19964-9-suanmingm@nvidia.com", "date": "2021-07-13T08:44:42", "name": "[v6,08/26] net/mlx5: add per lcore cache to the list utility", "mbox": "http://patchwork.dpdk.org/project/dpdk/patch/20210713084500.19964-9-suanmingm@nvidia.com/mbox/" }, { "id": 95740, "url": "http://patchwork.dpdk.org/api/patches/95740/?format=api", "web_url": "http://patchwork.dpdk.org/project/dpdk/patch/20210713084500.19964-10-suanmingm@nvidia.com/", "msgid": "<20210713084500.19964-10-suanmingm@nvidia.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20210713084500.19964-10-suanmingm@nvidia.com", "date": "2021-07-13T08:44:43", "name": "[v6,09/26] net/mlx5: minimize list critical sections", "mbox": "http://patchwork.dpdk.org/project/dpdk/patch/20210713084500.19964-10-suanmingm@nvidia.com/mbox/" }, { "id": 95741, "url": "http://patchwork.dpdk.org/api/patches/95741/?format=api", "web_url": "http://patchwork.dpdk.org/project/dpdk/patch/20210713084500.19964-11-suanmingm@nvidia.com/", "msgid": "<20210713084500.19964-11-suanmingm@nvidia.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20210713084500.19964-11-suanmingm@nvidia.com", "date": "2021-07-13T08:44:44", "name": "[v6,10/26] net/mlx5: manage list cache entries release", "mbox": "http://patchwork.dpdk.org/project/dpdk/patch/20210713084500.19964-11-suanmingm@nvidia.com/mbox/" }, { "id": 95742, "url": "http://patchwork.dpdk.org/api/patches/95742/?format=api", "web_url": "http://patchwork.dpdk.org/project/dpdk/patch/20210713084500.19964-12-suanmingm@nvidia.com/", "msgid": "<20210713084500.19964-12-suanmingm@nvidia.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20210713084500.19964-12-suanmingm@nvidia.com", "date": "2021-07-13T08:44:45", "name": "[v6,11/26] net/mlx5: relax the list utility atomic operations", "mbox": "http://patchwork.dpdk.org/project/dpdk/patch/20210713084500.19964-12-suanmingm@nvidia.com/mbox/" }, { "id": 95743, "url": "http://patchwork.dpdk.org/api/patches/95743/?format=api", "web_url": "http://patchwork.dpdk.org/project/dpdk/patch/20210713084500.19964-13-suanmingm@nvidia.com/", "msgid": "<20210713084500.19964-13-suanmingm@nvidia.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20210713084500.19964-13-suanmingm@nvidia.com", "date": "2021-07-13T08:44:46", "name": "[v6,12/26] net/mlx5: allocate list memory by the create API", "mbox": "http://patchwork.dpdk.org/project/dpdk/patch/20210713084500.19964-13-suanmingm@nvidia.com/mbox/" }, { "id": 95745, "url": "http://patchwork.dpdk.org/api/patches/95745/?format=api", "web_url": "http://patchwork.dpdk.org/project/dpdk/patch/20210713084500.19964-14-suanmingm@nvidia.com/", "msgid": "<20210713084500.19964-14-suanmingm@nvidia.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20210713084500.19964-14-suanmingm@nvidia.com", "date": "2021-07-13T08:44:47", "name": "[v6,13/26] common/mlx5: move list utility to common", "mbox": "http://patchwork.dpdk.org/project/dpdk/patch/20210713084500.19964-14-suanmingm@nvidia.com/mbox/" }, { "id": 95744, "url": "http://patchwork.dpdk.org/api/patches/95744/?format=api", "web_url": "http://patchwork.dpdk.org/project/dpdk/patch/20210713084500.19964-15-suanmingm@nvidia.com/", "msgid": "<20210713084500.19964-15-suanmingm@nvidia.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20210713084500.19964-15-suanmingm@nvidia.com", "date": "2021-07-13T08:44:48", "name": "[v6,14/26] common/mlx5: add list lcore share", "mbox": "http://patchwork.dpdk.org/project/dpdk/patch/20210713084500.19964-15-suanmingm@nvidia.com/mbox/" }, { "id": 95746, "url": "http://patchwork.dpdk.org/api/patches/95746/?format=api", "web_url": "http://patchwork.dpdk.org/project/dpdk/patch/20210713084500.19964-16-suanmingm@nvidia.com/", "msgid": "<20210713084500.19964-16-suanmingm@nvidia.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20210713084500.19964-16-suanmingm@nvidia.com", "date": "2021-07-13T08:44:49", "name": "[v6,15/26] common/mlx5: call list callbacks with context", "mbox": "http://patchwork.dpdk.org/project/dpdk/patch/20210713084500.19964-16-suanmingm@nvidia.com/mbox/" }, { "id": 95748, "url": "http://patchwork.dpdk.org/api/patches/95748/?format=api", "web_url": "http://patchwork.dpdk.org/project/dpdk/patch/20210713084500.19964-17-suanmingm@nvidia.com/", "msgid": "<20210713084500.19964-17-suanmingm@nvidia.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20210713084500.19964-17-suanmingm@nvidia.com", "date": "2021-07-13T08:44:50", "name": "[v6,16/26] common/mlx5: add per-lcore cache to hash list utility", "mbox": "http://patchwork.dpdk.org/project/dpdk/patch/20210713084500.19964-17-suanmingm@nvidia.com/mbox/" }, { "id": 95747, "url": "http://patchwork.dpdk.org/api/patches/95747/?format=api", "web_url": "http://patchwork.dpdk.org/project/dpdk/patch/20210713084500.19964-18-suanmingm@nvidia.com/", "msgid": "<20210713084500.19964-18-suanmingm@nvidia.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20210713084500.19964-18-suanmingm@nvidia.com", "date": "2021-07-13T08:44:51", "name": "[v6,17/26] common/mlx5: allocate cache list memory individually", "mbox": "http://patchwork.dpdk.org/project/dpdk/patch/20210713084500.19964-18-suanmingm@nvidia.com/mbox/" }, { "id": 95750, "url": "http://patchwork.dpdk.org/api/patches/95750/?format=api", "web_url": "http://patchwork.dpdk.org/project/dpdk/patch/20210713084500.19964-19-suanmingm@nvidia.com/", "msgid": "<20210713084500.19964-19-suanmingm@nvidia.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20210713084500.19964-19-suanmingm@nvidia.com", "date": "2021-07-13T08:44:52", "name": "[v6,18/26] common/mlx5: optimize cache list object memory", "mbox": "http://patchwork.dpdk.org/project/dpdk/patch/20210713084500.19964-19-suanmingm@nvidia.com/mbox/" }, { "id": 95749, "url": "http://patchwork.dpdk.org/api/patches/95749/?format=api", "web_url": "http://patchwork.dpdk.org/project/dpdk/patch/20210713084500.19964-20-suanmingm@nvidia.com/", "msgid": "<20210713084500.19964-20-suanmingm@nvidia.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20210713084500.19964-20-suanmingm@nvidia.com", "date": "2021-07-13T08:44:53", "name": "[v6,19/26] common/mlx5: support list non-lcore operations", "mbox": "http://patchwork.dpdk.org/project/dpdk/patch/20210713084500.19964-20-suanmingm@nvidia.com/mbox/" }, { "id": 95751, "url": "http://patchwork.dpdk.org/api/patches/95751/?format=api", "web_url": "http://patchwork.dpdk.org/project/dpdk/patch/20210713084500.19964-21-suanmingm@nvidia.com/", "msgid": "<20210713084500.19964-21-suanmingm@nvidia.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20210713084500.19964-21-suanmingm@nvidia.com", "date": "2021-07-13T08:44:54", "name": "[v6,20/26] net/mlx5: move modify header allocator to ipool", "mbox": "http://patchwork.dpdk.org/project/dpdk/patch/20210713084500.19964-21-suanmingm@nvidia.com/mbox/" }, { "id": 95752, "url": "http://patchwork.dpdk.org/api/patches/95752/?format=api", "web_url": "http://patchwork.dpdk.org/project/dpdk/patch/20210713084500.19964-22-suanmingm@nvidia.com/", "msgid": "<20210713084500.19964-22-suanmingm@nvidia.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20210713084500.19964-22-suanmingm@nvidia.com", "date": "2021-07-13T08:44:55", "name": "[v6,21/26] net/mlx5: adjust the hash bucket size", "mbox": "http://patchwork.dpdk.org/project/dpdk/patch/20210713084500.19964-22-suanmingm@nvidia.com/mbox/" }, { "id": 95753, "url": "http://patchwork.dpdk.org/api/patches/95753/?format=api", "web_url": "http://patchwork.dpdk.org/project/dpdk/patch/20210713084500.19964-23-suanmingm@nvidia.com/", "msgid": "<20210713084500.19964-23-suanmingm@nvidia.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20210713084500.19964-23-suanmingm@nvidia.com", "date": "2021-07-13T08:44:56", "name": "[v6,22/26] net/mlx5: enable index pool per-core cache", "mbox": "http://patchwork.dpdk.org/project/dpdk/patch/20210713084500.19964-23-suanmingm@nvidia.com/mbox/" }, { "id": 95754, "url": "http://patchwork.dpdk.org/api/patches/95754/?format=api", "web_url": "http://patchwork.dpdk.org/project/dpdk/patch/20210713084500.19964-24-suanmingm@nvidia.com/", "msgid": "<20210713084500.19964-24-suanmingm@nvidia.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20210713084500.19964-24-suanmingm@nvidia.com", "date": "2021-07-13T08:44:57", "name": "[v6,23/26] net/mlx5: optimize hash list table allocate on demand", "mbox": "http://patchwork.dpdk.org/project/dpdk/patch/20210713084500.19964-24-suanmingm@nvidia.com/mbox/" }, { "id": 95755, "url": "http://patchwork.dpdk.org/api/patches/95755/?format=api", "web_url": "http://patchwork.dpdk.org/project/dpdk/patch/20210713084500.19964-25-suanmingm@nvidia.com/", "msgid": "<20210713084500.19964-25-suanmingm@nvidia.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20210713084500.19964-25-suanmingm@nvidia.com", "date": "2021-07-13T08:44:58", "name": "[v6,24/26] net/mlx5: change memory release configuration", "mbox": "http://patchwork.dpdk.org/project/dpdk/patch/20210713084500.19964-25-suanmingm@nvidia.com/mbox/" }, { "id": 95756, "url": "http://patchwork.dpdk.org/api/patches/95756/?format=api", "web_url": "http://patchwork.dpdk.org/project/dpdk/patch/20210713084500.19964-26-suanmingm@nvidia.com/", "msgid": "<20210713084500.19964-26-suanmingm@nvidia.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20210713084500.19964-26-suanmingm@nvidia.com", "date": "2021-07-13T08:44:59", "name": "[v6,25/26] net/mlx5: optimize Rx queue match", "mbox": "http://patchwork.dpdk.org/project/dpdk/patch/20210713084500.19964-26-suanmingm@nvidia.com/mbox/" }, { "id": 95757, "url": "http://patchwork.dpdk.org/api/patches/95757/?format=api", "web_url": "http://patchwork.dpdk.org/project/dpdk/patch/20210713084500.19964-27-suanmingm@nvidia.com/", "msgid": "<20210713084500.19964-27-suanmingm@nvidia.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20210713084500.19964-27-suanmingm@nvidia.com", "date": "2021-07-13T08:45:00", "name": "[v6,26/26] doc: add mlx5 multiple-thread flow insertion optimization", "mbox": "http://patchwork.dpdk.org/project/dpdk/patch/20210713084500.19964-27-suanmingm@nvidia.com/mbox/" } ] }{ "id": 17790, "url": "