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GET /api/series/26726/?format=api
{ "id": 26726, "url": "http://patchwork.dpdk.org/api/series/26726/?format=api", "web_url": "http://patchwork.dpdk.org/project/dpdk/list/?series=26726", "project": { "id": 1, "url": "http://patchwork.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "name": "net/mlx5/hws: support range and partial hash matching", "date": "2023-02-01T07:28:01", "submitter": { "id": 2858, "url": "http://patchwork.dpdk.org/api/people/2858/?format=api", "name": "Alex Vesker", "email": "valex@nvidia.com" }, "version": 2, "total": 16, "received_total": 16, "received_all": true, "mbox": "http://patchwork.dpdk.org/series/26726/mbox/", "cover_letter": { "id": 122779, "url": "http://patchwork.dpdk.org/api/covers/122779/?format=api", "web_url": "http://patchwork.dpdk.org/project/dpdk/cover/20230201072815.1329101-1-valex@nvidia.com/", "msgid": "<20230201072815.1329101-1-valex@nvidia.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20230201072815.1329101-1-valex@nvidia.com", "date": "2023-02-01T07:27:59", "name": "[v2,00/16] net/mlx5/hws: support range and partial hash matching", "mbox": "http://patchwork.dpdk.org/project/dpdk/cover/20230201072815.1329101-1-valex@nvidia.com/mbox/" }, "patches": [ { "id": 122780, "url": "http://patchwork.dpdk.org/api/patches/122780/?format=api", "web_url": "http://patchwork.dpdk.org/project/dpdk/patch/20230201072815.1329101-2-valex@nvidia.com/", "msgid": "<20230201072815.1329101-2-valex@nvidia.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20230201072815.1329101-2-valex@nvidia.com", "date": "2023-02-01T07:28:00", "name": "[v2,01/16] net/mlx5/hws: support synchronous drain", "mbox": "http://patchwork.dpdk.org/project/dpdk/patch/20230201072815.1329101-2-valex@nvidia.com/mbox/" }, { "id": 122778, "url": "http://patchwork.dpdk.org/api/patches/122778/?format=api", "web_url": "http://patchwork.dpdk.org/project/dpdk/patch/20230201072815.1329101-3-valex@nvidia.com/", "msgid": "<20230201072815.1329101-3-valex@nvidia.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20230201072815.1329101-3-valex@nvidia.com", "date": "2023-02-01T07:28:01", "name": "[v2,02/16] net/mlx5/hws: matcher remove AT and MT limitation", "mbox": "http://patchwork.dpdk.org/project/dpdk/patch/20230201072815.1329101-3-valex@nvidia.com/mbox/" }, { "id": 122781, "url": "http://patchwork.dpdk.org/api/patches/122781/?format=api", "web_url": "http://patchwork.dpdk.org/project/dpdk/patch/20230201072815.1329101-4-valex@nvidia.com/", "msgid": "<20230201072815.1329101-4-valex@nvidia.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20230201072815.1329101-4-valex@nvidia.com", "date": "2023-02-01T07:28:02", "name": "[v2,03/16] net/mlx5/hws: support GTA WQE write using FW command", "mbox": "http://patchwork.dpdk.org/project/dpdk/patch/20230201072815.1329101-4-valex@nvidia.com/mbox/" }, { "id": 122782, "url": "http://patchwork.dpdk.org/api/patches/122782/?format=api", "web_url": "http://patchwork.dpdk.org/project/dpdk/patch/20230201072815.1329101-5-valex@nvidia.com/", "msgid": "<20230201072815.1329101-5-valex@nvidia.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20230201072815.1329101-5-valex@nvidia.com", "date": "2023-02-01T07:28:03", "name": "[v2,04/16] net/mlx5/hws: add capability query for gen wqe command", "mbox": "http://patchwork.dpdk.org/project/dpdk/patch/20230201072815.1329101-5-valex@nvidia.com/mbox/" }, { "id": 122783, "url": "http://patchwork.dpdk.org/api/patches/122783/?format=api", "web_url": "http://patchwork.dpdk.org/project/dpdk/patch/20230201072815.1329101-6-valex@nvidia.com/", "msgid": "<20230201072815.1329101-6-valex@nvidia.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20230201072815.1329101-6-valex@nvidia.com", "date": "2023-02-01T07:28:04", "name": "[v2,05/16] net/mlx5/hws: align RTC create command with PRM format", "mbox": "http://patchwork.dpdk.org/project/dpdk/patch/20230201072815.1329101-6-valex@nvidia.com/mbox/" }, { "id": 122784, "url": "http://patchwork.dpdk.org/api/patches/122784/?format=api", "web_url": "http://patchwork.dpdk.org/project/dpdk/patch/20230201072815.1329101-7-valex@nvidia.com/", "msgid": "<20230201072815.1329101-7-valex@nvidia.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20230201072815.1329101-7-valex@nvidia.com", "date": "2023-02-01T07:28:05", "name": "[v2,06/16] net/mlx5/hws: add send FW match STE using gen WQE", "mbox": "http://patchwork.dpdk.org/project/dpdk/patch/20230201072815.1329101-7-valex@nvidia.com/mbox/" }, { "id": 122785, "url": "http://patchwork.dpdk.org/api/patches/122785/?format=api", "web_url": "http://patchwork.dpdk.org/project/dpdk/patch/20230201072815.1329101-8-valex@nvidia.com/", "msgid": "<20230201072815.1329101-8-valex@nvidia.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20230201072815.1329101-8-valex@nvidia.com", "date": "2023-02-01T07:28:06", "name": "[v2,07/16] net/mlx5/hws: add send FW range STE WQE", "mbox": "http://patchwork.dpdk.org/project/dpdk/patch/20230201072815.1329101-8-valex@nvidia.com/mbox/" }, { "id": 122786, "url": "http://patchwork.dpdk.org/api/patches/122786/?format=api", "web_url": "http://patchwork.dpdk.org/project/dpdk/patch/20230201072815.1329101-9-valex@nvidia.com/", "msgid": "<20230201072815.1329101-9-valex@nvidia.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20230201072815.1329101-9-valex@nvidia.com", "date": "2023-02-01T07:28:07", "name": "[v2,08/16] net/mlx5/hws: move matcher size check to function", "mbox": "http://patchwork.dpdk.org/project/dpdk/patch/20230201072815.1329101-9-valex@nvidia.com/mbox/" }, { "id": 122788, "url": "http://patchwork.dpdk.org/api/patches/122788/?format=api", "web_url": "http://patchwork.dpdk.org/project/dpdk/patch/20230201072815.1329101-10-valex@nvidia.com/", "msgid": "<20230201072815.1329101-10-valex@nvidia.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20230201072815.1329101-10-valex@nvidia.com", "date": "2023-02-01T07:28:08", "name": "[v2,09/16] net/mlx5/hws: support range match", "mbox": "http://patchwork.dpdk.org/project/dpdk/patch/20230201072815.1329101-10-valex@nvidia.com/mbox/" }, { "id": 122787, "url": "http://patchwork.dpdk.org/api/patches/122787/?format=api", "web_url": "http://patchwork.dpdk.org/project/dpdk/patch/20230201072815.1329101-11-valex@nvidia.com/", "msgid": "<20230201072815.1329101-11-valex@nvidia.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20230201072815.1329101-11-valex@nvidia.com", "date": "2023-02-01T07:28:09", "name": "[v2,10/16] net/mlx5/hws: redesign definer create", "mbox": "http://patchwork.dpdk.org/project/dpdk/patch/20230201072815.1329101-11-valex@nvidia.com/mbox/" }, { "id": 122789, "url": "http://patchwork.dpdk.org/api/patches/122789/?format=api", "web_url": "http://patchwork.dpdk.org/project/dpdk/patch/20230201072815.1329101-12-valex@nvidia.com/", "msgid": "<20230201072815.1329101-12-valex@nvidia.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20230201072815.1329101-12-valex@nvidia.com", "date": "2023-02-01T07:28:10", "name": "[v2,11/16] net/mlx5/hws: support partial hash", "mbox": "http://patchwork.dpdk.org/project/dpdk/patch/20230201072815.1329101-12-valex@nvidia.com/mbox/" }, { "id": 122790, "url": "http://patchwork.dpdk.org/api/patches/122790/?format=api", "web_url": "http://patchwork.dpdk.org/project/dpdk/patch/20230201072815.1329101-13-valex@nvidia.com/", "msgid": "<20230201072815.1329101-13-valex@nvidia.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20230201072815.1329101-13-valex@nvidia.com", "date": "2023-02-01T07:28:11", "name": "[v2,12/16] net/mlx5/hws: add range definer creation support", "mbox": "http://patchwork.dpdk.org/project/dpdk/patch/20230201072815.1329101-13-valex@nvidia.com/mbox/" }, { "id": 122791, "url": "http://patchwork.dpdk.org/api/patches/122791/?format=api", "web_url": "http://patchwork.dpdk.org/project/dpdk/patch/20230201072815.1329101-14-valex@nvidia.com/", "msgid": "<20230201072815.1329101-14-valex@nvidia.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20230201072815.1329101-14-valex@nvidia.com", "date": "2023-02-01T07:28:12", "name": "[v2,13/16] net/mlx5/hws: add FW WQE rule creation logic", "mbox": "http://patchwork.dpdk.org/project/dpdk/patch/20230201072815.1329101-14-valex@nvidia.com/mbox/" }, { "id": 122792, "url": "http://patchwork.dpdk.org/api/patches/122792/?format=api", "web_url": "http://patchwork.dpdk.org/project/dpdk/patch/20230201072815.1329101-15-valex@nvidia.com/", "msgid": "<20230201072815.1329101-15-valex@nvidia.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20230201072815.1329101-15-valex@nvidia.com", "date": "2023-02-01T07:28:13", "name": "[v2,14/16] net/mlx5/hws: add debug dump support for range and hash", "mbox": "http://patchwork.dpdk.org/project/dpdk/patch/20230201072815.1329101-15-valex@nvidia.com/mbox/" }, { "id": 122793, "url": "http://patchwork.dpdk.org/api/patches/122793/?format=api", "web_url": "http://patchwork.dpdk.org/project/dpdk/patch/20230201072815.1329101-16-valex@nvidia.com/", "msgid": "<20230201072815.1329101-16-valex@nvidia.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20230201072815.1329101-16-valex@nvidia.com", "date": "2023-02-01T07:28:14", "name": "[v2,15/16] net/mlx5/hws: rename pattern cache object", "mbox": "http://patchwork.dpdk.org/project/dpdk/patch/20230201072815.1329101-16-valex@nvidia.com/mbox/" }, { "id": 122794, "url": "http://patchwork.dpdk.org/api/patches/122794/?format=api", "web_url": "http://patchwork.dpdk.org/project/dpdk/patch/20230201072815.1329101-17-valex@nvidia.com/", "msgid": "<20230201072815.1329101-17-valex@nvidia.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20230201072815.1329101-17-valex@nvidia.com", "date": "2023-02-01T07:28:15", "name": "[v2,16/16] net/mlx5/hws: cache definer for reuse", "mbox": "http://patchwork.dpdk.org/project/dpdk/patch/20230201072815.1329101-17-valex@nvidia.com/mbox/" } ] }