[4/7] net: update Rx RSS hash offload capabilities
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Commit Message
From: Pavan Nikhilesh <pbhagavatula@marvell.com>
Add DEV_RX_OFFLOAD_RSS_HASH flag for all supported NICs.
Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
---
drivers/net/bnxt/bnxt_ethdev.c | 3 ++-
drivers/net/cxgbe/cxgbe.h | 3 ++-
drivers/net/dpaa/dpaa_ethdev.c | 3 ++-
drivers/net/dpaa2/dpaa2_ethdev.c | 3 ++-
drivers/net/e1000/igb_rxtx.c | 3 ++-
drivers/net/enic/enic_res.c | 3 ++-
drivers/net/fm10k/fm10k_ethdev.c | 3 ++-
drivers/net/hinic/hinic_pmd_ethdev.c | 3 ++-
drivers/net/i40e/i40e_ethdev.c | 3 ++-
drivers/net/iavf/iavf_ethdev.c | 3 ++-
drivers/net/ice/ice_ethdev.c | 3 ++-
drivers/net/ixgbe/ixgbe_rxtx.c | 3 ++-
drivers/net/liquidio/lio_ethdev.c | 3 ++-
drivers/net/mlx4/mlx4_rxq.c | 3 ++-
drivers/net/mlx5/mlx5_rxq.c | 3 ++-
drivers/net/netvsc/hn_rndis.c | 3 ++-
drivers/net/nfp/nfp_net.c | 3 ++-
drivers/net/octeontx2/otx2_ethdev.c | 3 ++-
drivers/net/octeontx2/otx2_ethdev.h | 15 ++++++++-------
drivers/net/qede/qede_ethdev.c | 3 ++-
drivers/net/sfc/sfc_rx.c | 3 ++-
drivers/net/thunderx/nicvf_ethdev.h | 3 ++-
drivers/net/vmxnet3/vmxnet3_ethdev.c | 3 ++-
23 files changed, 52 insertions(+), 29 deletions(-)
Comments
Prefix "net: " is typically used for lib/librte_net. It should be
"drivers/net: " here.
On 8/16/19 8:55 AM, pbhagavatula@marvell.com wrote:
> From: Pavan Nikhilesh <pbhagavatula@marvell.com>
>
> Add DEV_RX_OFFLOAD_RSS_HASH flag for all supported NICs.
"all supported NICs" sounds wrong here. I'd say
"all PMDs which support RSS hash delivery" or something like this.
> Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
> ---
[snip]
> diff --git a/drivers/net/sfc/sfc_rx.c b/drivers/net/sfc/sfc_rx.c
> index e6809bb64..695580b22 100644
> --- a/drivers/net/sfc/sfc_rx.c
> +++ b/drivers/net/sfc/sfc_rx.c
> @@ -618,7 +618,8 @@ struct sfc_dp_rx sfc_efx_rx = {
> },
> .features = SFC_DP_RX_FEAT_INTR,
> .dev_offload_capa = DEV_RX_OFFLOAD_CHECKSUM,
> - .queue_offload_capa = DEV_RX_OFFLOAD_SCATTER,
> + .queue_offload_capa = DEV_RX_OFFLOAD_SCATTER |
> + DEV_RX_OFFLOAD_RSS_HASH,
> .qsize_up_rings = sfc_efx_rx_qsize_up_rings,
> .qcreate = sfc_efx_rx_qcreate,
> .qdestroy = sfc_efx_rx_qdestroy,
>
Similar changes are required in sfc_ef10_essb_rx
(drivers/net/sfc/sfc_ef10_essb_rx.c) and sfc_ef10_rx
(drivers/net/sfc/sfc_ef10_rx.c).
>Subject: Re: [dpdk-dev] [PATCH 4/7] net: update Rx RSS hash offload
>capabilities
>
>Prefix "net: " is typically used for lib/librte_net. It should be
>"drivers/net: " here.
Ack will fix in v2.
>
>On 8/16/19 8:55 AM, pbhagavatula@marvell.com wrote:
>> From: Pavan Nikhilesh <pbhagavatula@marvell.com>
>>
>> Add DEV_RX_OFFLOAD_RSS_HASH flag for all supported NICs.
>
>"all supported NICs" sounds wrong here. I'd say
>"all PMDs which support RSS hash delivery" or something like this.
>
Will reword in v2.
>> Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
>> ---
>
>[snip]
>
>> diff --git a/drivers/net/sfc/sfc_rx.c b/drivers/net/sfc/sfc_rx.c
>> index e6809bb64..695580b22 100644
>> --- a/drivers/net/sfc/sfc_rx.c
>> +++ b/drivers/net/sfc/sfc_rx.c
>> @@ -618,7 +618,8 @@ struct sfc_dp_rx sfc_efx_rx = {
>> },
>> .features = SFC_DP_RX_FEAT_INTR,
>> .dev_offload_capa = DEV_RX_OFFLOAD_CHECKSUM,
>> - .queue_offload_capa = DEV_RX_OFFLOAD_SCATTER,
>> + .queue_offload_capa = DEV_RX_OFFLOAD_SCATTER |
>> + DEV_RX_OFFLOAD_RSS_HASH,
>> .qsize_up_rings = sfc_efx_rx_qsize_up_rings,
>> .qcreate = sfc_efx_rx_qcreate,
>> .qdestroy = sfc_efx_rx_qdestroy,
>>
>
>Similar changes are required in sfc_ef10_essb_rx
>(drivers/net/sfc/sfc_ef10_essb_rx.c) and sfc_ef10_rx
>(drivers/net/sfc/sfc_ef10_rx.c).
Thanks for the heads up will update these files in v2.
Pavan
@@ -160,7 +160,8 @@ static const struct rte_pci_id bnxt_pci_id_map[] = {
DEV_RX_OFFLOAD_OUTER_IPV4_CKSUM | \
DEV_RX_OFFLOAD_JUMBO_FRAME | \
DEV_RX_OFFLOAD_KEEP_CRC | \
- DEV_RX_OFFLOAD_TCP_LRO)
+ DEV_RX_OFFLOAD_TCP_LRO | \
+ DEV_RX_OFFLOAD_RSS_HASH)
static int bnxt_vlan_offload_set_op(struct rte_eth_dev *dev, int mask);
static void bnxt_print_link_info(struct rte_eth_dev *eth_dev);
@@ -47,7 +47,8 @@
DEV_RX_OFFLOAD_UDP_CKSUM | \
DEV_RX_OFFLOAD_TCP_CKSUM | \
DEV_RX_OFFLOAD_JUMBO_FRAME | \
- DEV_RX_OFFLOAD_SCATTER)
+ DEV_RX_OFFLOAD_SCATTER | \
+ DEV_RX_OFFLOAD_RSS_HASH)
#define CXGBE_DEVARG_KEEP_OVLAN "keep_ovlan"
@@ -49,7 +49,8 @@
/* Supported Rx offloads */
static uint64_t dev_rx_offloads_sup =
DEV_RX_OFFLOAD_JUMBO_FRAME |
- DEV_RX_OFFLOAD_SCATTER;
+ DEV_RX_OFFLOAD_SCATTER |
+ DEV_RX_OFFLOAD_RSS_HASH;
/* Rx offloads which cannot be disabled */
static uint64_t dev_rx_offloads_nodis =
@@ -38,7 +38,8 @@ static uint64_t dev_rx_offloads_sup =
DEV_RX_OFFLOAD_TCP_CKSUM |
DEV_RX_OFFLOAD_OUTER_IPV4_CKSUM |
DEV_RX_OFFLOAD_VLAN_FILTER |
- DEV_RX_OFFLOAD_JUMBO_FRAME;
+ DEV_RX_OFFLOAD_JUMBO_FRAME |
+ DEV_RX_OFFLOAD_RSS_HASH;
/* Rx offloads which cannot be disabled */
static uint64_t dev_rx_offloads_nodis =
@@ -1646,7 +1646,8 @@ igb_get_rx_port_offloads_capa(struct rte_eth_dev *dev)
DEV_RX_OFFLOAD_TCP_CKSUM |
DEV_RX_OFFLOAD_JUMBO_FRAME |
DEV_RX_OFFLOAD_KEEP_CRC |
- DEV_RX_OFFLOAD_SCATTER;
+ DEV_RX_OFFLOAD_SCATTER |
+ DEV_RX_OFFLOAD_RSS_HASH;
return rx_offload_capa;
}
@@ -198,7 +198,8 @@ int enic_get_vnic_config(struct enic *enic)
DEV_RX_OFFLOAD_VLAN_STRIP |
DEV_RX_OFFLOAD_IPV4_CKSUM |
DEV_RX_OFFLOAD_UDP_CKSUM |
- DEV_RX_OFFLOAD_TCP_CKSUM;
+ DEV_RX_OFFLOAD_TCP_CKSUM |
+ DEV_RX_OFFLOAD_RSS_HASH;
enic->tx_offload_mask =
PKT_TX_IPV6 |
PKT_TX_IPV4 |
@@ -1797,7 +1797,8 @@ static uint64_t fm10k_get_rx_port_offloads_capa(struct rte_eth_dev *dev)
DEV_RX_OFFLOAD_UDP_CKSUM |
DEV_RX_OFFLOAD_TCP_CKSUM |
DEV_RX_OFFLOAD_JUMBO_FRAME |
- DEV_RX_OFFLOAD_HEADER_SPLIT);
+ DEV_RX_OFFLOAD_HEADER_SPLIT |
+ DEV_RX_OFFLOAD_RSS_HASH);
}
static int
@@ -680,7 +680,8 @@ hinic_dev_infos_get(struct rte_eth_dev *dev, struct rte_eth_dev_info *info)
info->rx_offload_capa = DEV_RX_OFFLOAD_VLAN_STRIP |
DEV_RX_OFFLOAD_IPV4_CKSUM |
DEV_RX_OFFLOAD_UDP_CKSUM |
- DEV_RX_OFFLOAD_TCP_CKSUM;
+ DEV_RX_OFFLOAD_TCP_CKSUM |
+ DEV_RX_OFFLOAD_RSS_HASH;
info->tx_queue_offload_capa = 0;
info->tx_offload_capa = DEV_TX_OFFLOAD_VLAN_INSERT |
@@ -3511,7 +3511,8 @@ i40e_dev_info_get(struct rte_eth_dev *dev, struct rte_eth_dev_info *dev_info)
DEV_RX_OFFLOAD_SCATTER |
DEV_RX_OFFLOAD_VLAN_EXTEND |
DEV_RX_OFFLOAD_VLAN_FILTER |
- DEV_RX_OFFLOAD_JUMBO_FRAME;
+ DEV_RX_OFFLOAD_JUMBO_FRAME |
+ DEV_RX_OFFLOAD_RSS_HASH;
dev_info->tx_queue_offload_capa = DEV_TX_OFFLOAD_MBUF_FAST_FREE;
dev_info->tx_offload_capa =
@@ -517,7 +517,8 @@ iavf_dev_info_get(struct rte_eth_dev *dev, struct rte_eth_dev_info *dev_info)
DEV_RX_OFFLOAD_OUTER_IPV4_CKSUM |
DEV_RX_OFFLOAD_SCATTER |
DEV_RX_OFFLOAD_JUMBO_FRAME |
- DEV_RX_OFFLOAD_VLAN_FILTER;
+ DEV_RX_OFFLOAD_VLAN_FILTER |
+ DEV_RX_OFFLOAD_RSS_HASH;
dev_info->tx_offload_capa =
DEV_TX_OFFLOAD_VLAN_INSERT |
DEV_TX_OFFLOAD_QINQ_INSERT |
@@ -2133,7 +2133,8 @@ ice_dev_info_get(struct rte_eth_dev *dev, struct rte_eth_dev_info *dev_info)
DEV_RX_OFFLOAD_TCP_CKSUM |
DEV_RX_OFFLOAD_QINQ_STRIP |
DEV_RX_OFFLOAD_OUTER_IPV4_CKSUM |
- DEV_RX_OFFLOAD_VLAN_EXTEND;
+ DEV_RX_OFFLOAD_VLAN_EXTEND |
+ DEV_RX_OFFLOAD_RSS_HASH;
dev_info->tx_offload_capa |=
DEV_TX_OFFLOAD_QINQ_INSERT |
DEV_TX_OFFLOAD_IPV4_CKSUM |
@@ -2872,7 +2872,8 @@ ixgbe_get_rx_port_offloads(struct rte_eth_dev *dev)
DEV_RX_OFFLOAD_KEEP_CRC |
DEV_RX_OFFLOAD_JUMBO_FRAME |
DEV_RX_OFFLOAD_VLAN_FILTER |
- DEV_RX_OFFLOAD_SCATTER;
+ DEV_RX_OFFLOAD_SCATTER |
+ DEV_RX_OFFLOAD_RSS_HASH;
if (hw->mac.type == ixgbe_mac_82598EB)
offloads |= DEV_RX_OFFLOAD_VLAN_STRIP;
@@ -406,7 +406,8 @@ lio_dev_info_get(struct rte_eth_dev *eth_dev,
devinfo->rx_offload_capa = (DEV_RX_OFFLOAD_IPV4_CKSUM |
DEV_RX_OFFLOAD_UDP_CKSUM |
DEV_RX_OFFLOAD_TCP_CKSUM |
- DEV_RX_OFFLOAD_VLAN_STRIP);
+ DEV_RX_OFFLOAD_VLAN_STRIP |
+ DEV_RX_OFFLOAD_RSS_HASH);
devinfo->tx_offload_capa = (DEV_TX_OFFLOAD_IPV4_CKSUM |
DEV_TX_OFFLOAD_UDP_CKSUM |
DEV_TX_OFFLOAD_TCP_CKSUM |
@@ -685,7 +685,8 @@ mlx4_get_rx_queue_offloads(struct mlx4_priv *priv)
{
uint64_t offloads = DEV_RX_OFFLOAD_SCATTER |
DEV_RX_OFFLOAD_KEEP_CRC |
- DEV_RX_OFFLOAD_JUMBO_FRAME;
+ DEV_RX_OFFLOAD_JUMBO_FRAME |
+ DEV_RX_OFFLOAD_RSS_HASH;
if (priv->hw_csum)
offloads |= DEV_RX_OFFLOAD_CHECKSUM;
@@ -368,7 +368,8 @@ mlx5_get_rx_queue_offloads(struct rte_eth_dev *dev)
struct mlx5_dev_config *config = &priv->config;
uint64_t offloads = (DEV_RX_OFFLOAD_SCATTER |
DEV_RX_OFFLOAD_TIMESTAMP |
- DEV_RX_OFFLOAD_JUMBO_FRAME);
+ DEV_RX_OFFLOAD_JUMBO_FRAME |
+ DEV_RX_OFFLOAD_RSS_HASH);
if (config->hw_fcs_strip)
offloads |= DEV_RX_OFFLOAD_KEEP_CRC;
@@ -897,7 +897,8 @@ int hn_rndis_get_offload(struct hn_data *hv,
== HN_NDIS_LSOV2_CAP_IP6)
dev_info->tx_offload_capa |= DEV_TX_OFFLOAD_TCP_TSO;
- dev_info->rx_offload_capa = DEV_RX_OFFLOAD_VLAN_STRIP;
+ dev_info->rx_offload_capa = DEV_RX_OFFLOAD_VLAN_STRIP |
+ DEV_RX_OFFLOAD_RSS_HASH;
if (hwcaps.ndis_csum.ndis_ip4_rxcsum & NDIS_RXCSUM_CAP_IP4)
dev_info->rx_offload_capa |= DEV_RX_OFFLOAD_IPV4_CKSUM;
@@ -1226,7 +1226,8 @@ nfp_net_infos_get(struct rte_eth_dev *dev, struct rte_eth_dev_info *dev_info)
DEV_RX_OFFLOAD_UDP_CKSUM |
DEV_RX_OFFLOAD_TCP_CKSUM;
- dev_info->rx_offload_capa |= DEV_RX_OFFLOAD_JUMBO_FRAME;
+ dev_info->rx_offload_capa |= DEV_RX_OFFLOAD_JUMBO_FRAME |
+ DEV_RX_OFFLOAD_RSS_HASH;
if (hw->cap & NFP_NET_CFG_CTRL_TXVLAN)
dev_info->tx_offload_capa = DEV_TX_OFFLOAD_VLAN_INSERT;
@@ -569,7 +569,8 @@ nix_rx_offload_flags(struct rte_eth_dev *eth_dev)
struct rte_eth_rxmode *rxmode = &conf->rxmode;
uint16_t flags = 0;
- if (rxmode->mq_mode == ETH_MQ_RX_RSS)
+ if (rxmode->mq_mode == ETH_MQ_RX_RSS &&
+ (dev->rx_offloads & DEV_RX_OFFLOAD_RSS_HASH))
flags |= NIX_RX_OFFLOAD_RSS_F;
if (dev->rx_offloads & (DEV_RX_OFFLOAD_TCP_CKSUM |
@@ -122,8 +122,8 @@
DEV_TX_OFFLOAD_MT_LOCKFREE | \
DEV_TX_OFFLOAD_VLAN_INSERT | \
DEV_TX_OFFLOAD_QINQ_INSERT | \
- DEV_TX_OFFLOAD_OUTER_IPV4_CKSUM | \
- DEV_TX_OFFLOAD_OUTER_UDP_CKSUM | \
+ DEV_TX_OFFLOAD_OUTER_IPV4_CKSUM | \
+ DEV_TX_OFFLOAD_OUTER_UDP_CKSUM | \
DEV_TX_OFFLOAD_TCP_CKSUM | \
DEV_TX_OFFLOAD_UDP_CKSUM | \
DEV_TX_OFFLOAD_SCTP_CKSUM | \
@@ -136,11 +136,12 @@
DEV_RX_OFFLOAD_OUTER_IPV4_CKSUM | \
DEV_RX_OFFLOAD_SCATTER | \
DEV_RX_OFFLOAD_JUMBO_FRAME | \
- DEV_RX_OFFLOAD_OUTER_UDP_CKSUM | \
- DEV_RX_OFFLOAD_VLAN_STRIP | \
- DEV_RX_OFFLOAD_VLAN_FILTER | \
- DEV_RX_OFFLOAD_QINQ_STRIP | \
- DEV_RX_OFFLOAD_TIMESTAMP)
+ DEV_RX_OFFLOAD_OUTER_UDP_CKSUM | \
+ DEV_RX_OFFLOAD_VLAN_STRIP | \
+ DEV_RX_OFFLOAD_VLAN_FILTER | \
+ DEV_RX_OFFLOAD_QINQ_STRIP | \
+ DEV_RX_OFFLOAD_TIMESTAMP | \
+ DEV_RX_OFFLOAD_RSS_HASH)
#define NIX_DEFAULT_RSS_CTX_GROUP 0
#define NIX_DEFAULT_RSS_MCAM_IDX -1
@@ -1291,7 +1291,8 @@ qede_dev_info_get(struct rte_eth_dev *eth_dev,
DEV_RX_OFFLOAD_SCATTER |
DEV_RX_OFFLOAD_JUMBO_FRAME |
DEV_RX_OFFLOAD_VLAN_FILTER |
- DEV_RX_OFFLOAD_VLAN_STRIP);
+ DEV_RX_OFFLOAD_VLAN_STRIP |
+ DEV_RX_OFFLOAD_RSS_HASH);
dev_info->rx_queue_offload_capa = 0;
/* TX offloads are on a per-packet basis, so it is applicable
@@ -618,7 +618,8 @@ struct sfc_dp_rx sfc_efx_rx = {
},
.features = SFC_DP_RX_FEAT_INTR,
.dev_offload_capa = DEV_RX_OFFLOAD_CHECKSUM,
- .queue_offload_capa = DEV_RX_OFFLOAD_SCATTER,
+ .queue_offload_capa = DEV_RX_OFFLOAD_SCATTER |
+ DEV_RX_OFFLOAD_RSS_HASH,
.qsize_up_rings = sfc_efx_rx_qsize_up_rings,
.qcreate = sfc_efx_rx_qcreate,
.qdestroy = sfc_efx_rx_qdestroy,
@@ -41,7 +41,8 @@
DEV_RX_OFFLOAD_CHECKSUM | \
DEV_RX_OFFLOAD_VLAN_STRIP | \
DEV_RX_OFFLOAD_JUMBO_FRAME | \
- DEV_RX_OFFLOAD_SCATTER)
+ DEV_RX_OFFLOAD_SCATTER | \
+ DEV_RX_OFFLOAD_RSS_HASH)
#define NICVF_DEFAULT_RX_FREE_THRESH 224
#define NICVF_DEFAULT_TX_FREE_THRESH 224
@@ -58,7 +58,8 @@
DEV_RX_OFFLOAD_UDP_CKSUM | \
DEV_RX_OFFLOAD_TCP_CKSUM | \
DEV_RX_OFFLOAD_TCP_LRO | \
- DEV_RX_OFFLOAD_JUMBO_FRAME)
+ DEV_RX_OFFLOAD_JUMBO_FRAME | \
+ DEV_RX_OFFLOAD_RSS_HASH)
static int eth_vmxnet3_dev_init(struct rte_eth_dev *eth_dev);
static int eth_vmxnet3_dev_uninit(struct rte_eth_dev *eth_dev);