[v2,5/7] drivers/net: update Rx flow flag and mark capabilities
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Commit Message
From: Pavan Nikhilesh <pbhagavatula@marvell.com>
Add DEV_RX_OFFLOAD_FLOW_MARK flag for all PMDs that support flow action
flag and mark.
Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
---
drivers/net/bnxt/bnxt_ethdev.c | 3 ++-
drivers/net/enic/enic_res.c | 3 ++-
drivers/net/i40e/i40e_ethdev.c | 3 ++-
drivers/net/iavf/iavf_ethdev.c | 3 ++-
drivers/net/ice/ice_ethdev.c | 3 ++-
drivers/net/ixgbe/ixgbe_rxtx.c | 3 ++-
drivers/net/mlx5/mlx5_rxq.c | 3 ++-
drivers/net/octeontx2/otx2_ethdev.h | 3 ++-
drivers/net/octeontx2/otx2_flow_parse.c | 3 ++-
drivers/net/sfc/sfc_ef10_essb_rx.c | 3 ++-
drivers/net/sfc/sfc_rx.c | 3 ++-
11 files changed, 22 insertions(+), 11 deletions(-)
Comments
On 8/21/19 11:47 PM, pbhagavatula@marvell.com wrote:
> From: Pavan Nikhilesh <pbhagavatula@marvell.com>
>
> Add DEV_RX_OFFLOAD_FLOW_MARK flag for all PMDs that support flow action
> flag and mark.
>
> Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
<snip>
> diff --git a/drivers/net/sfc/sfc_rx.c b/drivers/net/sfc/sfc_rx.c
> index 695580b22..0f842e9e9 100644
> --- a/drivers/net/sfc/sfc_rx.c
> +++ b/drivers/net/sfc/sfc_rx.c
> @@ -619,7 +619,8 @@ struct sfc_dp_rx sfc_efx_rx = {
> .features = SFC_DP_RX_FEAT_INTR,
> .dev_offload_capa = DEV_RX_OFFLOAD_CHECKSUM,
> .queue_offload_capa = DEV_RX_OFFLOAD_SCATTER |
> - DEV_RX_OFFLOAD_RSS_HASH,
> + DEV_RX_OFFLOAD_RSS_HASH |
> + DEV_RX_OFFLOAD_FLOW_MARK,
> .qsize_up_rings = sfc_efx_rx_qsize_up_rings,
> .qcreate = sfc_efx_rx_qcreate,
> .qdestroy = sfc_efx_rx_qdestroy,
The change should be dropped since libefx-datapath does not
support flow mark.
Also when flow rule with MARK/FLAG is validated it is required
to check that the offload is enabled, but don't worry about it,
it is not trivial and we'll care about it and provide the patch.
Thanks.
On Thu, Aug 22, 2019 at 2:18 AM <pbhagavatula@marvell.com> wrote:
>
> From: Pavan Nikhilesh <pbhagavatula@marvell.com>
>
> Add DEV_RX_OFFLOAD_FLOW_MARK flag for all PMDs that support flow action
> flag and mark.
>
> Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
> ---
> diff --git a/drivers/net/octeontx2/otx2_flow_parse.c b/drivers/net/octeontx2/otx2_flow_parse.c
> index 6670c1a70..6eb69a8b2 100644
> --- a/drivers/net/octeontx2/otx2_flow_parse.c
> +++ b/drivers/net/octeontx2/otx2_flow_parse.c
> @@ -979,7 +979,8 @@ otx2_flow_parse_actions(struct rte_eth_dev *dev,
> if (mark)
> flow->npc_action |= (uint64_t)mark << 40;
>
> - if (rte_atomic32_read(&npc->mark_actions) == 1) {
> + if (rte_atomic32_read(&npc->mark_actions) == 1 &&
npc->mark_actions was kind of emulating the DEV_RX_OFFLOAD_FLOW_MARK.
Now that we have explicit DEV_RX_OFFLOAD_FLOW_MARK flag, We can remove
npc->mark_actions.
> + (hw->rx_offloads & DEV_RX_OFFLOAD_FLOW_MARK)) {
> hw->rx_offload_flags |=
> NIX_RX_OFFLOAD_MARK_UPDATE_F;
> otx2_eth_set_rx_function(dev);
@@ -161,7 +161,8 @@ static const struct rte_pci_id bnxt_pci_id_map[] = {
DEV_RX_OFFLOAD_JUMBO_FRAME | \
DEV_RX_OFFLOAD_KEEP_CRC | \
DEV_RX_OFFLOAD_TCP_LRO | \
- DEV_RX_OFFLOAD_RSS_HASH)
+ DEV_RX_OFFLOAD_RSS_HASH | \
+ DEV_RX_OFFLOAD_FLOW_MARK)
static int bnxt_vlan_offload_set_op(struct rte_eth_dev *dev, int mask);
static void bnxt_print_link_info(struct rte_eth_dev *eth_dev);
@@ -199,7 +199,8 @@ int enic_get_vnic_config(struct enic *enic)
DEV_RX_OFFLOAD_IPV4_CKSUM |
DEV_RX_OFFLOAD_UDP_CKSUM |
DEV_RX_OFFLOAD_TCP_CKSUM |
- DEV_RX_OFFLOAD_RSS_HASH;
+ DEV_RX_OFFLOAD_RSS_HASH |
+ DEV_RX_OFFLOAD_FLOW_MARK;
enic->tx_offload_mask =
PKT_TX_IPV6 |
PKT_TX_IPV4 |
@@ -3512,7 +3512,8 @@ i40e_dev_info_get(struct rte_eth_dev *dev, struct rte_eth_dev_info *dev_info)
DEV_RX_OFFLOAD_VLAN_EXTEND |
DEV_RX_OFFLOAD_VLAN_FILTER |
DEV_RX_OFFLOAD_JUMBO_FRAME |
- DEV_RX_OFFLOAD_RSS_HASH;
+ DEV_RX_OFFLOAD_RSS_HASH |
+ DEV_RX_OFFLOAD_FLOW_MARK;
dev_info->tx_queue_offload_capa = DEV_TX_OFFLOAD_MBUF_FAST_FREE;
dev_info->tx_offload_capa =
@@ -518,7 +518,8 @@ iavf_dev_info_get(struct rte_eth_dev *dev, struct rte_eth_dev_info *dev_info)
DEV_RX_OFFLOAD_SCATTER |
DEV_RX_OFFLOAD_JUMBO_FRAME |
DEV_RX_OFFLOAD_VLAN_FILTER |
- DEV_RX_OFFLOAD_RSS_HASH;
+ DEV_RX_OFFLOAD_RSS_HASH |
+ DEV_RX_OFFLOAD_FLOW_MARK;
dev_info->tx_offload_capa =
DEV_TX_OFFLOAD_VLAN_INSERT |
DEV_TX_OFFLOAD_QINQ_INSERT |
@@ -2134,7 +2134,8 @@ ice_dev_info_get(struct rte_eth_dev *dev, struct rte_eth_dev_info *dev_info)
DEV_RX_OFFLOAD_QINQ_STRIP |
DEV_RX_OFFLOAD_OUTER_IPV4_CKSUM |
DEV_RX_OFFLOAD_VLAN_EXTEND |
- DEV_RX_OFFLOAD_RSS_HASH;
+ DEV_RX_OFFLOAD_RSS_HASH |
+ DEV_RX_OFFLOAD_FLOW_MARK;
dev_info->tx_offload_capa |=
DEV_TX_OFFLOAD_QINQ_INSERT |
DEV_TX_OFFLOAD_IPV4_CKSUM |
@@ -2873,7 +2873,8 @@ ixgbe_get_rx_port_offloads(struct rte_eth_dev *dev)
DEV_RX_OFFLOAD_JUMBO_FRAME |
DEV_RX_OFFLOAD_VLAN_FILTER |
DEV_RX_OFFLOAD_SCATTER |
- DEV_RX_OFFLOAD_RSS_HASH;
+ DEV_RX_OFFLOAD_RSS_HASH |
+ DEV_RX_OFFLOAD_FLOW_MARK;
if (hw->mac.type == ixgbe_mac_82598EB)
offloads |= DEV_RX_OFFLOAD_VLAN_STRIP;
@@ -369,7 +369,8 @@ mlx5_get_rx_queue_offloads(struct rte_eth_dev *dev)
uint64_t offloads = (DEV_RX_OFFLOAD_SCATTER |
DEV_RX_OFFLOAD_TIMESTAMP |
DEV_RX_OFFLOAD_JUMBO_FRAME |
- DEV_RX_OFFLOAD_RSS_HASH);
+ DEV_RX_OFFLOAD_RSS_HASH |
+ DEV_RX_OFFLOAD_FLOW_MARK);
if (config->hw_fcs_strip)
offloads |= DEV_RX_OFFLOAD_KEEP_CRC;
@@ -141,7 +141,8 @@
DEV_RX_OFFLOAD_VLAN_FILTER | \
DEV_RX_OFFLOAD_QINQ_STRIP | \
DEV_RX_OFFLOAD_TIMESTAMP | \
- DEV_RX_OFFLOAD_RSS_HASH)
+ DEV_RX_OFFLOAD_RSS_HASH | \
+ DEV_RX_OFFLOAD_FLOW_MARK)
#define NIX_DEFAULT_RSS_CTX_GROUP 0
#define NIX_DEFAULT_RSS_MCAM_IDX -1
@@ -979,7 +979,8 @@ otx2_flow_parse_actions(struct rte_eth_dev *dev,
if (mark)
flow->npc_action |= (uint64_t)mark << 40;
- if (rte_atomic32_read(&npc->mark_actions) == 1) {
+ if (rte_atomic32_read(&npc->mark_actions) == 1 &&
+ (hw->rx_offloads & DEV_RX_OFFLOAD_FLOW_MARK)) {
hw->rx_offload_flags |=
NIX_RX_OFFLOAD_MARK_UPDATE_F;
otx2_eth_set_rx_function(dev);
@@ -716,7 +716,8 @@ struct sfc_dp_rx sfc_ef10_essb_rx = {
.features = SFC_DP_RX_FEAT_FLOW_FLAG |
SFC_DP_RX_FEAT_FLOW_MARK,
.dev_offload_capa = DEV_RX_OFFLOAD_CHECKSUM,
- .queue_offload_capa = DEV_RX_OFFLOAD_RSS_HASH,
+ .queue_offload_capa = DEV_RX_OFFLOAD_RSS_HASH |
+ DEV_RX_OFFLOAD_FLOW_MARK,
.get_dev_info = sfc_ef10_essb_rx_get_dev_info,
.pool_ops_supported = sfc_ef10_essb_rx_pool_ops_supported,
.qsize_up_rings = sfc_ef10_essb_rx_qsize_up_rings,
@@ -619,7 +619,8 @@ struct sfc_dp_rx sfc_efx_rx = {
.features = SFC_DP_RX_FEAT_INTR,
.dev_offload_capa = DEV_RX_OFFLOAD_CHECKSUM,
.queue_offload_capa = DEV_RX_OFFLOAD_SCATTER |
- DEV_RX_OFFLOAD_RSS_HASH,
+ DEV_RX_OFFLOAD_RSS_HASH |
+ DEV_RX_OFFLOAD_FLOW_MARK,
.qsize_up_rings = sfc_efx_rx_qsize_up_rings,
.qcreate = sfc_efx_rx_qcreate,
.qdestroy = sfc_efx_rx_qdestroy,