[1/2] common/octeontx2: sync cpt mailbox
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Commit Message
From: Tejasree Kondoj <ktejasree@marvell.com>
This patch syncs the pmd mailbox with the cpt pf driver.
Signed-off-by: Ankur Dwivedi <adwivedi@marvell.com>
Signed-off-by: Tejasree Kondoj <ktejasree@marvell.com>
---
drivers/common/octeontx2/otx2_mbox.h | 7 ++++++-
1 file changed, 6 insertions(+), 1 deletion(-)
Comments
> -----Original Message-----
> From: Ankur Dwivedi <adwivedi@marvell.com>
> Sent: Friday, July 31, 2020 7:22 PM
> To: dev@dpdk.org
> Cc: akhil.goyal@nxp.com; Jerin Jacob Kollanukkaran <jerinj@marvell.com>;
> Nithin Kumar Dabilpuram <ndabilpuram@marvell.com>; Anoob Joseph
> <anoobj@marvell.com>; Tejasree Kondoj <ktejasree@marvell.com>; Ankur
> Dwivedi <adwivedi@marvell.com>
> Subject: [PATCH 1/2] common/octeontx2: sync cpt mailbox
>
> From: Tejasree Kondoj <ktejasree@marvell.com>
>
> This patch syncs the pmd mailbox with the cpt pf driver.
>
> Signed-off-by: Ankur Dwivedi <adwivedi@marvell.com>
> Signed-off-by: Tejasree Kondoj <ktejasree@marvell.com>
Series Acked-by: Anoob Joseph <anoobj@marvell.com>
> From: Tejasree Kondoj <ktejasree@marvell.com>
>
> This patch syncs the pmd mailbox with the cpt pf driver.
>
> Signed-off-by: Ankur Dwivedi <adwivedi@marvell.com>
> Signed-off-by: Tejasree Kondoj <ktejasree@marvell.com>
> ---
> drivers/common/octeontx2/otx2_mbox.h | 7 ++++++-
> 1 file changed, 6 insertions(+), 1 deletion(-)
>
Series applied to dpdk-next-crypto
Thanks.
@@ -1224,6 +1224,8 @@ struct cpt_rd_wr_reg_msg {
uint64_t __otx2_io *ret_val;
uint64_t __otx2_io val;
uint8_t __otx2_io is_write;
+ /* BLKADDR_CPT0/BLKADDR_CPT1 or 0 for BLKADDR_CPT0 */
+ uint8_t __otx2_io blkaddr;
};
struct cpt_set_crypto_grp_req_msg {
@@ -1235,11 +1237,14 @@ struct cpt_lf_alloc_req_msg {
struct mbox_msghdr hdr;
uint16_t __otx2_io nix_pf_func;
uint16_t __otx2_io sso_pf_func;
+ uint16_t __otx2_io eng_grpmask;
+ /* BLKADDR_CPT0/BLKADDR_CPT1 or 0 for BLKADDR_CPT0 */
+ uint8_t __otx2_io blkaddr;
};
struct cpt_lf_alloc_rsp_msg {
struct mbox_msghdr hdr;
- uint8_t __otx2_io crypto_eng_grp;
+ uint16_t __otx2_io eng_grpmsk;
};
#define CPT_INLINE_INBOUND 0