common/cnxk: add changes in base rule merging

Message ID 20220922045909.479006-1-psatheesh@marvell.com (mailing list archive)
State Accepted, archived
Delegated to: Jerin Jacob
Headers
Series common/cnxk: add changes in base rule merging |

Checks

Context Check Description
ci/checkpatch success coding style OK
ci/Intel-compilation success Compilation OK
ci/iol-mellanox-Performance success Performance Testing PASS
ci/iol-intel-Performance success Performance Testing PASS
ci/iol-intel-Functional success Functional Testing PASS
ci/github-robot: build success github build: passed
ci/iol-aarch64-unit-testing success Testing PASS
ci/iol-aarch64-compile-testing success Testing PASS
ci/iol-x86_64-unit-testing success Testing PASS
ci/iol-x86_64-compile-testing success Testing PASS
ci/intel-Testing success Testing PASS

Commit Message

Satheesh Paul Antonysamy Sept. 22, 2022, 4:59 a.m. UTC
  From: Kiran Kumar K <kirankumark@marvell.com>

Added changes to base rule install mechanism.
If action type is IPsec and multi channel is set,
then base rule will not be merged.

Signed-off-by: Kiran Kumar K <kirankumark@marvell.com>
Reviewed-by: Satheesh Paul Antonysamy <psatheesh@marvell.com>
---
 drivers/common/cnxk/roc_npc_mcam.c | 12 +++++++++++-
 1 file changed, 11 insertions(+), 1 deletion(-)
  

Comments

Jerin Jacob Sept. 22, 2022, 8:35 a.m. UTC | #1
On Thu, Sep 22, 2022 at 10:29 AM <psatheesh@marvell.com> wrote:
>
> From: Kiran Kumar K <kirankumark@marvell.com>
>
> Added changes to base rule install mechanism.
> If action type is IPsec and multi channel is set,
> then base rule will not be merged.
>
> Signed-off-by: Kiran Kumar K <kirankumark@marvell.com>
> Reviewed-by: Satheesh Paul Antonysamy <psatheesh@marvell.com>

Please keep the consistent name.

Updated the git commit as follows and applied to
dpdk-next-net-mrvl/for-next-net. Thanks


    common/cnxk: update base rule merging mechanism

    Added changes to base rule install mechanism.
    If action type is IPsec and multi channel is set,
    then base rule will not be merged.

    Signed-off-by: Kiran Kumar K <kirankumark@marvell.com>
    Reviewed-by: Satheesh Paul <psatheesh@marvell.com>

> ---
>  drivers/common/cnxk/roc_npc_mcam.c | 12 +++++++++++-
>  1 file changed, 11 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/common/cnxk/roc_npc_mcam.c b/drivers/common/cnxk/roc_npc_mcam.c
> index 4bea6719c5..a725cabc57 100644
> --- a/drivers/common/cnxk/roc_npc_mcam.c
> +++ b/drivers/common/cnxk/roc_npc_mcam.c
> @@ -720,10 +720,13 @@ npc_program_mcam(struct npc *npc, struct npc_parse_state *pst, bool mcam_alloc)
>         uint64_t key_data[2] = {0ULL, 0ULL};
>         uint64_t key_mask[2] = {0ULL, 0ULL};
>         int key_len, bit = 0, index, rc = 0;
> +       struct nix_inl_dev *inl_dev = NULL;
>         int intf = pst->flow->nix_intf;
>         struct mcam_entry *base_entry;
> +       bool skip_base_rule = false;
>         int off, idx, data_off = 0;
>         uint8_t lid, mask, data;
> +       struct idev_cfg *idev;
>         uint16_t layer_info;
>         uint64_t lt, flags;
>
> @@ -789,7 +792,14 @@ npc_program_mcam(struct npc *npc, struct npc_parse_state *pst, bool mcam_alloc)
>         if (pst->set_ipv6ext_ltype_mask)
>                 npc_set_ipv6ext_ltype_mask(pst);
>
> -       if (pst->is_vf && pst->flow->nix_intf == NIX_INTF_RX) {
> +       idev = idev_get_cfg();
> +       if (idev)
> +               inl_dev = idev->nix_inl_dev;
> +       if (inl_dev && inl_dev->is_multi_channel &&
> +           (pst->flow->npc_action & NIX_RX_ACTIONOP_UCAST_IPSEC))
> +               skip_base_rule = true;
> +
> +       if (pst->is_vf && pst->flow->nix_intf == NIX_INTF_RX && !skip_base_rule) {
>                 (void)mbox_alloc_msg_npc_read_base_steer_rule(npc->mbox);
>                 rc = mbox_process_msg(npc->mbox, (void *)&base_rule_rsp);
>                 if (rc) {
> --
> 2.35.3
>
  

Patch

diff --git a/drivers/common/cnxk/roc_npc_mcam.c b/drivers/common/cnxk/roc_npc_mcam.c
index 4bea6719c5..a725cabc57 100644
--- a/drivers/common/cnxk/roc_npc_mcam.c
+++ b/drivers/common/cnxk/roc_npc_mcam.c
@@ -720,10 +720,13 @@  npc_program_mcam(struct npc *npc, struct npc_parse_state *pst, bool mcam_alloc)
 	uint64_t key_data[2] = {0ULL, 0ULL};
 	uint64_t key_mask[2] = {0ULL, 0ULL};
 	int key_len, bit = 0, index, rc = 0;
+	struct nix_inl_dev *inl_dev = NULL;
 	int intf = pst->flow->nix_intf;
 	struct mcam_entry *base_entry;
+	bool skip_base_rule = false;
 	int off, idx, data_off = 0;
 	uint8_t lid, mask, data;
+	struct idev_cfg *idev;
 	uint16_t layer_info;
 	uint64_t lt, flags;
 
@@ -789,7 +792,14 @@  npc_program_mcam(struct npc *npc, struct npc_parse_state *pst, bool mcam_alloc)
 	if (pst->set_ipv6ext_ltype_mask)
 		npc_set_ipv6ext_ltype_mask(pst);
 
-	if (pst->is_vf && pst->flow->nix_intf == NIX_INTF_RX) {
+	idev = idev_get_cfg();
+	if (idev)
+		inl_dev = idev->nix_inl_dev;
+	if (inl_dev && inl_dev->is_multi_channel &&
+	    (pst->flow->npc_action & NIX_RX_ACTIONOP_UCAST_IPSEC))
+		skip_base_rule = true;
+
+	if (pst->is_vf && pst->flow->nix_intf == NIX_INTF_RX && !skip_base_rule) {
 		(void)mbox_alloc_msg_npc_read_base_steer_rule(npc->mbox);
 		rc = mbox_process_msg(npc->mbox, (void *)&base_rule_rsp);
 		if (rc) {