Hi,
> -----Original Message-----
> From: Wisam Monther <wisamm@nvidia.com>
> Sent: Tuesday, October 4, 2022 14:25
> To: Dariusz Sosnowski <dsosnowski@nvidia.com>
> Cc: dev@dpdk.org
> Subject: RE: [PATCH 7/7] app/flow-perf: add hairpin queue memory config
>
> Hi Dariusz,
>
> > -----Original Message-----
> > From: Dariusz Sosnowski <dsosnowski@nvidia.com>
> > Sent: Monday, September 19, 2022 7:38 PM
> > To: Wisam Monther <wisamm@nvidia.com>
> > Cc: dev@dpdk.org
> > Subject: [PATCH 7/7] app/flow-perf: add hairpin queue memory config
> >
> > This patch adds the hairpin-conf command line parameter to flow-perf
> > application. hairpin-conf parameter takes a hexadecimal bitmask with
> > bits having the following meaning:
> >
> > - Bit 0 - Force memory settings of hairpin RX queue.
> > - Bit 1 - Force memory settings of hairpin TX queue.
> > - Bit 4 - Use locked device memory for hairpin RX queue.
> > - Bit 5 - Use RTE memory for hairpin RX queue.
> > - Bit 8 - Use locked device memory for hairpin TX queue.
> > - Bit 9 - Use RTE memory for hairpin TX queue.
> >
> > Signed-off-by: Dariusz Sosnowski <dsosnowski@nvidia.com>
> > ---
>
> You have some checks issues; can you please kindly check them?
>
> BRs,
> Wisam Jaddo
I sent the v2. The checks issue should be fixed in that version.
Thank you.
Best regards,
Dariusz Sosnowski
@@ -46,6 +46,15 @@
#define DEFAULT_RULES_BATCH 100000
#define DEFAULT_GROUP 0
+#define HAIRPIN_RX_CONF_FORCE_MEMORY (0x0001)
+#define HAIRPIN_TX_CONF_FORCE_MEMORY (0x0002)
+
+#define HAIRPIN_RX_CONF_LOCKED_MEMORY (0x0010)
+#define HAIRPIN_RX_CONF_RTE_MEMORY (0x0020)
+
+#define HAIRPIN_TX_CONF_LOCKED_MEMORY (0x0100)
+#define HAIRPIN_TX_CONF_RTE_MEMORY (0x0200)
+
struct rte_flow *flow;
static uint8_t flow_group;
@@ -61,6 +70,7 @@ static uint32_t policy_id[MAX_PORTS];
static uint8_t items_idx, actions_idx, attrs_idx;
static uint64_t ports_mask;
+static uint64_t hairpin_conf_mask;
static uint16_t dst_ports[RTE_MAX_ETHPORTS];
static volatile bool force_quit;
static bool dump_iterations;
@@ -482,6 +492,7 @@ usage(char *progname)
printf(" --enable-fwd: To enable packets forwarding"
" after insertion\n");
printf(" --portmask=N: hexadecimal bitmask of ports used\n");
+ printf(" --hairpin-conf=0xXXXX: hexadecimal bitmask of hairpin queue configuration\n");
printf(" --random-priority=N,S: use random priority levels "
"from 0 to (N - 1) for flows "
"and S as seed for pseudo-random number generator\n");
@@ -629,6 +640,7 @@ static void
args_parse(int argc, char **argv)
{
uint64_t pm, seed;
+ uint64_t hp_conf;
char **argvopt;
uint32_t prio;
char *token;
@@ -648,6 +660,7 @@ args_parse(int argc, char **argv)
{ "enable-fwd", 0, 0, 0 },
{ "unique-data", 0, 0, 0 },
{ "portmask", 1, 0, 0 },
+ { "hairpin-conf", 1, 0, 0 },
{ "cores", 1, 0, 0 },
{ "random-priority", 1, 0, 0 },
{ "meter-profile-alg", 1, 0, 0 },
@@ -880,6 +893,13 @@ args_parse(int argc, char **argv)
rte_exit(EXIT_FAILURE, "Invalid fwd port mask\n");
ports_mask = pm;
}
+ if (strcmp(lgopts[opt_idx].name, "hairpin-conf") == 0) {
+ end = NULL;
+ hp_conf = strtoull(optarg, &end, 16);
+ if ((optarg[0] == '\0') || (end == NULL) || (*end != '\0'))
+ rte_exit(EXIT_FAILURE, "Invalid hairpin config mask\n");
+ hairpin_conf_mask = hp_conf;
+ }
if (strcmp(lgopts[opt_idx].name,
"port-id") == 0) {
uint16_t port_idx = 0;
@@ -2035,6 +2055,12 @@ init_port(void)
hairpin_conf.peers[0].port = port_id;
hairpin_conf.peers[0].queue =
std_queue + tx_queues_count;
+ hairpin_conf.use_locked_device_memory =
+ !!(hairpin_conf_mask & HAIRPIN_RX_CONF_LOCKED_MEMORY);
+ hairpin_conf.use_rte_memory =
+ !!(hairpin_conf_mask & HAIRPIN_RX_CONF_RTE_MEMORY);
+ hairpin_conf.force_memory =
+ !!(hairpin_conf_mask & HAIRPIN_RX_CONF_FORCE_MEMORY);
ret = rte_eth_rx_hairpin_queue_setup(
port_id, hairpin_queue,
rxd_count, &hairpin_conf);
@@ -2050,6 +2076,12 @@ init_port(void)
hairpin_conf.peers[0].port = port_id;
hairpin_conf.peers[0].queue =
std_queue + rx_queues_count;
+ hairpin_conf.use_locked_device_memory =
+ !!(hairpin_conf_mask & HAIRPIN_TX_CONF_LOCKED_MEMORY);
+ hairpin_conf.use_rte_memory =
+ !!(hairpin_conf_mask & HAIRPIN_TX_CONF_RTE_MEMORY);
+ hairpin_conf.force_memory =
+ !!(hairpin_conf_mask & HAIRPIN_TX_CONF_FORCE_MEMORY);
ret = rte_eth_tx_hairpin_queue_setup(
port_id, hairpin_queue,
txd_count, &hairpin_conf);