diff mbox series

crypto/qat: enable asymmetric crypto on gen3 device

Message ID 20221214163406.76060-1-ciara.power@intel.com (mailing list archive)
State Accepted, archived
Delegated to: akhil goyal
Headers
Series crypto/qat: enable asymmetric crypto on gen3 device |

Checks

Context Check Description
ci/checkpatch success coding style OK
ci/loongarch-compilation success Compilation OK
ci/loongarch-unit-testing success Unit Testing PASS
ci/iol-mellanox-Performance success Performance Testing PASS
ci/iol-broadcom-Functional success Functional Testing PASS
ci/Intel-compilation success Compilation OK
ci/iol-broadcom-Performance success Performance Testing PASS
ci/intel-Testing success Testing PASS
ci/iol-intel-Functional success Functional Testing PASS
ci/github-robot: build success github build: passed
ci/iol-intel-Performance success Performance Testing PASS
ci/iol-aarch64-unit-testing success Testing PASS
ci/iol-x86_64-compile-testing success Testing PASS
ci/iol-testing success Testing PASS
ci/iol-x86_64-unit-testing success Testing PASS
ci/iol-aarch64-compile-testing success Testing PASS

Commit Message

Power, Ciara Dec. 14, 2022, 4:34 p.m. UTC 
  This commit enables asymmetric crypto in generation three
devices.

Signed-off-by: Ciara Power <ciara.power@intel.com>
---
 doc/guides/cryptodevs/qat.rst                |  3 ++-
 doc/guides/rel_notes/release_23_03.rst       |  3 +++
 drivers/crypto/qat/dev/qat_crypto_pmd_gen3.c | 12 ++++++++----
 3 files changed, 13 insertions(+), 5 deletions(-)

Comments

Ji, Kai Jan. 11, 2023, 4:49 p.m. UTC | #1 
Acked-by: Kai Ji <kai.ji@intel.com>

> -----Original Message-----
> From: Power, Ciara <ciara.power@intel.com>
> Sent: Wednesday, December 14, 2022 4:34 PM
> To: Ji, Kai <kai.ji@intel.com>
> Cc: dev@dpdk.org; Kusztal, ArkadiuszX <arkadiuszx.kusztal@intel.com>;
> Power, Ciara <ciara.power@intel.com>
> Subject: [PATCH] crypto/qat: enable asymmetric crypto on gen3 device
> 
> This commit enables asymmetric crypto in generation three devices.
> 
> Signed-off-by: Ciara Power <ciara.power@intel.com>
> ---
> 2.34.1
Akhil Goyal Feb. 1, 2023, 2:14 p.m. UTC | #2 
> Acked-by: Kai Ji <kai.ji@intel.com>
> 
> > Subject: [PATCH] crypto/qat: enable asymmetric crypto on gen3 device
> >
> > This commit enables asymmetric crypto in generation three devices.
> >
> > Signed-off-by: Ciara Power <ciara.power@intel.com>
Applied to dpdk-next-crypto

Thanks.
diff mbox series

Patch

diff --git a/doc/guides/cryptodevs/qat.rst b/doc/guides/cryptodevs/qat.rst
index d1e64475c4..80952ae2fe 100644
--- a/doc/guides/cryptodevs/qat.rst
+++ b/doc/guides/cryptodevs/qat.rst
@@ -168,6 +168,7 @@  poll mode crypto driver support for the following hardware accelerator devices:
 * ``Intel QuickAssist Technology C62x``
 * ``Intel QuickAssist Technology C3xxx``
 * ``Intel QuickAssist Technology D15xx``
+* ``Intel QuickAssist Technology C4xxx``
 * ``Intel QuickAssist Technology 4xxx``
 * ``Intel QuickAssist Technology 401xxx``
 
@@ -391,7 +392,7 @@  to see the full table)
    +-----+-----+-----+-----+----------+---------------+---------------+------------+--------+------+--------+--------+
    | Yes | No  | No  | 2   | D15xx    | p             | qat_d15xx     | d15xx      | 6f54   | 1    | 6f55   | 16     |
    +-----+-----+-----+-----+----------+---------------+---------------+------------+--------+------+--------+--------+
-   | Yes | No  | No  | 3   | C4xxx    | p             | qat_c4xxx     | c4xxx      | 18a0   | 1    | 18a1   | 128    |
+   | Yes | Yes | No  | 3   | C4xxx    | p             | qat_c4xxx     | c4xxx      | 18a0   | 1    | 18a1   | 128    |
    +-----+-----+-----+-----+----------+---------------+---------------+------------+--------+------+--------+--------+
    | Yes | Yes | No  | 4   | 4xxx     | linux/5.11+   | qat_4xxx      | 4xxx       | 4940   | 4    | 4941   | 16     |
    +-----+-----+-----+-----+----------+---------------+---------------+------------+--------+------+--------+--------+
diff --git a/doc/guides/rel_notes/release_23_03.rst b/doc/guides/rel_notes/release_23_03.rst
index b8c5b68d6c..922e414394 100644
--- a/doc/guides/rel_notes/release_23_03.rst
+++ b/doc/guides/rel_notes/release_23_03.rst
@@ -55,6 +55,9 @@  New Features
      Also, make sure to start the actual text at the margin.
      =======================================================
 
+* **Updated Intel QuickAssist Technology (QAT) crypto driver.**
+
+  * Added Asymmetric Crypto support for GEN3.
 
 Removed Items
 -------------
diff --git a/drivers/crypto/qat/dev/qat_crypto_pmd_gen3.c b/drivers/crypto/qat/dev/qat_crypto_pmd_gen3.c
index 7f00f6097d..6dc485d365 100644
--- a/drivers/crypto/qat/dev/qat_crypto_pmd_gen3.c
+++ b/drivers/crypto/qat/dev/qat_crypto_pmd_gen3.c
@@ -725,8 +725,12 @@  RTE_INIT(qat_sym_crypto_gen3_init)
 
 RTE_INIT(qat_asym_crypto_gen3_init)
 {
-	qat_asym_gen_dev_ops[QAT_GEN3].cryptodev_ops = NULL;
-	qat_asym_gen_dev_ops[QAT_GEN3].get_capabilities = NULL;
-	qat_asym_gen_dev_ops[QAT_GEN3].get_feature_flags = NULL;
-	qat_asym_gen_dev_ops[QAT_GEN3].set_session = NULL;
+	qat_asym_gen_dev_ops[QAT_GEN3].cryptodev_ops =
+			&qat_asym_crypto_ops_gen1;
+	qat_asym_gen_dev_ops[QAT_GEN3].get_capabilities =
+			qat_asym_crypto_cap_get_gen1;
+	qat_asym_gen_dev_ops[QAT_GEN3].get_feature_flags =
+			qat_asym_crypto_feature_flags_get_gen1;
+	qat_asym_gen_dev_ops[QAT_GEN3].set_session =
+			qat_asym_crypto_set_session_gen1;
 }