[dpdk-dev,v3,24/40] config: enable NXP DPAA PMD compilation
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Commit Message
Signed-off-by: Shreyansh Jain <shreyansh.jain@nxp.com>
---
config/common_base | 1 +
config/defconfig_arm64-dpaa-linuxapp-gcc | 12 ++++++++++++
drivers/net/Makefile | 2 ++
mk/rte.app.mk | 5 +++++
4 files changed, 20 insertions(+)
Comments
23/08/2017 16:11, Shreyansh Jain:
> --- a/config/defconfig_arm64-dpaa-linuxapp-gcc
> +++ b/config/defconfig_arm64-dpaa-linuxapp-gcc
> +#
> +# Compile Environment Abstraction Layer
> +#
> +CONFIG_RTE_MAX_LCORE=4
> +CONFIG_RTE_MAX_NUMA_NODES=1
> +CONFIG_RTE_CACHE_LINE_SIZE=64
> +CONFIG_RTE_PKTMBUF_HEADROOM=128
This should be part of the SoC introduction.
The rest of this patch can be squashed with PMD skeleton.
[...]
> --- a/mk/rte.app.mk
> +++ b/mk/rte.app.mk
> @@ -116,6 +116,7 @@ _LDLIBS-$(CONFIG_RTE_LIBRTE_BNX2X_PMD) += -lrte_pmd_bnx2x -lz
> _LDLIBS-$(CONFIG_RTE_LIBRTE_BNXT_PMD) += -lrte_pmd_bnxt
> _LDLIBS-$(CONFIG_RTE_LIBRTE_PMD_BOND) += -lrte_pmd_bond
> _LDLIBS-$(CONFIG_RTE_LIBRTE_CXGBE_PMD) += -lrte_pmd_cxgbe
> +_LDLIBS-$(CONFIG_RTE_LIBRTE_DPAA_PMD) += -lrte_pmd_dpaa
> _LDLIBS-$(CONFIG_RTE_LIBRTE_DPAA2_PMD) += -lrte_pmd_dpaa2
> _LDLIBS-$(CONFIG_RTE_LIBRTE_E1000_PMD) += -lrte_pmd_e1000
> _LDLIBS-$(CONFIG_RTE_LIBRTE_ENA_PMD) += -lrte_pmd_ena
> @@ -182,6 +183,10 @@ _LDLIBS-$(CONFIG_RTE_LIBRTE_DPAA2_PMD) += -lrte_bus_fslmc
> _LDLIBS-$(CONFIG_RTE_LIBRTE_DPAA2_PMD) += -lrte_mempool_dpaa2
> endif # CONFIG_RTE_LIBRTE_DPAA2_PMD
>
> +ifeq ($(CONFIG_RTE_LIBRTE_DPAA_PMD),y)
> +_LDLIBS-$(CONFIG_RTE_LIBRTE_DPAA_PMD) += -lrte_bus_dpaa
> +endif
It does not make sense. Please read it carefully.
The same config condition is used twice.
And the dependency should be on the same line as the PMD link above.
The same mistake was done for DPAA2. Please fix it separately.
On Friday 22 September 2017 03:33 AM, Thomas Monjalon wrote:
> 23/08/2017 16:11, Shreyansh Jain:
>> --- a/config/defconfig_arm64-dpaa-linuxapp-gcc
>> +++ b/config/defconfig_arm64-dpaa-linuxapp-gcc
>> +#
>> +# Compile Environment Abstraction Layer
>> +#
>> +CONFIG_RTE_MAX_LCORE=4
>> +CONFIG_RTE_MAX_NUMA_NODES=1
>> +CONFIG_RTE_CACHE_LINE_SIZE=64
>> +CONFIG_RTE_PKTMBUF_HEADROOM=128
>
> This should be part of the SoC introduction.
>
> The rest of this patch can be squashed with PMD skeleton.
Ok. I will revisit this.
>
> [...]
>> --- a/mk/rte.app.mk
>> +++ b/mk/rte.app.mk
>> @@ -116,6 +116,7 @@ _LDLIBS-$(CONFIG_RTE_LIBRTE_BNX2X_PMD) += -lrte_pmd_bnx2x -lz
>> _LDLIBS-$(CONFIG_RTE_LIBRTE_BNXT_PMD) += -lrte_pmd_bnxt
>> _LDLIBS-$(CONFIG_RTE_LIBRTE_PMD_BOND) += -lrte_pmd_bond
>> _LDLIBS-$(CONFIG_RTE_LIBRTE_CXGBE_PMD) += -lrte_pmd_cxgbe
>> +_LDLIBS-$(CONFIG_RTE_LIBRTE_DPAA_PMD) += -lrte_pmd_dpaa
>> _LDLIBS-$(CONFIG_RTE_LIBRTE_DPAA2_PMD) += -lrte_pmd_dpaa2
>> _LDLIBS-$(CONFIG_RTE_LIBRTE_E1000_PMD) += -lrte_pmd_e1000
>> _LDLIBS-$(CONFIG_RTE_LIBRTE_ENA_PMD) += -lrte_pmd_ena
>> @@ -182,6 +183,10 @@ _LDLIBS-$(CONFIG_RTE_LIBRTE_DPAA2_PMD) += -lrte_bus_fslmc
>> _LDLIBS-$(CONFIG_RTE_LIBRTE_DPAA2_PMD) += -lrte_mempool_dpaa2
>> endif # CONFIG_RTE_LIBRTE_DPAA2_PMD
>>
>> +ifeq ($(CONFIG_RTE_LIBRTE_DPAA_PMD),y)
>> +_LDLIBS-$(CONFIG_RTE_LIBRTE_DPAA_PMD) += -lrte_bus_dpaa
>> +endif
>
> It does not make sense. Please read it carefully.
> The same config condition is used twice.
>
> And the dependency should be on the same line as the PMD link above.
>
> The same mistake was done for DPAA2. Please fix it separately.
>
>
This definitely is fishy. I am not sure why I did this - but it seems
that I was trying to base this linking on BUS_DPAA was available.
Apologies. I will fix this.
@@ -306,6 +306,7 @@ CONFIG_RTE_LIBRTE_LIO_DEBUG_REGS=n
# NXP DPAA Bus
CONFIG_RTE_LIBRTE_DPAA_BUS=n
CONFIG_RTE_LIBRTE_DPAA_MEMPOOL=n
+CONFIG_RTE_LIBRTE_DPAA_PMD=n
#
# Compile NXP DPAA2 FSL-MC Bus
@@ -38,6 +38,14 @@ CONFIG_RTE_ARCH_ARM_TUNE="cortex-a72"
CONFIG_RTE_LIBRTE_VHOST_NUMA=n
CONFIG_RTE_EAL_NUMA_AWARE_HUGEPAGES=n
+#
+# Compile Environment Abstraction Layer
+#
+CONFIG_RTE_MAX_LCORE=4
+CONFIG_RTE_MAX_NUMA_NODES=1
+CONFIG_RTE_CACHE_LINE_SIZE=64
+CONFIG_RTE_PKTMBUF_HEADROOM=128
+
# NXP DPAA Bus
CONFIG_RTE_LIBRTE_DPAA_BUS=y
CONFIG_RTE_LIBRTE_DPAA_DEBUG_BUS=n
@@ -48,3 +56,7 @@ CONFIG_RTE_LIBRTE_DPAA_DEBUG_DRIVER=n
CONFIG_RTE_LIBRTE_DPAA_MEMPOOL=y
CONFIG_RTE_LIBRTE_DPAA_MEMPOOL_DEBUG=n
CONFIG_RTE_MBUF_DEFAULT_MEMPOOL_OPS="dpaa"
+
+# Compile software NXP DPAA PMD
+CONFIG_RTE_LIBRTE_DPAA_PMD=y
+CONFIG_RTE_LIBRTE_DPAA_PMD_DEBUG=n
@@ -51,6 +51,8 @@ DIRS-$(CONFIG_RTE_LIBRTE_PMD_BOND) += bonding
DEPDIRS-bonding = $(core-libs) librte_cmdline
DIRS-$(CONFIG_RTE_LIBRTE_CXGBE_PMD) += cxgbe
DEPDIRS-cxgbe = $(core-libs)
+DIRS-$(CONFIG_RTE_LIBRTE_DPAA_PMD) += dpaa
+DEPDIRS-dpaa = $(core-libs)
DIRS-$(CONFIG_RTE_LIBRTE_DPAA2_PMD) += dpaa2
DEPDIRS-dpaa2 = $(core-libs)
DIRS-$(CONFIG_RTE_LIBRTE_E1000_PMD) += e1000
@@ -116,6 +116,7 @@ _LDLIBS-$(CONFIG_RTE_LIBRTE_BNX2X_PMD) += -lrte_pmd_bnx2x -lz
_LDLIBS-$(CONFIG_RTE_LIBRTE_BNXT_PMD) += -lrte_pmd_bnxt
_LDLIBS-$(CONFIG_RTE_LIBRTE_PMD_BOND) += -lrte_pmd_bond
_LDLIBS-$(CONFIG_RTE_LIBRTE_CXGBE_PMD) += -lrte_pmd_cxgbe
+_LDLIBS-$(CONFIG_RTE_LIBRTE_DPAA_PMD) += -lrte_pmd_dpaa
_LDLIBS-$(CONFIG_RTE_LIBRTE_DPAA2_PMD) += -lrte_pmd_dpaa2
_LDLIBS-$(CONFIG_RTE_LIBRTE_E1000_PMD) += -lrte_pmd_e1000
_LDLIBS-$(CONFIG_RTE_LIBRTE_ENA_PMD) += -lrte_pmd_ena
@@ -182,6 +183,10 @@ _LDLIBS-$(CONFIG_RTE_LIBRTE_DPAA2_PMD) += -lrte_bus_fslmc
_LDLIBS-$(CONFIG_RTE_LIBRTE_DPAA2_PMD) += -lrte_mempool_dpaa2
endif # CONFIG_RTE_LIBRTE_DPAA2_PMD
+ifeq ($(CONFIG_RTE_LIBRTE_DPAA_PMD),y)
+_LDLIBS-$(CONFIG_RTE_LIBRTE_DPAA_PMD) += -lrte_bus_dpaa
+endif
+
endif # !CONFIG_RTE_BUILD_SHARED_LIBS
_LDLIBS-y += --no-whole-archive