crypto/cnxk: support for TTL or hop limit decrement

Message ID 20220218124923.488904-1-vfialko@marvell.com (mailing list archive)
State Accepted, archived
Delegated to: akhil goyal
Headers
Series crypto/cnxk: support for TTL or hop limit decrement |

Checks

Context Check Description
ci/checkpatch success coding style OK
ci/Intel-compilation success Compilation OK
ci/github-robot: build success github build: passed
ci/intel-Testing success Testing PASS
ci/iol-mellanox-Performance success Performance Testing PASS
ci/iol-broadcom-Functional success Functional Testing PASS
ci/iol-broadcom-Performance success Performance Testing PASS
ci/iol-intel-Performance success Performance Testing PASS
ci/iol-intel-Functional success Functional Testing PASS
ci/iol-aarch64-unit-testing success Testing PASS
ci/iol-aarch64-compile-testing success Testing PASS
ci/iol-x86_64-compile-testing success Testing PASS
ci/iol-abi-testing success Testing PASS
ci/iol-x86_64-unit-testing success Testing PASS

Commit Message

Volodymyr Fialko Feb. 18, 2022, 12:49 p.m. UTC
  Add support for TTL if IPv4 or hop limit if IPv6 decrement for cn10k.

Signed-off-by: Volodymyr Fialko <vfialko@marvell.com>
Acked-by: Anoob Joseph <anoobj@marvell.com>
---
 drivers/crypto/cnxk/cn10k_ipsec.c                 | 2 ++
 drivers/crypto/cnxk/cnxk_cryptodev_capabilities.c | 1 +
 2 files changed, 3 insertions(+)
  

Comments

Akhil Goyal Feb. 22, 2022, 7:36 p.m. UTC | #1
> Add support for TTL if IPv4 or hop limit if IPv6 decrement for cn10k.
> 
> Signed-off-by: Volodymyr Fialko <vfialko@marvell.com>
> Acked-by: Anoob Joseph <anoobj@marvell.com>
> ---
Applied to dpdk-next-crypto

Thanks.
  

Patch

diff --git a/drivers/crypto/cnxk/cn10k_ipsec.c b/drivers/crypto/cnxk/cn10k_ipsec.c
index 847e1d026e..15ebd57f52 100644
--- a/drivers/crypto/cnxk/cn10k_ipsec.c
+++ b/drivers/crypto/cnxk/cn10k_ipsec.c
@@ -102,6 +102,8 @@  cn10k_ipsec_outb_sa_create(struct roc_cpt *roc_cpt, struct roc_cpt_lf *lf,
 
 	param1.u16 = 0;
 
+	param1.s.ttl_or_hop_limit = ipsec_xfrm->options.dec_ttl;
+
 	/* Disable IP checksum computation by default */
 	param1.s.ip_csum_disable = ROC_IE_OT_SA_INNER_PKT_IP_CSUM_DISABLE;
 
diff --git a/drivers/crypto/cnxk/cnxk_cryptodev_capabilities.c b/drivers/crypto/cnxk/cnxk_cryptodev_capabilities.c
index 7347f6d221..2f8001e0b2 100644
--- a/drivers/crypto/cnxk/cnxk_cryptodev_capabilities.c
+++ b/drivers/crypto/cnxk/cnxk_cryptodev_capabilities.c
@@ -1144,6 +1144,7 @@  cn10k_sec_caps_update(struct rte_security_capability *sec_cap)
 			sec_cap->ipsec.options.tunnel_hdr_verify =
 				RTE_SECURITY_IPSEC_TUNNEL_VERIFY_SRC_DST_ADDR;
 	}
+	sec_cap->ipsec.options.dec_ttl = 1;
 	sec_cap->ipsec.options.ip_csum_enable = 1;
 	sec_cap->ipsec.options.l4_csum_enable = 1;
 	sec_cap->ipsec.options.stats = 1;