[v2,1/1] doc: fix cnxk platform HW accelerator blocks list

Message ID 20230314064501.14876-1-syalavarthi@marvell.com (mailing list archive)
State Accepted, archived
Delegated to: Jerin Jacob
Headers
Series [v2,1/1] doc: fix cnxk platform HW accelerator blocks list |

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Commit Message

Srikanth Yalavarthi March 14, 2023, 6:45 a.m. UTC
  Add ML to the list of platform hardware accelerator blocks,
and added reference to ML device driver.

Fixes: fe83ffd9ec2e ("ml/cnxk: add skeleton")

Signed-off-by: Srikanth Yalavarthi <syalavarthi@marvell.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>

---

v2:
* Updated fixes and commit message
* Updated device table index

 doc/guides/platform/cnxk.rst | 5 +++++
 1 file changed, 5 insertions(+)
  

Comments

Jerin Jacob March 15, 2023, 5:53 a.m. UTC | #1
On Tue, Mar 14, 2023 at 12:15 PM Srikanth Yalavarthi
<syalavarthi@marvell.com> wrote:
>
> Add ML to the list of platform hardware accelerator blocks,
> and added reference to ML device driver.
>
> Fixes: fe83ffd9ec2e ("ml/cnxk: add skeleton")
>
> Signed-off-by: Srikanth Yalavarthi <syalavarthi@marvell.com>
> Acked-by: Jerin Jacob <jerinj@marvell.com>


Applied to dpdk-next-net-mrvl/for-next-net. Thanks

>
> ---
>
> v2:
> * Updated fixes and commit message
> * Updated device table index
>
>  doc/guides/platform/cnxk.rst | 5 +++++
>  1 file changed, 5 insertions(+)
>
> diff --git a/doc/guides/platform/cnxk.rst b/doc/guides/platform/cnxk.rst
> index aadd60b5d4..4a1966c66b 100644
> --- a/doc/guides/platform/cnxk.rst
> +++ b/doc/guides/platform/cnxk.rst
> @@ -76,6 +76,8 @@ DPDK subsystem.
>     +---+-----+--------------------------------------------------------------+
>     | 12| GPIO| rte_rawdev                                                   |
>     +---+-----+--------------------------------------------------------------+
> +   | 13| ML  | rte_mldev                                                    |
> +   +---+-----+--------------------------------------------------------------+
>
>  PF0 is called the administrative / admin function (AF) and has exclusive
>  privileges to provision RVU functional block's LFs to each of the PF/VF.
> @@ -165,6 +167,9 @@ This section lists dataplane H/W block(s) available in cnxk SoC.
>  #. **Regex Device Driver**
>     See :doc:`../regexdevs/cn9k` for REE Regex device driver information.
>
> +#. **ML Device Driver**
> +   See :doc:`../mldevs/cnxk` for Machine Learning device driver information.
> +
>  Procedure to Setup Platform
>  ---------------------------
>
> --
> 2.17.1
>
  

Patch

diff --git a/doc/guides/platform/cnxk.rst b/doc/guides/platform/cnxk.rst
index aadd60b5d4..4a1966c66b 100644
--- a/doc/guides/platform/cnxk.rst
+++ b/doc/guides/platform/cnxk.rst
@@ -76,6 +76,8 @@  DPDK subsystem.
    +---+-----+--------------------------------------------------------------+
    | 12| GPIO| rte_rawdev                                                   |
    +---+-----+--------------------------------------------------------------+
+   | 13| ML  | rte_mldev                                                    |
+   +---+-----+--------------------------------------------------------------+
 
 PF0 is called the administrative / admin function (AF) and has exclusive
 privileges to provision RVU functional block's LFs to each of the PF/VF.
@@ -165,6 +167,9 @@  This section lists dataplane H/W block(s) available in cnxk SoC.
 #. **Regex Device Driver**
    See :doc:`../regexdevs/cn9k` for REE Regex device driver information.
 
+#. **ML Device Driver**
+   See :doc:`../mldevs/cnxk` for Machine Learning device driver information.
+
 Procedure to Setup Platform
 ---------------------------