[1/1] ml/cnxk: fix multiple coverity issues

Message ID 20230315135427.11489-1-syalavarthi@marvell.com (mailing list archive)
State Superseded, archived
Delegated to: Thomas Monjalon
Headers
Series [1/1] ml/cnxk: fix multiple coverity issues |

Checks

Context Check Description
ci/checkpatch success coding style OK
ci/loongarch-compilation success Compilation OK
ci/loongarch-unit-testing success Unit Testing PASS
ci/Intel-compilation success Compilation OK
ci/intel-Testing success Testing PASS
ci/intel-Functional fail Functional issues
ci/github-robot: build success github build: passed
ci/iol-mellanox-Performance success Performance Testing PASS
ci/iol-broadcom-Performance success Performance Testing PASS
ci/iol-broadcom-Functional success Functional Testing PASS
ci/iol-intel-Performance success Performance Testing PASS
ci/iol-intel-Functional success Functional Testing PASS
ci/iol-x86_64-compile-testing success Testing PASS
ci/iol-aarch64-unit-testing success Testing PASS
ci/iol-aarch64-compile-testing success Testing PASS
ci/iol-abi-testing success Testing PASS
ci/iol-testing success Testing PASS
ci/iol-x86_64-unit-testing success Testing PASS

Commit Message

Srikanth Yalavarthi March 15, 2023, 1:54 p.m. UTC
  Added checks for null pointers. Removed logically dead
code. Fix division or modulo by zero. Fix evaludation
order violation issues.

Coverity issue: 383658 383659, 383664, 383665
Fixes: 817e3e55bb18 ("ml/cnxk: support simulator environment")
Fixes: da3325131d71 ("ml/cnxk: find OCM mask and page slots for a model")
Fixes: b7d0650ebce0 ("ml/cnxk: reserve and free OCM pages")
Fixes: 4ff4ab8e1a20 ("ml/cnxk: support extended statistics")

Signed-off-by: Srikanth Yalavarthi <syalavarthi@marvell.com>
---
 drivers/ml/cnxk/cn10k_ml_dev.c |  4 ++--
 drivers/ml/cnxk/cn10k_ml_ocm.c | 33 +++++++--------------------------
 drivers/ml/cnxk/cn10k_ml_ops.c |  3 ++-
 3 files changed, 11 insertions(+), 29 deletions(-)
  

Patch

diff --git a/drivers/ml/cnxk/cn10k_ml_dev.c b/drivers/ml/cnxk/cn10k_ml_dev.c
index 6f9a1015a6..bba3c9022e 100644
--- a/drivers/ml/cnxk/cn10k_ml_dev.c
+++ b/drivers/ml/cnxk/cn10k_ml_dev.c
@@ -779,8 +779,8 @@  cn10k_ml_fw_load(struct cn10k_ml_dev *mldev)
 	if (roc_env_is_emulator() || roc_env_is_hw()) {
 		/* Read firmware image to a buffer */
 		ret = rte_firmware_read(fw->path, &fw_buffer, &fw_size);
-		if (ret < 0) {
-			plt_err("Can't read firmware data: %s\n", fw->path);
+		if ((ret < 0) || (fw_buffer == NULL)) {
+			plt_err("Unable to read firmware data: %s\n", fw->path);
 			return ret;
 		}
 
diff --git a/drivers/ml/cnxk/cn10k_ml_ocm.c b/drivers/ml/cnxk/cn10k_ml_ocm.c
index d8d2c71a3c..f0f76b83b3 100644
--- a/drivers/ml/cnxk/cn10k_ml_ocm.c
+++ b/drivers/ml/cnxk/cn10k_ml_ocm.c
@@ -224,7 +224,6 @@  cn10k_ml_ocm_tilemask_find(struct rte_ml_dev *dev, uint8_t num_tiles, uint16_t w
 	uint16_t scratch_page_start;
 	int used_last_wb_page_max;
 	uint16_t scratch_page_end;
-	uint8_t search_start_tile;
 	uint8_t search_end_tile;
 	uint8_t *local_ocm_mask;
 	int wb_page_start_curr;
@@ -235,7 +234,6 @@  cn10k_ml_ocm_tilemask_find(struct rte_ml_dev *dev, uint8_t num_tiles, uint16_t w
 	uint16_t word_id;
 	uint8_t tile_idx;
 	int max_slot_sz;
-	int start_tile;
 	int page_id;
 
 	mldev = dev->data->dev_private;
@@ -250,28 +248,14 @@  cn10k_ml_ocm_tilemask_find(struct rte_ml_dev *dev, uint8_t num_tiles, uint16_t w
 	wb_page_start = -1;
 	used_scratch_pages_max = 0;
 	used_last_wb_page_max = -1;
-	start_tile = -1;
 	max_slot_sz_curr = 0;
 	max_slot_sz = 0;
 	tile_idx = 0;
 
-	if ((start_tile != -1) && (start_tile % num_tiles != 0)) {
-		plt_err("Invalid start_tile, %d", start_tile);
-		return -1;
-	}
-
-	if (start_tile < 0) {
-		search_start_tile = 0;
-		search_end_tile = ocm->num_tiles - num_tiles;
-	} else {
-		search_start_tile = start_tile;
-		search_end_tile = start_tile;
-	}
-
-	/* nibbles + prefix '0x' */
+	search_end_tile = ocm->num_tiles - num_tiles;
 	local_ocm_mask = rte_zmalloc("local_ocm_mask", mldev->ocm.mask_words, RTE_CACHE_LINE_SIZE);
+	tile_start = 0;
 
-	tile_start = search_start_tile;
 start_search:
 	used_scratch_pages_max = 0;
 	used_last_wb_page_max = -1;
@@ -423,10 +407,8 @@  cn10k_ml_ocm_free_pages(struct rte_ml_dev *dev, uint16_t model_id)
 	wb_page_end = wb_page_start + model->model_mem_map.wb_pages - 1;
 	for (tile_id = model->addr.tile_start; tile_id <= model->addr.tile_end; tile_id++) {
 		for (page_id = wb_page_start; page_id <= wb_page_end; page_id++) {
-			ocm->tile_ocm_info[tile_id].ocm_mask[page_id / OCM_MAP_WORD_SIZE] =
-				CLEAR_BIT(ocm->tile_ocm_info[tile_id]
-						  .ocm_mask[page_id / OCM_MAP_WORD_SIZE],
-					  page_id % OCM_MAP_WORD_SIZE);
+			CLEAR_BIT(ocm->tile_ocm_info[tile_id].ocm_mask[page_id / OCM_MAP_WORD_SIZE],
+				  page_id % OCM_MAP_WORD_SIZE);
 		}
 
 		/* Update last_wb_page size */
@@ -452,10 +434,9 @@  cn10k_ml_ocm_free_pages(struct rte_ml_dev *dev, uint16_t model_id)
 			prev_start = ocm->num_pages - ocm->tile_ocm_info[tile_id].scratch_pages;
 			curr_start = ocm->num_pages - scratch_resize_pages;
 			for (page_id = prev_start; page_id < curr_start; page_id++) {
-				ocm->tile_ocm_info[tile_id].ocm_mask[page_id / OCM_MAP_WORD_SIZE] =
-					CLEAR_BIT(ocm->tile_ocm_info[tile_id]
-							  .ocm_mask[page_id / OCM_MAP_WORD_SIZE],
-						  page_id % OCM_MAP_WORD_SIZE);
+				CLEAR_BIT(ocm->tile_ocm_info[tile_id]
+						  .ocm_mask[page_id / OCM_MAP_WORD_SIZE],
+					  page_id % OCM_MAP_WORD_SIZE);
 			}
 			ocm->tile_ocm_info[tile_id].scratch_pages = scratch_resize_pages;
 		}
diff --git a/drivers/ml/cnxk/cn10k_ml_ops.c b/drivers/ml/cnxk/cn10k_ml_ops.c
index 7d5eb97668..bf9409ad10 100644
--- a/drivers/ml/cnxk/cn10k_ml_ops.c
+++ b/drivers/ml/cnxk/cn10k_ml_ops.c
@@ -444,7 +444,8 @@  cn10k_ml_prep_fp_job_descriptor(struct rte_ml_dev *dev, struct cn10k_ml_req *req
 			count += model->burst_stats[qp_id].dequeued_count -                        \
 				 model->burst_stats[qp_id].str##_reset_count;                      \
 		}                                                                                  \
-		value = value / count;                                                             \
+		if (count != 0)                                                                    \
+			value = value / count;                                                     \
 	} while (0)
 
 #define ML_MIN_FOREACH_QP(dev, model, qp_id, str, value, count)                                    \