[v2,5/9] net/mlx5: add port ID item to Direct Verbs

Message ID 1555586930-109097-6-git-send-email-orika@mellanox.com
State Superseded, archived
Delegated to: Shahaf Shuler
Headers show
Series
  • net/mlx5: add Direct Verbs E-Switch support
Related show

Checks

Context Check Description
ci/Intel-compilation fail apply issues
ci/checkpatch success coding style OK

Commit Message

Ori Kam April 18, 2019, 11:28 a.m.
Adds the port ID item to the DV steering code.

Signed-off-by: Ori Kam <orika@mellanox.com>
---
v2:
* Address ML comments.
---
 drivers/net/mlx5/mlx5_flow_dv.c | 84 ++++++++++++++++++++++++++++++-----------
 1 file changed, 61 insertions(+), 23 deletions(-)

Comments

Yongseok Koh April 18, 2019, 12:17 p.m. | #1
On Thu, Apr 18, 2019 at 11:28:46AM +0000, Ori Kam wrote:
> Adds the port ID item to the DV steering code.
> 
> Signed-off-by: Ori Kam <orika@mellanox.com>
> ---

Acked-by: Yongseok Koh <yskoh@mellanox.com>

> v2:
> * Address ML comments.
> ---
>  drivers/net/mlx5/mlx5_flow_dv.c | 84 ++++++++++++++++++++++++++++++-----------
>  1 file changed, 61 insertions(+), 23 deletions(-)
> 
> diff --git a/drivers/net/mlx5/mlx5_flow_dv.c b/drivers/net/mlx5/mlx5_flow_dv.c
> index b819359..e3d9aa2 100644
> --- a/drivers/net/mlx5/mlx5_flow_dv.c
> +++ b/drivers/net/mlx5/mlx5_flow_dv.c
> @@ -3086,6 +3086,62 @@ struct field_modify_info modify_tcp[] = {
>  	}
>  }
>  
> +/**
> + * Add source vport match to the specified matcher.
> + *
> + * @param[in, out] matcher
> + *   Flow matcher.
> + * @param[in, out] key
> + *   Flow matcher value.
> + * @param[in] port
> + *   Source vport value to match
> + * @param[in] mask
> + *   Mask
> + */
> +static void
> +flow_dv_translate_item_source_vport(void *matcher, void *key,
> +				    int16_t port, uint16_t mask)
> +{
> +	void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
> +	void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
> +
> +	MLX5_SET(fte_match_set_misc, misc_m, source_port, mask);
> +	MLX5_SET(fte_match_set_misc, misc_v, source_port, port);
> +}
> +
> +/**
> + * Translate port-id item to eswitch match on  port-id.
> + *
> + * @param[in] dev
> + *   The devich to configure through.
> + * @param[in, out] matcher
> + *   Flow matcher.
> + * @param[in, out] key
> + *   Flow matcher value.
> + * @param[in] item
> + *   Flow pattern to translate.
> + *
> + * @return
> + *   0 on success, a negative errno value otherwise.
> + */
> +static int
> +flow_dv_translate_item_port_id(struct rte_eth_dev *dev, void *matcher,
> +			       void *key, const struct rte_flow_item *item)
> +{
> +	const struct rte_flow_item_port_id *pid_m = item ? item->mask : NULL;
> +	const struct rte_flow_item_port_id *pid_v = item ? item->spec : NULL;
> +	uint16_t mask, val, id;
> +	int ret;
> +
> +	mask = pid_m ? pid_m->id : 0xffff;
> +	id = pid_v ? pid_v->id : dev->data->port_id;
> +	ret = mlx5_port_to_eswitch_info(id, NULL, &val);
> +	if (ret)
> +		return ret;
> +	flow_dv_translate_item_source_vport(matcher, key, val, mask);
> +	return 0;
> +}
> +
>  static uint32_t matcher_zero[MLX5_ST_SZ_DW(fte_match_param)] = { 0 };
>  
>  #define HEADER_IS_ZERO(match_criteria, headers)				     \
> @@ -3296,29 +3352,6 @@ struct field_modify_info modify_tcp[] = {
>  }
>  
>  /**
> - * Add source vport match to the specified matcher.
> - *
> - * @param[in, out] matcher
> - *   Flow matcher.
> - * @param[in, out] key
> - *   Flow matcher value.
> - * @param[in] port
> - *   Source vport value to match
> - * @param[in] mask
> - *   Mask
> - */
> -static void
> -flow_dv_translate_item_source_vport(void *matcher, void *key,
> -				    int16_t port, uint16_t mask)
> -{
> -	void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
> -	void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
> -
> -	MLX5_SET(fte_match_set_misc, misc_m, source_port, mask);
> -	MLX5_SET(fte_match_set_misc, misc_v, source_port, port);
> -}
> -
> -/**
>   * Find existing tag resource or create and register a new one.
>   *
>   * @param dev[in, out]
> @@ -3724,6 +3757,11 @@ struct field_modify_info modify_tcp[] = {
>  		void *match_value = dev_flow->dv.value.buf;
>  
>  		switch (items->type) {
> +		case RTE_FLOW_ITEM_TYPE_PORT_ID:
> +			flow_dv_translate_item_port_id(dev, match_mask,
> +						       match_value, items);
> +			last_item = MLX5_FLOW_ITEM_PORT_ID;
> +			break;
>  		case RTE_FLOW_ITEM_TYPE_ETH:
>  			flow_dv_translate_item_eth(match_mask, match_value,
>  						   items, tunnel);
> -- 
> 1.8.3.1
>

Patch

diff --git a/drivers/net/mlx5/mlx5_flow_dv.c b/drivers/net/mlx5/mlx5_flow_dv.c
index b819359..e3d9aa2 100644
--- a/drivers/net/mlx5/mlx5_flow_dv.c
+++ b/drivers/net/mlx5/mlx5_flow_dv.c
@@ -3086,6 +3086,62 @@  struct field_modify_info modify_tcp[] = {
 	}
 }
 
+/**
+ * Add source vport match to the specified matcher.
+ *
+ * @param[in, out] matcher
+ *   Flow matcher.
+ * @param[in, out] key
+ *   Flow matcher value.
+ * @param[in] port
+ *   Source vport value to match
+ * @param[in] mask
+ *   Mask
+ */
+static void
+flow_dv_translate_item_source_vport(void *matcher, void *key,
+				    int16_t port, uint16_t mask)
+{
+	void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
+	void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
+
+	MLX5_SET(fte_match_set_misc, misc_m, source_port, mask);
+	MLX5_SET(fte_match_set_misc, misc_v, source_port, port);
+}
+
+/**
+ * Translate port-id item to eswitch match on  port-id.
+ *
+ * @param[in] dev
+ *   The devich to configure through.
+ * @param[in, out] matcher
+ *   Flow matcher.
+ * @param[in, out] key
+ *   Flow matcher value.
+ * @param[in] item
+ *   Flow pattern to translate.
+ *
+ * @return
+ *   0 on success, a negative errno value otherwise.
+ */
+static int
+flow_dv_translate_item_port_id(struct rte_eth_dev *dev, void *matcher,
+			       void *key, const struct rte_flow_item *item)
+{
+	const struct rte_flow_item_port_id *pid_m = item ? item->mask : NULL;
+	const struct rte_flow_item_port_id *pid_v = item ? item->spec : NULL;
+	uint16_t mask, val, id;
+	int ret;
+
+	mask = pid_m ? pid_m->id : 0xffff;
+	id = pid_v ? pid_v->id : dev->data->port_id;
+	ret = mlx5_port_to_eswitch_info(id, NULL, &val);
+	if (ret)
+		return ret;
+	flow_dv_translate_item_source_vport(matcher, key, val, mask);
+	return 0;
+}
+
 static uint32_t matcher_zero[MLX5_ST_SZ_DW(fte_match_param)] = { 0 };
 
 #define HEADER_IS_ZERO(match_criteria, headers)				     \
@@ -3296,29 +3352,6 @@  struct field_modify_info modify_tcp[] = {
 }
 
 /**
- * Add source vport match to the specified matcher.
- *
- * @param[in, out] matcher
- *   Flow matcher.
- * @param[in, out] key
- *   Flow matcher value.
- * @param[in] port
- *   Source vport value to match
- * @param[in] mask
- *   Mask
- */
-static void
-flow_dv_translate_item_source_vport(void *matcher, void *key,
-				    int16_t port, uint16_t mask)
-{
-	void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
-	void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
-
-	MLX5_SET(fte_match_set_misc, misc_m, source_port, mask);
-	MLX5_SET(fte_match_set_misc, misc_v, source_port, port);
-}
-
-/**
  * Find existing tag resource or create and register a new one.
  *
  * @param dev[in, out]
@@ -3724,6 +3757,11 @@  struct field_modify_info modify_tcp[] = {
 		void *match_value = dev_flow->dv.value.buf;
 
 		switch (items->type) {
+		case RTE_FLOW_ITEM_TYPE_PORT_ID:
+			flow_dv_translate_item_port_id(dev, match_mask,
+						       match_value, items);
+			last_item = MLX5_FLOW_ITEM_PORT_ID;
+			break;
 		case RTE_FLOW_ITEM_TYPE_ETH:
 			flow_dv_translate_item_eth(match_mask, match_value,
 						   items, tunnel);