From patchwork Tue May 14 13:37:01 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bruce Richardson X-Patchwork-Id: 53403 X-Patchwork-Delegate: thomas@monjalon.net Return-Path: X-Original-To: patchwork@dpdk.org Delivered-To: patchwork@dpdk.org Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id A8044E3ED; Tue, 14 May 2019 15:37:10 +0200 (CEST) Received: from mga06.intel.com (mga06.intel.com [134.134.136.31]) by dpdk.org (Postfix) with ESMTP id 5B98A6CD8 for ; Tue, 14 May 2019 15:37:08 +0200 (CEST) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga001.jf.intel.com ([10.7.209.18]) by orsmga104.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 14 May 2019 06:37:06 -0700 X-ExtLoop1: 1 Received: from silpixa00399126.ir.intel.com (HELO silpixa00399126.ger.corp.intel.com) ([10.237.223.2]) by orsmga001.jf.intel.com with ESMTP; 14 May 2019 06:37:05 -0700 From: Bruce Richardson To: dev@dpdk.org Cc: =?utf-8?q?Mattias_R=C3=B6nnblom?= , Bruce Richardson Date: Tue, 14 May 2019 14:37:01 +0100 Message-Id: <20190514133702.2993-1-bruce.richardson@intel.com> X-Mailer: git-send-email 2.21.0 MIME-Version: 1.0 Subject: [dpdk-dev] [PATCH 1/2] build: shorten code for instruction set detection X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" Rather than checking flag by flag individually, use a loop to make it easier to check new flags. Signed-off-by: Bruce Richardson --- config/x86/meson.build | 34 +++++++++++++--------------------- 1 file changed, 13 insertions(+), 21 deletions(-) diff --git a/config/x86/meson.build b/config/x86/meson.build index bb23771b4..a650a1ca8 100644 --- a/config/x86/meson.build +++ b/config/x86/meson.build @@ -28,6 +28,19 @@ foreach f:base_flags compile_time_cpuflags += ['RTE_CPUFLAG_' + f] endforeach +optional_flags = ['AES', 'PCLMUL', + 'AVX', 'AVX2', 'AVX512F'] +foreach f:optional_flags + if cc.get_define('__@0@__'.format(f), args: machine_args) == '1' + if f == 'PCLMUL' # special case flags with different defines + f = 'PCLMULQDQ' + endif + dpdk_conf.set('RTE_MACHINE_CPUFLAG_' + f, 1) + compile_time_cpuflags += ['RTE_CPUFLAG_' + f] + endif +endforeach + + dpdk_conf.set('RTE_ARCH_X86', 1) if dpdk_conf.get('RTE_ARCH_64') dpdk_conf.set('RTE_ARCH_X86_64', 1) @@ -37,25 +50,4 @@ else dpdk_conf.set('RTE_ARCH', 'i686') endif -if cc.get_define('__AES__', args: machine_args) != '' - dpdk_conf.set('RTE_MACHINE_CPUFLAG_AES', 1) - compile_time_cpuflags += ['RTE_CPUFLAG_AES'] -endif -if cc.get_define('__PCLMUL__', args: machine_args) != '' - dpdk_conf.set('RTE_MACHINE_CPUFLAG_PCLMULQDQ', 1) - compile_time_cpuflags += ['RTE_CPUFLAG_PCLMULQDQ'] -endif -if cc.get_define('__AVX__', args: machine_args) != '' - dpdk_conf.set('RTE_MACHINE_CPUFLAG_AVX', 1) - compile_time_cpuflags += ['RTE_CPUFLAG_AVX'] -endif -if cc.get_define('__AVX2__', args: machine_args) != '' - dpdk_conf.set('RTE_MACHINE_CPUFLAG_AVX2', 1) - compile_time_cpuflags += ['RTE_CPUFLAG_AVX2'] -endif -if cc.get_define('__AVX512F__', args: machine_args) != '' - dpdk_conf.set('RTE_MACHINE_CPUFLAG_AVX512F', 1) - compile_time_cpuflags += ['RTE_CPUFLAG_AVX512F'] -endif - dpdk_conf.set('RTE_CACHE_LINE_SIZE', 64)