[27/44] event/octeontx2: add event timer support

Message ID 20190601185355.370-28-pbhagavatula@marvell.com (mailing list archive)
State Superseded, archived
Delegated to: Jerin Jacob
Headers
Series OCTEON TX2 event device driver |

Checks

Context Check Description
ci/checkpatch warning coding style issues
ci/Intel-compilation fail Compilation issues

Commit Message

Pavan Nikhilesh Bhagavatula June 1, 2019, 6:53 p.m. UTC
  From: Pavan Nikhilesh <pbhagavatula@marvell.com>

Add event timer adapter aka TIM initilization on SSO probe.

Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
---
Cc: Erik Gabriel Carrillo <erik.g.carrillo@intel.com>

 drivers/event/octeontx2/Makefile         |  1 +
 drivers/event/octeontx2/meson.build      |  1 +
 drivers/event/octeontx2/otx2_evdev.c     |  2 +
 drivers/event/octeontx2/otx2_tim_evdev.c | 61 ++++++++++++++++++++++++
 drivers/event/octeontx2/otx2_tim_evdev.h | 23 +++++++++
 5 files changed, 88 insertions(+)
 create mode 100644 drivers/event/octeontx2/otx2_tim_evdev.c
 create mode 100644 drivers/event/octeontx2/otx2_tim_evdev.h
  

Comments

Jerin Jacob Kollanukkaran June 17, 2019, 8:20 a.m. UTC | #1
> -----Original Message-----
> From: pbhagavatula@marvell.com <pbhagavatula@marvell.com>
> Sent: Sunday, June 2, 2019 12:24 AM
> To: Jerin Jacob Kollanukkaran <jerinj@marvell.com>; Pavan Nikhilesh
> Bhagavatula <pbhagavatula@marvell.com>; Anatoly Burakov
> <anatoly.burakov@intel.com>
> Cc: dev@dpdk.org; Erik Gabriel Carrillo <erik.g.carrillo@intel.com>
> Subject: [dpdk-dev] [PATCH 27/44] event/octeontx2: add event timer support
> 
> From: Pavan Nikhilesh <pbhagavatula@marvell.com>
> 
> Add event timer adapter aka TIM initilization on SSO probe.
> 
> Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
> ---
> Cc: Erik Gabriel Carrillo <erik.g.carrillo@intel.com>
> 
>  drivers/event/octeontx2/Makefile         |  1 +
>  drivers/event/octeontx2/meson.build      |  1 +
>  drivers/event/octeontx2/otx2_evdev.c     |  2 +
>  drivers/event/octeontx2/otx2_tim_evdev.c | 61 ++++++++++++++++++++++++
> drivers/event/octeontx2/otx2_tim_evdev.h | 23 +++++++++
>  5 files changed, 88 insertions(+)
>  create mode 100644 drivers/event/octeontx2/otx2_tim_evdev.c
>  create mode 100644 drivers/event/octeontx2/otx2_tim_evdev.h
> 
> diff --git a/drivers/event/octeontx2/Makefile
> diff --git a/drivers/event/octeontx2/otx2_tim_evdev.h
> b/drivers/event/octeontx2/otx2_tim_evdev.h
> new file mode 100644
> index 000000000..14bbaf43c
> --- /dev/null
> +++ b/drivers/event/octeontx2/otx2_tim_evdev.h
> @@ -0,0 +1,23 @@
> +/* SPDX-License-Identifier: BSD-3-Clause
> + * Copyright(C) 2019 Marvell International Ltd.
> + */
> +
> +#ifndef __OTX2_TIM_EVDEV_H__
> +#define __OTX2_TIM_EVDEV_H__
> +
> +#include <rte_event_timer_adapter.h>
> +
> +#include "otx2_dev.h"
> +
> +#define OTX2_TIM_EVDEV_NAME otx2_tim_eventdev
> +
> +struct otx2_tim_evdev {
> +	struct rte_pci_device *pci_dev;
> +	struct otx2_mbox *mbox;
> +	uint16_t nb_rings;
> +	uintptr_t bar2;
> +};
> +
> +void otx2_tim_init(struct rte_pci_device *pci_dev, struct otx2_dev
> +*cmn_dev);

Please add counter part_fini as well.

> +
> +#endif /* __OTX2_TIM_EVDEV_H__ */
> --
> 2.21.0
  

Patch

diff --git a/drivers/event/octeontx2/Makefile b/drivers/event/octeontx2/Makefile
index d6cffc1f6..2290622dd 100644
--- a/drivers/event/octeontx2/Makefile
+++ b/drivers/event/octeontx2/Makefile
@@ -33,6 +33,7 @@  LIBABIVER := 1
 SRCS-$(CONFIG_RTE_LIBRTE_PMD_OCTEONTX2_EVENTDEV) += otx2_worker_dual.c
 SRCS-$(CONFIG_RTE_LIBRTE_PMD_OCTEONTX2_EVENTDEV) += otx2_worker.c
 SRCS-$(CONFIG_RTE_LIBRTE_PMD_OCTEONTX2_EVENTDEV) += otx2_evdev.c
+SRCS-$(CONFIG_RTE_LIBRTE_PMD_OCTEONTX2_EVENTDEV) += otx2_tim_evdev.c
 SRCS-$(CONFIG_RTE_LIBRTE_PMD_OCTEONTX2_EVENTDEV) += otx2_evdev_selftest.c
 SRCS-$(CONFIG_RTE_LIBRTE_PMD_OCTEONTX2_EVENTDEV) += otx2_evdev_irq.c
 
diff --git a/drivers/event/octeontx2/meson.build b/drivers/event/octeontx2/meson.build
index 470564b08..ad7f2e084 100644
--- a/drivers/event/octeontx2/meson.build
+++ b/drivers/event/octeontx2/meson.build
@@ -7,6 +7,7 @@  sources = files('otx2_worker.c',
 		'otx2_evdev.c',
 		'otx2_evdev_irq.c',
 		'otx2_evdev_selftest.c',
+		'otx2_tim_evdev.c',
 		)
 
 allow_experimental_apis = true
diff --git a/drivers/event/octeontx2/otx2_evdev.c b/drivers/event/octeontx2/otx2_evdev.c
index 7300da908..c247848be 100644
--- a/drivers/event/octeontx2/otx2_evdev.c
+++ b/drivers/event/octeontx2/otx2_evdev.c
@@ -15,6 +15,7 @@ 
 #include "otx2_evdev_stats.h"
 #include "otx2_evdev.h"
 #include "otx2_irq.h"
+#include "otx2_tim_evdev.h"
 
 static inline int
 sso_get_msix_offsets(const struct rte_eventdev *event_dev)
@@ -1305,6 +1306,7 @@  otx2_sso_init(struct rte_eventdev *event_dev)
 		event_dev->dev_ops->dev_selftest();
 	}
 
+	otx2_tim_init(pci_dev, (struct otx2_dev *)dev);
 
 	return 0;
 
diff --git a/drivers/event/octeontx2/otx2_tim_evdev.c b/drivers/event/octeontx2/otx2_tim_evdev.c
new file mode 100644
index 000000000..a4f6bc673
--- /dev/null
+++ b/drivers/event/octeontx2/otx2_tim_evdev.c
@@ -0,0 +1,61 @@ 
+/* SPDX-License-Identifier: BSD-3-Clause
+ * Copyright(C) 2019 Marvell International Ltd.
+ */
+
+#include "otx2_evdev.h"
+#include "otx2_tim_evdev.h"
+
+void
+otx2_tim_init(struct rte_pci_device *pci_dev, struct otx2_dev *cmn_dev)
+{
+	struct rsrc_attach_req *atch_req;
+	struct free_rsrcs_rsp *rsrc_cnt;
+	const struct rte_memzone *mz;
+	struct otx2_tim_evdev *dev;
+	int rc;
+
+	if (rte_eal_process_type() != RTE_PROC_PRIMARY)
+		return;
+
+	mz = rte_memzone_reserve(RTE_STR(OTX2_TIM_EVDEV_NAME),
+				 sizeof(struct otx2_tim_evdev),
+				 rte_socket_id(), 0);
+	if (mz == NULL) {
+		otx2_tim_dbg("Unable to allocate memory for TIM Event device");
+		return;
+	}
+
+	dev = mz->addr;
+	dev->pci_dev = pci_dev;
+	dev->mbox = cmn_dev->mbox;
+	dev->bar2 = cmn_dev->bar2;
+
+	otx2_mbox_alloc_msg_free_rsrc_cnt(dev->mbox);
+	rc = otx2_mbox_process_msg(dev->mbox, (void *)&rsrc_cnt);
+	if (rc < 0) {
+		otx2_err("Unable to get free rsrc count.");
+		goto mz_free;
+	}
+
+	dev->nb_rings = rsrc_cnt->tim;
+
+	if (!dev->nb_rings) {
+		otx2_tim_dbg("No TIM Logical functions provisioned.");
+		goto mz_free;
+	}
+
+	atch_req = otx2_mbox_alloc_msg_attach_resources(dev->mbox);
+	atch_req->modify = true;
+	atch_req->timlfs = dev->nb_rings;
+
+	rc = otx2_mbox_process(dev->mbox);
+	if (rc < 0) {
+		otx2_err("Unable to attach TIM rings.");
+		goto mz_free;
+	}
+
+	return;
+
+mz_free:
+	rte_memzone_free(mz);
+}
diff --git a/drivers/event/octeontx2/otx2_tim_evdev.h b/drivers/event/octeontx2/otx2_tim_evdev.h
new file mode 100644
index 000000000..14bbaf43c
--- /dev/null
+++ b/drivers/event/octeontx2/otx2_tim_evdev.h
@@ -0,0 +1,23 @@ 
+/* SPDX-License-Identifier: BSD-3-Clause
+ * Copyright(C) 2019 Marvell International Ltd.
+ */
+
+#ifndef __OTX2_TIM_EVDEV_H__
+#define __OTX2_TIM_EVDEV_H__
+
+#include <rte_event_timer_adapter.h>
+
+#include "otx2_dev.h"
+
+#define OTX2_TIM_EVDEV_NAME otx2_tim_eventdev
+
+struct otx2_tim_evdev {
+	struct rte_pci_device *pci_dev;
+	struct otx2_mbox *mbox;
+	uint16_t nb_rings;
+	uintptr_t bar2;
+};
+
+void otx2_tim_init(struct rte_pci_device *pci_dev, struct otx2_dev *cmn_dev);
+
+#endif /* __OTX2_TIM_EVDEV_H__ */