diff mbox series

[1/2] examples/l3fwd-vf: remove old Rx/Tx configuration defines

Message ID 1559557107-115815-2-git-send-email-longtb5@viettel.com.vn (mailing list archive)
State Accepted, archived
Delegated to: Thomas Monjalon
Headers
Series clean up old Rx/Tx configuration leftovers |

Checks

Context Check Description
ci/checkpatch warning coding style issues
ci/intel-Performance-Testing success Performance Testing PASS
ci/mellanox-Performance-Testing success Performance Testing PASS
ci/Intel-compilation fail Compilation issues

Commit Message

longtb5@viettel.com.vn June 3, 2019, 10:06 a.m. UTC 
  The RX and TX Prefetch, Host, and Write-back threshold values are
defined but not used anywhere. They are leftovers from a previous
patch.

Fixes: 81f7ecd9 ("examples: use factorized default Rx/Tx configuration")
Cc: stable@dpdk.org

Signed-off-by: Bao-Long Tran <longtb5@viettel.com.vn>
---
 examples/l3fwd-vf/main.c | 19 -------------------
 1 file changed, 19 deletions(-)
diff mbox series

Patch

diff --git a/examples/l3fwd-vf/main.c b/examples/l3fwd-vf/main.c
index 0ef469c..5533031 100644
--- a/examples/l3fwd-vf/main.c
+++ b/examples/l3fwd-vf/main.c
@@ -74,25 +74,6 @@ 
 				nb_lcores*MEMPOOL_CACHE_SIZE),		\
 				(unsigned)8192)
 
-/*
- * RX and TX Prefetch, Host, and Write-back threshold values should be
- * carefully set for optimal performance. Consult the network
- * controller's datasheet and supporting DPDK documentation for guidance
- * on how these parameters should be set.
- */
-#define RX_PTHRESH 8 /**< Default values of RX prefetch threshold reg. */
-#define RX_HTHRESH 8 /**< Default values of RX host threshold reg. */
-#define RX_WTHRESH 4 /**< Default values of RX write-back threshold reg. */
-
-/*
- * These default values are optimized for use with the Intel(R) 82599 10 GbE
- * Controller and the DPDK ixgbe PMD. Consider using other values for other
- * network controllers and/or network drivers.
- */
-#define TX_PTHRESH 36 /**< Default values of TX prefetch threshold reg. */
-#define TX_HTHRESH 0  /**< Default values of TX host threshold reg. */
-#define TX_WTHRESH 0  /**< Default values of TX write-back threshold reg. */
-
 #define MAX_PKT_BURST 32
 #define BURST_TX_DRAIN_US 100 /* TX drain every ~100us */