diff mbox series

[16/22] net/bnxt: fully initialize hwrm msgs for thor RSS cfg

Message ID 20190718033616.37605-17-ajit.khaparde@broadcom.com (mailing list archive)
State Accepted, archived
Delegated to: Ferruh Yigit
Headers
Series bnxt patchset |

Checks

Context Check Description
ci/checkpatch success coding style OK
ci/Intel-compilation fail Compilation issues

Commit Message

Ajit Khaparde July 18, 2019, 3:36 a.m. UTC 
  From: Lance Richardson <lance.richardson@broadcom.com>

Fully initialize hwrm messages for thor RSS configuration
to avoid hwrm duplicate sequence numbers.

Fixes: 38412304b50a ("net/bnxt: enable RSS for thor-based controllers")
Reviewed-by: Kalesh Anakkur Purayil <kalesh-anakkur.purayil@broadcom.com>
Signed-off-by: Lance Richardson <lance.richardson@broadcom.com>
---
 drivers/net/bnxt/bnxt_hwrm.c | 42 +++++++++++++++++-------------------
 1 file changed, 20 insertions(+), 22 deletions(-)
diff mbox series

Patch

diff --git a/drivers/net/bnxt/bnxt_hwrm.c b/drivers/net/bnxt/bnxt_hwrm.c
index 6ace2c11d..a1fa37f16 100644
--- a/drivers/net/bnxt/bnxt_hwrm.c
+++ b/drivers/net/bnxt/bnxt_hwrm.c
@@ -1740,16 +1740,16 @@  bnxt_hwrm_vnic_rss_cfg_thor(struct bnxt *bp, struct bnxt_vnic_info *vnic)
 	struct hwrm_vnic_rss_cfg_input req = {.req_type = 0 };
 	struct hwrm_vnic_rss_cfg_output *resp = bp->hwrm_cmd_resp_addr;
 
-	HWRM_PREP(req, VNIC_RSS_CFG, BNXT_USE_CHIMP_MB);
+	for (i = 0; i < nr_ctxs; i++) {
+		HWRM_PREP(req, VNIC_RSS_CFG, BNXT_USE_CHIMP_MB);
 
-	req.vnic_id = rte_cpu_to_le_16(vnic->fw_vnic_id);
-	req.hash_type = rte_cpu_to_le_32(vnic->hash_type);
-	req.hash_mode_flags = vnic->hash_mode;
+		req.vnic_id = rte_cpu_to_le_16(vnic->fw_vnic_id);
+		req.hash_type = rte_cpu_to_le_32(vnic->hash_type);
+		req.hash_mode_flags = vnic->hash_mode;
 
-	req.hash_key_tbl_addr =
-	    rte_cpu_to_le_64(vnic->rss_hash_key_dma_addr);
+		req.hash_key_tbl_addr =
+			rte_cpu_to_le_64(vnic->rss_hash_key_dma_addr);
 
-	for (i = 0; i < nr_ctxs; i++) {
 		req.ring_grp_tbl_addr =
 			rte_cpu_to_le_64(vnic->rss_table_dma_addr +
 					 i * HW_HASH_INDEX_SIZE);
@@ -1760,10 +1760,9 @@  bnxt_hwrm_vnic_rss_cfg_thor(struct bnxt *bp, struct bnxt_vnic_info *vnic)
 					    BNXT_USE_CHIMP_MB);
 
 		HWRM_CHECK_RESULT();
+		HWRM_UNLOCK();
 	}
 
-	HWRM_UNLOCK();
-
 	return rc;
 }
 
@@ -4128,21 +4127,21 @@  bnxt_vnic_rss_configure_thor(struct bnxt *bp, struct bnxt_vnic_info *vnic)
 	int i, j, k, cnt;
 	int rc = 0;
 
-	HWRM_PREP(req, VNIC_RSS_CFG, BNXT_USE_CHIMP_MB);
-
-	req.vnic_id = rte_cpu_to_le_16(vnic->fw_vnic_id);
-	req.hash_type = rte_cpu_to_le_32(vnic->hash_type);
-	req.hash_mode_flags = vnic->hash_mode;
-
-	req.ring_grp_tbl_addr =
-	    rte_cpu_to_le_64(vnic->rss_table_dma_addr);
-	req.hash_key_tbl_addr =
-	    rte_cpu_to_le_64(vnic->rss_hash_key_dma_addr);
-
 	for (i = 0, k = 0; i < nr_ctxs; i++) {
 		struct bnxt_rx_ring_info *rxr;
 		struct bnxt_cp_ring_info *cpr;
 
+		HWRM_PREP(req, VNIC_RSS_CFG, BNXT_USE_CHIMP_MB);
+
+		req.vnic_id = rte_cpu_to_le_16(vnic->fw_vnic_id);
+		req.hash_type = rte_cpu_to_le_32(vnic->hash_type);
+		req.hash_mode_flags = vnic->hash_mode;
+
+		req.ring_grp_tbl_addr =
+		    rte_cpu_to_le_64(vnic->rss_table_dma_addr);
+		req.hash_key_tbl_addr =
+		    rte_cpu_to_le_64(vnic->rss_hash_key_dma_addr);
+
 		req.ring_table_pair_index = i;
 		req.rss_ctx_idx = rte_cpu_to_le_16(vnic->fw_grp_ids[i]);
 
@@ -4178,10 +4177,9 @@  bnxt_vnic_rss_configure_thor(struct bnxt *bp, struct bnxt_vnic_info *vnic)
 					    BNXT_USE_CHIMP_MB);
 
 		HWRM_CHECK_RESULT();
+		HWRM_UNLOCK();
 	}
 
-	HWRM_UNLOCK();
-
 	return rc;
 }