From patchwork Thu Aug 8 08:46:05 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Xu, Rosen" X-Patchwork-Id: 57572 X-Patchwork-Delegate: xiaolong.ye@intel.com Return-Path: X-Original-To: patchwork@dpdk.org Delivered-To: patchwork@dpdk.org Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id ED4F62BF3; Thu, 8 Aug 2019 10:45:40 +0200 (CEST) Received: from mga12.intel.com (mga12.intel.com [192.55.52.136]) by dpdk.org (Postfix) with ESMTP id 494D42BF1 for ; Thu, 8 Aug 2019 10:45:39 +0200 (CEST) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga005.jf.intel.com ([10.7.209.41]) by fmsmga106.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 08 Aug 2019 01:45:38 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.64,360,1559545200"; d="scan'208";a="350108564" Received: from dpdk-rosen-02.sh.intel.com ([10.67.111.116]) by orsmga005.jf.intel.com with ESMTP; 08 Aug 2019 01:45:37 -0700 From: Rosen Xu To: dev@dpdk.org Cc: ferruh.yigit@intel.com, tianfei.zhang@intel.com, rosen.xu@intel.com, andy.pei@intel.com, david.lomartire@intel.com, qi.z.zhang@intel.com, xiaolong.ye@intel.com Date: Thu, 8 Aug 2019 16:46:05 +0800 Message-Id: <1565253974-183591-5-git-send-email-rosen.xu@intel.com> X-Mailer: git-send-email 1.8.3.1 In-Reply-To: <1565253974-183591-1-git-send-email-rosen.xu@intel.com> References: <1564556752-19257-2-git-send-email-rosen.xu@intel.com> <1565253974-183591-1-git-send-email-rosen.xu@intel.com> Subject: [dpdk-dev] [PATCH v3 04/13] raw/ifpga_rawdev/base: add SEU error support X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" From: Tianfei zhang This patch exposes SEU error information to application then application could compare this information (128bit) with its own SMH file to know if this SEU is a fatal error or not. Signed-off-by: Tianfei zhang --- drivers/raw/ifpga_rawdev/base/ifpga_defines.h | 5 ++- drivers/raw/ifpga_rawdev/base/ifpga_fme_error.c | 43 +++++++++++++++++++++++ drivers/raw/ifpga_rawdev/base/opae_ifpga_hw_api.h | 2 ++ 3 files changed, 49 insertions(+), 1 deletion(-) diff --git a/drivers/raw/ifpga_rawdev/base/ifpga_defines.h b/drivers/raw/ifpga_rawdev/base/ifpga_defines.h index 4216128..b450cb1 100644 --- a/drivers/raw/ifpga_rawdev/base/ifpga_defines.h +++ b/drivers/raw/ifpga_rawdev/base/ifpga_defines.h @@ -1149,7 +1149,8 @@ struct feature_fme_error_capability { u8 support_intr:1; /* MSI-X vector table entry number */ u16 intr_vector_num:12; - u64 rsvd:51; /* Reserved */ + u64 rsvd:50; /* Reserved */ + u64 seu_support:1; }; }; }; @@ -1171,6 +1172,8 @@ struct feature_fme_err { struct feature_fme_ras_catfaterror ras_catfaterr; struct feature_fme_ras_error_inj ras_error_inj; struct feature_fme_error_capability fme_err_capability; + u64 seu_emr_l; + u64 seu_emr_h; }; /* FME Partial Reconfiguration Control */ diff --git a/drivers/raw/ifpga_rawdev/base/ifpga_fme_error.c b/drivers/raw/ifpga_rawdev/base/ifpga_fme_error.c index a6d3dab..b496667 100644 --- a/drivers/raw/ifpga_rawdev/base/ifpga_fme_error.c +++ b/drivers/raw/ifpga_rawdev/base/ifpga_fme_error.c @@ -257,6 +257,45 @@ static void fme_global_error_uinit(struct ifpga_feature *feature) UNUSED(feature); } +static int fme_err_check_seu(struct feature_fme_err *fme_err) +{ + struct feature_fme_error_capability error_cap; + + error_cap.csr = readq(&fme_err->fme_err_capability); + + return error_cap.seu_support ? 1:0; +} + +static int fme_err_get_seu_emr_low(struct ifpga_fme_hw *fme, + u64 *val) +{ + struct feature_fme_err *fme_err + = get_fme_feature_ioaddr_by_index(fme, + FME_FEATURE_ID_GLOBAL_ERR); + + if (!fme_err_check_seu(fme_err)) + return -ENODEV; + + *val = readq(&fme_err->seu_emr_l); + + return 0; +} + +static int fme_err_get_seu_emr_high(struct ifpga_fme_hw *fme, + u64 *val) +{ + struct feature_fme_err *fme_err + = get_fme_feature_ioaddr_by_index(fme, + FME_FEATURE_ID_GLOBAL_ERR); + + if (!fme_err_check_seu(fme_err)) + return -ENODEV; + + *val = readq(&fme_err->seu_emr_h); + + return 0; +} + static int fme_err_fme_err_get_prop(struct ifpga_feature *feature, struct feature_prop *prop) { @@ -270,6 +309,10 @@ static int fme_err_fme_err_get_prop(struct ifpga_feature *feature, return fme_err_get_first_error(fme, &prop->data); case 0x3: /* NEXT_ERROR */ return fme_err_get_next_error(fme, &prop->data); + case 0x5: /* SEU EMR LOW */ + return fme_err_get_seu_emr_low(fme, &prop->data); + case 0x6: /* SEU EMR HIGH */ + return fme_err_get_seu_emr_high(fme, &prop->data); } return -ENOENT; diff --git a/drivers/raw/ifpga_rawdev/base/opae_ifpga_hw_api.h b/drivers/raw/ifpga_rawdev/base/opae_ifpga_hw_api.h index 4c2c990..bab3386 100644 --- a/drivers/raw/ifpga_rawdev/base/opae_ifpga_hw_api.h +++ b/drivers/raw/ifpga_rawdev/base/opae_ifpga_hw_api.h @@ -74,6 +74,8 @@ struct feature_prop { #define FME_ERR_PROP_FIRST_ERROR ERR_PROP_FME_ERR(0x2) #define FME_ERR_PROP_NEXT_ERROR ERR_PROP_FME_ERR(0x3) #define FME_ERR_PROP_CLEAR ERR_PROP_FME_ERR(0x4) /* WO */ +#define FME_ERR_PROP_SEU_EMR_LOW ERR_PROP_FME_ERR(0x5) +#define FME_ERR_PROP_SEU_EMR_HIGH ERR_PROP_FME_ERR(0x6) #define FME_ERR_PROP_REVISION ERR_PROP_ROOT(0x5) #define FME_ERR_PROP_PCIE0_ERRORS ERR_PROP_ROOT(0x6) /* RW */ #define FME_ERR_PROP_PCIE1_ERRORS ERR_PROP_ROOT(0x7) /* RW */