From patchwork Wed Sep 4 08:04:31 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Nithin Dabilpuram X-Patchwork-Id: 58550 X-Patchwork-Delegate: jerinj@marvell.com Return-Path: X-Original-To: patchwork@dpdk.org Delivered-To: patchwork@dpdk.org Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 0FA1A1ECB5; Wed, 4 Sep 2019 10:04:47 +0200 (CEST) Received: from mx0b-0016f401.pphosted.com (mx0b-0016f401.pphosted.com [67.231.156.173]) by dpdk.org (Postfix) with ESMTP id B65341EBBE; Wed, 4 Sep 2019 10:04:45 +0200 (CEST) Received: from pps.filterd (m0045851.ppops.net [127.0.0.1]) by mx0b-0016f401.pphosted.com (8.16.0.42/8.16.0.42) with SMTP id x84808UY013288; Wed, 4 Sep 2019 01:04:44 -0700 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com; h=from : to : cc : subject : date : message-id : mime-version : content-type; s=pfpt0818; bh=c6UtcVVoJznGEsLnZ05MN5vApLMfwfB23Vza252pag8=; b=OHhsQ5Zni0YVLWqyObUH21VXO9qlQe7GPTtISvu3TyMKDjlePhOphuSE4aiBRQHfFbNt ZcRcvZaOOK3dk97CIudBuO2ATxPu+59+CiyBuyIT7n7cqKQnqi6QFyn8/Iw8g0kLm15R x34S4rHns5lTGSChtmRnB8zYUlIhsQ6DHpPuaWRWOM6qzGBUvBT7KyLSiJEJoT1ZsDrA 1dwehrw72VTxOE9XqZo+TcYa6gremJTtJZ7oBegnVFzcmvOfH3L3o5CZeJDM4+qNwLZV 4Ac5xXIkDAXfgpLbd5q34HqoSf9eEBIDNeMWnBa7zMA9bJZuWSbMxHoKW1/AokA/Y7aa lQ== Received: from sc-exch02.marvell.com ([199.233.58.182]) by mx0b-0016f401.pphosted.com with ESMTP id 2uqrdmcyt6-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT); Wed, 04 Sep 2019 01:04:44 -0700 Received: from SC-EXCH03.marvell.com (10.93.176.83) by SC-EXCH02.marvell.com (10.93.176.82) with Microsoft SMTP Server (TLS) id 15.0.1367.3; Wed, 4 Sep 2019 01:04:41 -0700 Received: from maili.marvell.com (10.93.176.43) by SC-EXCH03.marvell.com (10.93.176.83) with Microsoft SMTP Server id 15.0.1367.3 via Frontend Transport; Wed, 4 Sep 2019 01:04:41 -0700 Received: from hyd1588t430.marvell.com (unknown [10.29.52.204]) by maili.marvell.com (Postfix) with ESMTP id 3A44B3F7040; Wed, 4 Sep 2019 01:04:38 -0700 (PDT) From: Nithin Dabilpuram To: Jerin Jacob , Nithin Dabilpuram , Kiran Kumar K CC: , Date: Wed, 4 Sep 2019 13:34:31 +0530 Message-ID: <20190904080433.177220-1-ndabilpuram@marvell.com> X-Mailer: git-send-email 2.8.4 MIME-Version: 1.0 X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:6.0.70,1.0.8 definitions=2019-09-04_01:2019-09-03,2019-09-04 signatures=0 Subject: [dpdk-dev] [PATCH 1/2] net/octeontx2: fix ptype translation logic X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" Extract and use layer type LB..LE for non-tunnel ptype and LF..LH as tunnel ptype translation. Fixes: 6e892eabce11 ("net/octeontx2: support packet type") Cc: stable@dpdk.org Signed-off-by: Nithin Dabilpuram Acked-by: Jerin Jacob --- drivers/net/octeontx2/otx2_lookup.c | 22 ++++++++++++---------- drivers/net/octeontx2/otx2_rx.h | 15 ++++++++------- 2 files changed, 20 insertions(+), 17 deletions(-) diff --git a/drivers/net/octeontx2/otx2_lookup.c b/drivers/net/octeontx2/otx2_lookup.c index 99199d0..13c26a9 100644 --- a/drivers/net/octeontx2/otx2_lookup.c +++ b/drivers/net/octeontx2/otx2_lookup.c @@ -78,7 +78,8 @@ static void nix_create_non_tunnel_ptype_array(uint16_t *ptype) { uint8_t lb, lc, ld, le; - uint16_t idx, val; + uint16_t val; + uint32_t idx; for (idx = 0; idx < PTYPE_NON_TUNNEL_ARRAY_SZ; idx++) { lb = idx & 0xF; @@ -180,28 +181,29 @@ nix_create_non_tunnel_ptype_array(uint16_t *ptype) } } -#define TU_SHIFT(x) ((x) >> PTYPE_WIDTH) +#define TU_SHIFT(x) ((x) >> PTYPE_NON_TUNNEL_WIDTH) static void nix_create_tunnel_ptype_array(uint16_t *ptype) { - uint8_t le, lf, lg; - uint16_t idx, val; + uint8_t lf, lg, lh; + uint16_t val; + uint32_t idx; /* Skip non tunnel ptype array memory */ ptype = ptype + PTYPE_NON_TUNNEL_ARRAY_SZ; for (idx = 0; idx < PTYPE_TUNNEL_ARRAY_SZ; idx++) { - le = idx & 0xF; - lf = (idx & 0xF0) >> 4; - lg = (idx & 0xF00) >> 8; + lf = idx & 0xF; + lg = (idx & 0xF0) >> 4; + lh = (idx & 0xF00) >> 8; val = RTE_PTYPE_UNKNOWN; - switch (le) { + switch (lf) { case NPC_LT_LF_TU_ETHER: val |= TU_SHIFT(RTE_PTYPE_INNER_L2_ETHER); break; } - switch (lf) { + switch (lg) { case NPC_LT_LG_TU_IP: val |= TU_SHIFT(RTE_PTYPE_INNER_L3_IPV4); break; @@ -209,7 +211,7 @@ nix_create_tunnel_ptype_array(uint16_t *ptype) val |= TU_SHIFT(RTE_PTYPE_INNER_L3_IPV6); break; } - switch (lg) { + switch (lh) { case NPC_LT_LH_TU_TCP: val |= TU_SHIFT(RTE_PTYPE_INNER_L4_TCP); break; diff --git a/drivers/net/octeontx2/otx2_rx.h b/drivers/net/octeontx2/otx2_rx.h index d12e8b8..1a1ac40 100644 --- a/drivers/net/octeontx2/otx2_rx.h +++ b/drivers/net/octeontx2/otx2_rx.h @@ -8,9 +8,10 @@ /* Default mark value used when none is provided. */ #define OTX2_FLOW_ACTION_FLAG_DEFAULT 0xffff -#define PTYPE_WIDTH 12 -#define PTYPE_NON_TUNNEL_ARRAY_SZ BIT(PTYPE_WIDTH) -#define PTYPE_TUNNEL_ARRAY_SZ BIT(PTYPE_WIDTH) +#define PTYPE_NON_TUNNEL_WIDTH 16 +#define PTYPE_TUNNEL_WIDTH 12 +#define PTYPE_NON_TUNNEL_ARRAY_SZ BIT(PTYPE_NON_TUNNEL_WIDTH) +#define PTYPE_TUNNEL_ARRAY_SZ BIT(PTYPE_TUNNEL_WIDTH) #define PTYPE_ARRAY_SZ ((PTYPE_NON_TUNNEL_ARRAY_SZ +\ PTYPE_TUNNEL_ARRAY_SZ) *\ sizeof(uint16_t)) @@ -97,11 +98,11 @@ static __rte_always_inline uint32_t nix_ptype_get(const void * const lookup_mem, const uint64_t in) { const uint16_t * const ptype = lookup_mem; - const uint16_t lg_lf_le = (in & 0xFFF000000000000) >> 48; - const uint16_t tu_l2 = ptype[(in & 0x000FFF000000000) >> 36]; - const uint16_t il4_tu = ptype[PTYPE_NON_TUNNEL_ARRAY_SZ + lg_lf_le]; + const uint16_t lh_lg_lf = (in & 0xFFF0000000000000) >> 52; + const uint16_t tu_l2 = ptype[(in & 0x000FFFF000000000) >> 36]; + const uint16_t il4_tu = ptype[PTYPE_NON_TUNNEL_ARRAY_SZ + lh_lg_lf]; - return (il4_tu << PTYPE_WIDTH) | tu_l2; + return (il4_tu << PTYPE_NON_TUNNEL_WIDTH) | tu_l2; } static __rte_always_inline uint32_t