From patchwork Thu Oct 10 06:32:31 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Gagandeep Singh X-Patchwork-Id: 60860 X-Patchwork-Delegate: ferruh.yigit@amd.com Return-Path: X-Original-To: patchwork@dpdk.org Delivered-To: patchwork@dpdk.org Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id B9BBA1E986; Thu, 10 Oct 2019 08:48:57 +0200 (CEST) Received: from inva021.nxp.com (inva021.nxp.com [92.121.34.21]) by dpdk.org (Postfix) with ESMTP id 791FD1E935 for ; Thu, 10 Oct 2019 08:48:22 +0200 (CEST) Received: from inva021.nxp.com (localhost [127.0.0.1]) by inva021.eu-rdc02.nxp.com (Postfix) with ESMTP id 5E96420045F; Thu, 10 Oct 2019 08:48:22 +0200 (CEST) Received: from invc005.ap-rdc01.nxp.com (invc005.ap-rdc01.nxp.com [165.114.16.14]) by inva021.eu-rdc02.nxp.com (Postfix) with ESMTP id BD331200440; Thu, 10 Oct 2019 08:48:19 +0200 (CEST) Received: from GDB1.ap.freescale.net (GDB1.ap.freescale.net [10.232.132.179]) by invc005.ap-rdc01.nxp.com (Postfix) with ESMTP id E27C9402DA; Thu, 10 Oct 2019 14:48:15 +0800 (SGT) From: Gagandeep Singh To: dev@dpdk.org, ferruh.yigit@intel.com Cc: thomas@monjalon.net, Gagandeep Singh Date: Thu, 10 Oct 2019 12:02:31 +0530 Message-Id: <20191010063234.32568-12-g.singh@nxp.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20191010063234.32568-1-g.singh@nxp.com> References: <20191001110209.6047-1-g.singh@nxp.com> <20191010063234.32568-1-g.singh@nxp.com> X-Virus-Scanned: ClamAV using ClamSMTP Subject: [dpdk-dev] [PATCH v4 11/14] net/pfe: add MTU and MAC address set operations X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" To update MAC address or MTU, operations are added to the driver. Signed-off-by: Gagandeep Singh Acked-by: Nipun Gupta Acked-by: Akhil Goyal --- doc/guides/nics/features/pfe.ini | 1 + doc/guides/nics/pfe.rst | 1 + drivers/net/pfe/pfe_ethdev.c | 71 +++++++++++++++++++++++++++++++- 3 files changed, 71 insertions(+), 2 deletions(-) diff --git a/doc/guides/nics/features/pfe.ini b/doc/guides/nics/features/pfe.ini index 6274b5965..dceccc199 100644 --- a/doc/guides/nics/features/pfe.ini +++ b/doc/guides/nics/features/pfe.ini @@ -8,6 +8,7 @@ L3 checksum offload = Y L4 checksum offload = Y Packet type parsing = Y Basic stats = Y +MTU update = Y Linux VFIO = Y ARMv8 = Y Usage doc = Y diff --git a/doc/guides/nics/pfe.rst b/doc/guides/nics/pfe.rst index 8a9fc0639..ad7d15ac6 100644 --- a/doc/guides/nics/pfe.rst +++ b/doc/guides/nics/pfe.rst @@ -96,6 +96,7 @@ PFE Features - L3/L4 checksum offload - Packet type parsing - Basic stats +- MTU update - ARMv8 Supported PFE SoCs diff --git a/drivers/net/pfe/pfe_ethdev.c b/drivers/net/pfe/pfe_ethdev.c index 09ab0b02e..58e2dfaf8 100644 --- a/drivers/net/pfe/pfe_ethdev.c +++ b/drivers/net/pfe/pfe_ethdev.c @@ -6,6 +6,7 @@ #include #include #include +#include #include #include "pfe_logs.h" @@ -435,12 +436,16 @@ pfe_eth_info(struct rte_eth_dev *dev, dev_info->max_rx_queues = dev->data->nb_rx_queues; dev_info->max_tx_queues = dev->data->nb_tx_queues; dev_info->min_rx_bufsize = HIF_RX_PKT_MIN_SIZE; + dev_info->min_mtu = RTE_ETHER_MIN_MTU; dev_info->rx_offload_capa = dev_rx_offloads_sup; dev_info->tx_offload_capa = dev_tx_offloads_sup; - if (pfe_svr == SVR_LS1012A_REV1) + if (pfe_svr == SVR_LS1012A_REV1) { dev_info->max_rx_pktlen = MAX_MTU_ON_REV1 + PFE_ETH_OVERHEAD; - else + dev_info->max_mtu = MAX_MTU_ON_REV1; + } else { dev_info->max_rx_pktlen = JUMBO_FRAME_SIZE; + dev_info->max_mtu = JUMBO_FRAME_SIZE - PFE_ETH_OVERHEAD; + } return 0; } @@ -542,6 +547,59 @@ pfe_supported_ptypes_get(struct rte_eth_dev *dev) return NULL; } +static int +pfe_mtu_set(struct rte_eth_dev *dev, uint16_t mtu) +{ + int ret; + struct pfe_eth_priv_s *priv = dev->data->dev_private; + uint16_t frame_size = mtu + RTE_ETHER_HDR_LEN + RTE_ETHER_CRC_LEN; + + /*TODO Support VLAN*/ + ret = gemac_set_rx(priv->EMAC_baseaddr, frame_size); + if (!ret) + dev->data->mtu = mtu; + + return ret; +} + +/* pfe_eth_enet_addr_byte_mac + */ +static int +pfe_eth_enet_addr_byte_mac(u8 *enet_byte_addr, + struct pfe_mac_addr *enet_addr) +{ + if (!enet_byte_addr || !enet_addr) { + return -1; + + } else { + enet_addr->bottom = enet_byte_addr[0] | + (enet_byte_addr[1] << 8) | + (enet_byte_addr[2] << 16) | + (enet_byte_addr[3] << 24); + enet_addr->top = enet_byte_addr[4] | + (enet_byte_addr[5] << 8); + return 0; + } +} + +static int +pfe_dev_set_mac_addr(struct rte_eth_dev *dev, + struct rte_ether_addr *addr) +{ + struct pfe_eth_priv_s *priv = dev->data->dev_private; + struct pfe_mac_addr spec_addr; + int ret; + + ret = pfe_eth_enet_addr_byte_mac(addr->addr_bytes, &spec_addr); + if (ret) + return ret; + + gemac_set_laddrN(priv->EMAC_baseaddr, + (struct pfe_mac_addr *)&spec_addr, 1); + rte_ether_addr_copy(addr, &dev->data->mac_addrs[0]); + return 0; +} + static int pfe_stats_get(struct rte_eth_dev *dev, struct rte_eth_stats *stats) @@ -573,6 +631,8 @@ static const struct eth_dev_ops ops = { .tx_queue_setup = pfe_tx_queue_setup, .tx_queue_release = pfe_tx_queue_release, .dev_supported_ptypes_get = pfe_supported_ptypes_get, + .mtu_set = pfe_mtu_set, + .mac_addr_set = pfe_dev_set_mac_addr, .stats_get = pfe_stats_get, }; @@ -583,6 +643,7 @@ pfe_eth_init(struct rte_vdev_device *vdev, struct pfe *pfe, int id) struct pfe_eth_priv_s *priv = NULL; struct ls1012a_eth_platform_data *einfo; struct ls1012a_pfe_platform_data *pfe_info; + struct rte_ether_addr addr; int err; eth_dev = rte_eth_vdev_allocate(vdev, sizeof(*priv)); @@ -635,6 +696,12 @@ pfe_eth_init(struct rte_vdev_device *vdev, struct pfe *pfe, int id) goto err0; } + memcpy(addr.addr_bytes, priv->einfo->mac_addr, + ETH_ALEN); + + pfe_dev_set_mac_addr(eth_dev, &addr); + rte_ether_addr_copy(&addr, ð_dev->data->mac_addrs[0]); + eth_dev->data->mtu = 1500; eth_dev->dev_ops = &ops; pfe_eth_stop(eth_dev);