[v2,5/5] app/test: register octeontx PMD to asym testsuite
diff mbox series

Message ID 1570798896-18974-6-git-send-email-anoobj@marvell.com
State Accepted
Delegated to: akhil goyal
Headers show
Series
  • add asym support in crypto_octeontx PMD
Related show

Checks

Context Check Description
ci/checkpatch success coding style OK
ci/Intel-compilation success Compilation OK

Commit Message

Anoob Joseph Oct. 11, 2019, 1:01 p.m. UTC
From: Sunila Sahu <ssahu@marvell.com>

Updated asymmetric crypto unit-test application to test
asymmetric crypto operations in octeontx PMD

Signed-off-by: Anoob Joseph <anoobj@marvell.com>
Signed-off-by: Kanaka Durga Kotamarthy <kkotamarthy@marvell.com>
Signed-off-by: Sunila Sahu <ssahu@marvell.com>
---
 app/test/test_cryptodev_asym.c     | 31 +++++++++++++++++++++++++++++++
 doc/guides/cryptodevs/octeontx.rst | 19 +++++++++++++++++++
 2 files changed, 50 insertions(+)

Patch
diff mbox series

diff --git a/app/test/test_cryptodev_asym.c b/app/test/test_cryptodev_asym.c
index e8177e7..241c384 100644
--- a/app/test/test_cryptodev_asym.c
+++ b/app/test/test_cryptodev_asym.c
@@ -1791,6 +1791,19 @@  static struct unit_test_suite cryptodev_qat_asym_testsuite  = {
 	}
 };
 
+static struct unit_test_suite cryptodev_octeontx_asym_testsuite  = {
+	.suite_name = "Crypto Device OCTEONTX ASYM Unit Test Suite",
+	.setup = testsuite_setup,
+	.teardown = testsuite_teardown,
+	.unit_test_cases = {
+		TEST_CASE_ST(ut_setup, ut_teardown, test_capability),
+		TEST_CASE_ST(ut_setup, ut_teardown, test_rsa_enc_dec_crt),
+		TEST_CASE_ST(ut_setup, ut_teardown, test_rsa_sign_verify_crt),
+		TEST_CASE_ST(ut_setup, ut_teardown, test_mod_exp),
+		TEST_CASES_END() /**< NULL terminate unit test array */
+	}
+};
+
 static int
 test_cryptodev_openssl_asym(void)
 {
@@ -1823,7 +1836,25 @@  test_cryptodev_qat_asym(void)
 	return unit_test_suite_runner(&cryptodev_qat_asym_testsuite);
 }
 
+static int
+test_cryptodev_octeontx_asym(void)
+{
+	gbl_driver_id = rte_cryptodev_driver_id_get(
+			RTE_STR(CRYPTODEV_NAME_OCTEONTX_SYM_PMD));
+	if (gbl_driver_id == -1) {
+		RTE_LOG(ERR, USER1, "OCTEONTX PMD must be loaded. Check if "
+				"CONFIG_RTE_LIBRTE_PMD_OCTEONTX_CRYPTO is "
+				"enabled in config file to run this "
+				"testsuite.\n");
+		return TEST_FAILED;
+	}
+	return unit_test_suite_runner(&cryptodev_octeontx_asym_testsuite);
+}
+
 REGISTER_TEST_COMMAND(cryptodev_openssl_asym_autotest,
 					  test_cryptodev_openssl_asym);
 
 REGISTER_TEST_COMMAND(cryptodev_qat_asym_autotest, test_cryptodev_qat_asym);
+
+REGISTER_TEST_COMMAND(cryptodev_octeontx_asym_autotest,
+					  test_cryptodev_octeontx_asym);
diff --git a/doc/guides/cryptodevs/octeontx.rst b/doc/guides/cryptodevs/octeontx.rst
index 8f8126b..4fa199e 100644
--- a/doc/guides/cryptodevs/octeontx.rst
+++ b/doc/guides/cryptodevs/octeontx.rst
@@ -126,3 +126,22 @@  OCTEON TX crypto PMD.
 
         ./build/ipsec-secgw --log-level=8 -c 0xff -- -P -p 0x3 -u 0x2 --config
         "(1,0,0),(0,0,0)" -f ep1.cfg
+
+Testing
+-------
+
+The symmetric crypto operations on OCTEON TX crypto PMD may be verified by running the test
+application:
+
+.. code-block:: console
+
+        ./test
+        RTE>>cryptodev_octeontx_autotest
+
+The asymmetric crypto operations on OCTEON TX crypto PMD may be verified by running the test
+application:
+
+.. code-block:: console
+
+        ./test
+        RTE>>cryptodev_octeontx_asym_autotest