[v2,01/12] crypto/octeontx2: add PMD skeleton
diff mbox series

Message ID 1570970402-20278-2-git-send-email-anoobj@marvell.com
State Changes Requested
Delegated to: akhil goyal
Headers show
Series
  • add OCTEON TX2 crypto PMD
Related show

Checks

Context Check Description
ci/checkpatch success coding style OK
ci/Intel-compilation fail apply issues

Commit Message

Anoob Joseph Oct. 13, 2019, 12:39 p.m. UTC
Adding OCTEON TX2 crypto PMD skeleton. Enabling the driver by default
in common_base.

Signed-off-by: Ankur Dwivedi <adwivedi@marvell.com>
Signed-off-by: Anoob Joseph <anoobj@marvell.com>
Signed-off-by: Tejasree Kondoj <ktejasree@marvell.com>
---
 MAINTAINERS                                        |   7 ++
 config/common_base                                 |   5 +
 doc/guides/cryptodevs/features/octeontx2.ini       |   8 ++
 doc/guides/cryptodevs/index.rst                    |   1 +
 doc/guides/cryptodevs/octeontx2.rst                |  93 +++++++++++++++++
 doc/guides/platform/octeontx2.rst                  |   3 +
 doc/guides/rel_notes/release_19_11.rst             |   6 ++
 drivers/common/Makefile                            |   5 +-
 drivers/crypto/Makefile                            |   1 +
 drivers/crypto/meson.build                         |  21 +++-
 drivers/crypto/octeontx2/Makefile                  |  37 +++++++
 drivers/crypto/octeontx2/meson.build               |  29 ++++++
 drivers/crypto/octeontx2/otx2_cryptodev.c          | 111 +++++++++++++++++++++
 drivers/crypto/octeontx2/otx2_cryptodev.h          |  29 ++++++
 drivers/crypto/octeontx2/otx2_cryptodev_ops.c      |  27 +++++
 drivers/crypto/octeontx2/otx2_cryptodev_ops.h      |  12 +++
 .../octeontx2/rte_pmd_octeontx2_crypto_version.map |   4 +
 mk/rte.app.mk                                      |   6 +-
 18 files changed, 400 insertions(+), 5 deletions(-)
 create mode 100644 doc/guides/cryptodevs/features/octeontx2.ini
 create mode 100644 doc/guides/cryptodevs/octeontx2.rst
 create mode 100644 drivers/crypto/octeontx2/Makefile
 create mode 100644 drivers/crypto/octeontx2/meson.build
 create mode 100644 drivers/crypto/octeontx2/otx2_cryptodev.c
 create mode 100644 drivers/crypto/octeontx2/otx2_cryptodev.h
 create mode 100644 drivers/crypto/octeontx2/otx2_cryptodev_ops.c
 create mode 100644 drivers/crypto/octeontx2/otx2_cryptodev_ops.h
 create mode 100644 drivers/crypto/octeontx2/rte_pmd_octeontx2_crypto_version.map

Comments

Akhil Goyal Oct. 15, 2019, 7:56 a.m. UTC | #1
> diff --git a/drivers/crypto/octeontx2/rte_pmd_octeontx2_crypto_version.map
> b/drivers/crypto/octeontx2/rte_pmd_octeontx2_crypto_version.map
> new file mode 100644
> index 0000000..9a61188
> --- /dev/null
> +++ b/drivers/crypto/octeontx2/rte_pmd_octeontx2_crypto_version.map
> @@ -0,0 +1,4 @@
> +DPDK_19.08 {
> +
> +	local: *;
> +};

19.08?? Should be 19.11
Anoob Joseph Oct. 15, 2019, 8:44 a.m. UTC | #2
Hi Akhil,

Will fix the issue. Please do let me know if there are more comments. I can send v3 once you confirm.

Thanks,
Anoob

> -----Original Message-----
> From: Akhil Goyal <akhil.goyal@nxp.com>
> Sent: Tuesday, October 15, 2019 1:26 PM
> To: Anoob Joseph <anoobj@marvell.com>; Pablo de Lara
> <pablo.de.lara.guarch@intel.com>
> Cc: Fiona Trahe <fiona.trahe@intel.com>; Jerin Jacob Kollanukkaran
> <jerinj@marvell.com>; Narayana Prasad Raju Athreya
> <pathreya@marvell.com>; Shally Verma <shallyv@marvell.com>; Ankur
> Dwivedi <adwivedi@marvell.com>; Kanaka Durga Kotamarthy
> <kkotamarthy@marvell.com>; Sunila Sahu <ssahu@marvell.com>; Tejasree
> Kondoj <ktejasree@marvell.com>; dev@dpdk.org
> Subject: [EXT] RE: [PATCH v2 01/12] crypto/octeontx2: add PMD skeleton
> 
> External Email
> 
> ----------------------------------------------------------------------
> > diff --git
> a/drivers/crypto/octeontx2/rte_pmd_octeontx2_crypto_version.map
> > b/drivers/crypto/octeontx2/rte_pmd_octeontx2_crypto_version.map
> > new file mode 100644
> > index 0000000..9a61188
> > --- /dev/null
> > +++ b/drivers/crypto/octeontx2/rte_pmd_octeontx2_crypto_version.map
> > @@ -0,0 +1,4 @@
> > +DPDK_19.08 {
> > +
> > +	local: *;
> > +};
> 
> 19.08?? Should be 19.11

Patch
diff mbox series

diff --git a/MAINTAINERS b/MAINTAINERS
index 61f7911..d9977e6 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -970,6 +970,13 @@  F: drivers/crypto/nitrox/
 F: doc/guides/cryptodevs/nitrox.rst
 F: doc/guides/cryptodevs/features/nitrox.ini
 
+Marvell OCTEON TX2 crypto
+M: Ankur Dwivedi <adwivedi@marvell.com>
+M: Anoob Joseph <anoobj@marvell.com>
+F: drivers/crypto/octeontx2/
+F: doc/guides/cryptodevs/octeontx2.rst
+F: doc/guides/cryptodevs/features/octeontx2.ini
+
 Null Crypto
 M: Declan Doherty <declan.doherty@intel.com>
 F: drivers/crypto/null/
diff --git a/config/common_base b/config/common_base
index 19a4523..8ae5ed4 100644
--- a/config/common_base
+++ b/config/common_base
@@ -593,6 +593,11 @@  CONFIG_RTE_LIBRTE_DPAA_MAX_CRYPTODEV=4
 CONFIG_RTE_LIBRTE_PMD_OCTEONTX_CRYPTO=y
 
 #
+# Compile PMD for Marvell OCTEON TX2 crypto device
+#
+CONFIG_RTE_LIBRTE_PMD_OCTEONTX2_CRYPTO=y
+
+#
 # Compile PMD for QuickAssist based devices - see docs for details
 #
 CONFIG_RTE_LIBRTE_PMD_QAT=y
diff --git a/doc/guides/cryptodevs/features/octeontx2.ini b/doc/guides/cryptodevs/features/octeontx2.ini
new file mode 100644
index 0000000..35c9bee
--- /dev/null
+++ b/doc/guides/cryptodevs/features/octeontx2.ini
@@ -0,0 +1,8 @@ 
+;
+; Supported features of the 'octeontx2' crypto driver.
+;
+; Refer to default.ini for the full list of available PMD features.
+;
+[Features]
+Symmetric crypto       = Y
+HW Accelerated         = Y
diff --git a/doc/guides/cryptodevs/index.rst b/doc/guides/cryptodevs/index.rst
index d1e0d32..a67ed5a 100644
--- a/doc/guides/cryptodevs/index.rst
+++ b/doc/guides/cryptodevs/index.rst
@@ -19,6 +19,7 @@  Crypto Device Drivers
     dpaa_sec
     kasumi
     octeontx
+    octeontx2
     openssl
     mvsam
     nitrox
diff --git a/doc/guides/cryptodevs/octeontx2.rst b/doc/guides/cryptodevs/octeontx2.rst
new file mode 100644
index 0000000..10f578a
--- /dev/null
+++ b/doc/guides/cryptodevs/octeontx2.rst
@@ -0,0 +1,93 @@ 
+..  SPDX-License-Identifier: BSD-3-Clause
+    Copyright(c) 2019 Marvell International Ltd.
+
+
+Marvell OCTEON TX2 Crypto Poll Mode Driver
+==========================================
+
+The OCTEON TX2 crypto poll mode driver provides support for offloading
+cryptographic operations to cryptographic accelerator units on the
+**OCTEON TX2** :sup:`®` family of processors (CN9XXX).
+
+More information about OCTEON TX2 SoCs may be obtained from `<https://www.marvell.com>`_
+
+Features
+--------
+
+The OCTEON TX2 crypto PMD has support for:
+
+Installation
+------------
+
+The OCTEON TX2 crypto PMD may be compiled natively on an OCTEON TX2 platform or
+cross-compiled on an x86 platform.
+
+Enable OCTEON TX2 crypto PMD in your config file:
+
+* ``CONFIG_RTE_LIBRTE_PMD_OCTEONTX2_CRYPTO=y``
+
+Refer to :doc:`../platform/octeontx2` for instructions to build your DPDK
+application.
+
+.. note::
+
+   The OCTEON TX2 crypto PMD uses services from the kernel mode OCTEON TX2
+   crypto PF driver in linux. This driver is included in the OCTEON TX SDK.
+
+Initialization
+--------------
+
+List the CPT PF devices available on your OCTEON TX2 platform:
+
+.. code-block:: console
+
+    lspci -d:a0fd
+
+``a0fd`` is the CPT PF device id. You should see output similar to:
+
+.. code-block:: console
+
+    0002:10:00.0 Class 1080: Device 177d:a0fd
+
+Set ``sriov_numvfs`` on the CPT PF device, to create a VF:
+
+.. code-block:: console
+
+    echo 1 > /sys/bus/pci/drivers/octeontx2-cpt/0002:10:00.0/sriov_numvfs
+
+Bind the CPT VF device to the vfio_pci driver:
+
+.. code-block:: console
+
+    echo '177d a0fe' > /sys/bus/pci/drivers/vfio-pci/new_id
+    echo 0002:10:00.1 > /sys/bus/pci/devices/0002:10:00.1/driver/unbind
+    echo 0002:10:00.1 > /sys/bus/pci/drivers/vfio-pci/bind
+
+Another way to bind the VF would be to use the ``dpdk-devbind.py`` script:
+
+.. code-block:: console
+
+    cd <dpdk directory>
+    ./usertools/dpdk-devbind.py -u 0002:10:00.1
+    ./usertools/dpdk-devbind.py -b vfio-pci 0002:10.00.1
+
+.. note::
+
+    Ensure that sufficient huge pages are available for your application::
+
+        echo 8 > /sys/kernel/mm/hugepages/hugepages-524288kB/nr_hugepages
+
+    Refer to :ref:`linux_gsg_hugepages` for more details.
+
+Debugging Options
+-----------------
+
+.. _table_octeontx2_crypto_debug_options:
+
+.. table:: OCTEON TX2 crypto PMD debug options
+
+    +---+------------+-------------------------------------------------------+
+    | # | Component  | EAL log command                                       |
+    +===+============+=======================================================+
+    | 1 | CPT        | --log-level='pmd\.crypto\.octeontx2,8'                |
+    +---+------------+-------------------------------------------------------+
diff --git a/doc/guides/platform/octeontx2.rst b/doc/guides/platform/octeontx2.rst
index 4194a43..f06dc68 100644
--- a/doc/guides/platform/octeontx2.rst
+++ b/doc/guides/platform/octeontx2.rst
@@ -132,6 +132,9 @@  This section lists dataplane H/W block(s) available in OCTEON TX2 SoC.
 #. **DMA Rawdev Driver**
    See :doc:`../rawdevs/octeontx2_dma` for DMA driver information.
 
+#. **Crypto Device Driver**
+   See :doc:`../cryptodevs/octeontx2` for CPT crypto device driver information.
+
 Procedure to Setup Platform
 ---------------------------
 
diff --git a/doc/guides/rel_notes/release_19_11.rst b/doc/guides/rel_notes/release_19_11.rst
index 02fc8fb..06394ac 100644
--- a/doc/guides/rel_notes/release_19_11.rst
+++ b/doc/guides/rel_notes/release_19_11.rst
@@ -85,6 +85,12 @@  New Features
   Added stateful decompression support in the Intel QuickAssist Technology PMD.
   Please note that stateful compression is not supported.
 
+* **Added Marvell OCTEON TX2 crypto PMD**
+
+  Added a new PMD driver for h/w crypto offload block on ``OCTEON TX2`` SoC.
+
+  See :doc:`../cryptodevs/octeontx2` for more details
+
 
 Removed Items
 -------------
diff --git a/drivers/common/Makefile b/drivers/common/Makefile
index bc6f972..1ff033b 100644
--- a/drivers/common/Makefile
+++ b/drivers/common/Makefile
@@ -4,7 +4,9 @@ 
 
 include $(RTE_SDK)/mk/rte.vars.mk
 
-ifeq ($(CONFIG_RTE_LIBRTE_PMD_OCTEONTX_CRYPTO),y)
+CPT-y := $(CONFIG_RTE_LIBRTE_PMD_OCTEONTX_CRYPTO)
+CPT-y += $(CONFIG_RTE_LIBRTE_PMD_OCTEONTX2_CRYPTO)
+ifneq (,$(findstring y,$(CPT-y)))
 DIRS-y += cpt
 endif
 
@@ -12,6 +14,7 @@  ifeq ($(CONFIG_RTE_LIBRTE_PMD_OCTEONTX_SSOVF)$(CONFIG_RTE_LIBRTE_OCTEONTX_MEMPOO
 DIRS-y += octeontx
 endif
 OCTEONTX2-y := $(CONFIG_RTE_LIBRTE_OCTEONTX2_MEMPOOL)
+OCTEONTX2-y += $(CONFIG_RTE_LIBRTE_PMD_OCTEONTX2_CRYPTO)
 ifeq ($(findstring y,$(OCTEONTX2-y)),y)
 DIRS-y += octeontx2
 endif
diff --git a/drivers/crypto/Makefile b/drivers/crypto/Makefile
index 7129bcf..8b00857 100644
--- a/drivers/crypto/Makefile
+++ b/drivers/crypto/Makefile
@@ -8,6 +8,7 @@  DIRS-$(CONFIG_RTE_LIBRTE_PMD_AESNI_MB) += aesni_mb
 DIRS-$(CONFIG_RTE_LIBRTE_PMD_ARMV8_CRYPTO) += armv8
 DIRS-$(CONFIG_RTE_LIBRTE_PMD_CCP) += ccp
 DIRS-$(CONFIG_RTE_LIBRTE_PMD_OCTEONTX_CRYPTO) += octeontx
+DIRS-$(CONFIG_RTE_LIBRTE_PMD_OCTEONTX2_CRYPTO) += octeontx2
 DIRS-$(CONFIG_RTE_LIBRTE_PMD_OPENSSL) += openssl
 DIRS-$(CONFIG_RTE_LIBRTE_PMD_CRYPTO_SCHEDULER) += scheduler
 DIRS-$(CONFIG_RTE_LIBRTE_PMD_SNOW3G) += snow3g
diff --git a/drivers/crypto/meson.build b/drivers/crypto/meson.build
index 1a358ff..229debd 100644
--- a/drivers/crypto/meson.build
+++ b/drivers/crypto/meson.build
@@ -1,9 +1,24 @@ 
 # SPDX-License-Identifier: BSD-3-Clause
 # Copyright(c) 2017 Intel Corporation
 
-drivers = ['aesni_gcm', 'aesni_mb', 'caam_jr', 'ccp', 'dpaa_sec', 'dpaa2_sec',
-	'kasumi', 'mvsam', 'nitrox', 'null', 'octeontx', 'openssl', 'qat',
-	'scheduler', 'snow3g', 'virtio', 'zuc']
+drivers = ['aesni_gcm',
+	   'aesni_mb',
+	   'caam_jr',
+	   'ccp',
+	   'dpaa_sec',
+	   'dpaa2_sec',
+	   'kasumi',
+	   'mvsam',
+	   'nitrox',
+	   'null',
+	   'octeontx',
+	   'octeontx2',
+	   'openssl',
+	   'qat',
+	   'scheduler',
+	   'snow3g',
+	   'virtio',
+	   'zuc']
 
 std_deps = ['cryptodev'] # cryptodev pulls in all other needed deps
 config_flag_fmt = 'RTE_LIBRTE_@0@_PMD'
diff --git a/drivers/crypto/octeontx2/Makefile b/drivers/crypto/octeontx2/Makefile
new file mode 100644
index 0000000..3273178
--- /dev/null
+++ b/drivers/crypto/octeontx2/Makefile
@@ -0,0 +1,37 @@ 
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright (C) 2019 Marvell International Ltd.
+#
+
+include $(RTE_SDK)/mk/rte.vars.mk
+
+# library name
+LIB = librte_pmd_octeontx2_crypto.a
+
+# library version
+LIBABIVER := 1
+
+# build flags
+CFLAGS += $(WERROR_FLAGS)
+
+LDLIBS += -lrte_eal -lrte_mbuf -lrte_mempool -lrte_ring
+LDLIBS += -lrte_cryptodev
+LDLIBS += -lrte_pci -lrte_bus_pci
+LDLIBS += -lrte_common_cpt -lrte_common_octeontx2
+
+VPATH += $(RTE_SDK)/drivers/crypto/octeontx2
+
+CFLAGS += -O3
+CFLAGS += -I$(RTE_SDK)/drivers/common/cpt
+CFLAGS += -I$(RTE_SDK)/drivers/common/octeontx2
+
+# PMD code
+SRCS-$(CONFIG_RTE_LIBRTE_PMD_OCTEONTX2_CRYPTO) += otx2_cryptodev.c
+SRCS-$(CONFIG_RTE_LIBRTE_PMD_OCTEONTX2_CRYPTO) += otx2_cryptodev_ops.c
+
+# export include files
+SYMLINK-y-include +=
+
+# versioning export map
+EXPORT_MAP := rte_pmd_octeontx2_crypto_version.map
+
+include $(RTE_SDK)/mk/rte.lib.mk
diff --git a/drivers/crypto/octeontx2/meson.build b/drivers/crypto/octeontx2/meson.build
new file mode 100644
index 0000000..2b55d2a
--- /dev/null
+++ b/drivers/crypto/octeontx2/meson.build
@@ -0,0 +1,29 @@ 
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright (C) 2019 Marvell International Ltd.
+
+if host_machine.system() != 'linux'
+        build = false
+endif
+
+deps += ['bus_pci']
+deps += ['common_cpt']
+deps += ['common_octeontx2']
+name = 'octeontx2_crypto'
+
+sources = files('otx2_cryptodev.c',
+		'otx2_cryptodev_ops.c')
+
+extra_flags = []
+# This integrated controller runs only on a arm64 machine, remove 32bit warnings
+if not dpdk_conf.get('RTE_ARCH_64')
+	extra_flags += ['-Wno-int-to-pointer-cast', '-Wno-pointer-to-int-cast']
+endif
+
+foreach flag: extra_flags
+	if cc.has_argument(flag)
+		cflags += flag
+	endif
+endforeach
+
+includes += include_directories('../../common/cpt')
+includes += include_directories('../../common/octeontx2')
diff --git a/drivers/crypto/octeontx2/otx2_cryptodev.c b/drivers/crypto/octeontx2/otx2_cryptodev.c
new file mode 100644
index 0000000..ca9f227
--- /dev/null
+++ b/drivers/crypto/octeontx2/otx2_cryptodev.c
@@ -0,0 +1,111 @@ 
+/* SPDX-License-Identifier: BSD-3-Clause
+ * Copyright (C) 2019 Marvell International Ltd.
+ */
+
+#include <rte_bus_pci.h>
+#include <rte_common.h>
+#include <rte_crypto.h>
+#include <rte_cryptodev.h>
+#include <rte_cryptodev_pmd.h>
+#include <rte_dev.h>
+#include <rte_errno.h>
+#include <rte_mempool.h>
+#include <rte_pci.h>
+
+#include "otx2_common.h"
+#include "otx2_cryptodev.h"
+#include "otx2_cryptodev_ops.h"
+
+/* CPT common headers */
+#include "cpt_common.h"
+#include "cpt_pmd_logs.h"
+
+int otx2_cpt_logtype;
+
+static struct rte_pci_id pci_id_cpt_table[] = {
+	{
+		RTE_PCI_DEVICE(PCI_VENDOR_ID_CAVIUM,
+			       PCI_DEVID_OCTEONTX2_RVU_CPT_VF)
+	},
+	/* sentinel */
+	{
+		.device_id = 0
+	},
+};
+
+static int
+otx2_cpt_pci_probe(struct rte_pci_driver *pci_drv __rte_unused,
+		   struct rte_pci_device *pci_dev)
+{
+	struct rte_cryptodev_pmd_init_params init_params = {
+		.name = "",
+		.socket_id = rte_socket_id(),
+		.private_data_size = sizeof(struct otx2_cpt_vf)
+	};
+	char name[RTE_CRYPTODEV_NAME_MAX_LEN];
+	struct rte_cryptodev *dev;
+	int ret;
+
+	rte_pci_device_name(&pci_dev->addr, name, sizeof(name));
+
+	dev = rte_cryptodev_pmd_create(name, &pci_dev->device, &init_params);
+	if (dev == NULL) {
+		ret = -ENODEV;
+		goto exit;
+	}
+
+	dev->dev_ops = &otx2_cpt_ops;
+
+	dev->driver_id = otx2_cryptodev_driver_id;
+
+	dev->feature_flags = RTE_CRYPTODEV_FF_SYMMETRIC_CRYPTO |
+			     RTE_CRYPTODEV_FF_HW_ACCELERATED;
+
+	return 0;
+
+exit:
+	CPT_LOG_ERR("Could not create device (vendor_id: 0x%x device_id: 0x%x)",
+		    pci_dev->id.vendor_id, pci_dev->id.device_id);
+	return ret;
+}
+
+static int
+otx2_cpt_pci_remove(struct rte_pci_device *pci_dev)
+{
+	char name[RTE_CRYPTODEV_NAME_MAX_LEN];
+	struct rte_cryptodev *dev;
+
+	if (pci_dev == NULL)
+		return -EINVAL;
+
+	rte_pci_device_name(&pci_dev->addr, name, sizeof(name));
+
+	dev = rte_cryptodev_pmd_get_named_dev(name);
+	if (dev == NULL)
+		return -ENODEV;
+
+	return rte_cryptodev_pmd_destroy(dev);
+}
+
+static struct rte_pci_driver otx2_cryptodev_pmd = {
+	.id_table = pci_id_cpt_table,
+	.drv_flags = RTE_PCI_DRV_NEED_MAPPING,
+	.probe = otx2_cpt_pci_probe,
+	.remove = otx2_cpt_pci_remove,
+};
+
+static struct cryptodev_driver otx2_cryptodev_drv;
+
+RTE_INIT(otx2_cpt_init_log);
+RTE_PMD_REGISTER_PCI(CRYPTODEV_NAME_OCTEONTX2_PMD, otx2_cryptodev_pmd);
+RTE_PMD_REGISTER_PCI_TABLE(CRYPTODEV_NAME_OCTEONTX2_PMD, pci_id_cpt_table);
+RTE_PMD_REGISTER_CRYPTO_DRIVER(otx2_cryptodev_drv, otx2_cryptodev_pmd.driver,
+		otx2_cryptodev_driver_id);
+
+RTE_INIT(otx2_cpt_init_log)
+{
+	/* Bus level logs */
+	otx2_cpt_logtype = rte_log_register("pmd.crypto.octeontx2");
+	if (otx2_cpt_logtype >= 0)
+		rte_log_set_level(otx2_cpt_logtype, RTE_LOG_NOTICE);
+}
diff --git a/drivers/crypto/octeontx2/otx2_cryptodev.h b/drivers/crypto/octeontx2/otx2_cryptodev.h
new file mode 100644
index 0000000..c9fe0c8
--- /dev/null
+++ b/drivers/crypto/octeontx2/otx2_cryptodev.h
@@ -0,0 +1,29 @@ 
+/* SPDX-License-Identifier: BSD-3-Clause
+ * Copyright (C) 2019 Marvell International Ltd.
+ */
+
+#ifndef _OTX2_CRYPTODEV_H_
+#define _OTX2_CRYPTODEV_H_
+
+#include "cpt_common.h"
+
+/* Marvell OCTEON TX2 Crypto PMD device name */
+#define CRYPTODEV_NAME_OCTEONTX2_PMD	crypto_octeontx2
+
+/**
+ * Device private data
+ */
+struct otx2_cpt_vf {
+	/* To be populated */
+};
+
+#define CPT_LOGTYPE otx2_cpt_logtype
+
+extern int otx2_cpt_logtype;
+
+/*
+ * Crypto device driver ID
+ */
+uint8_t otx2_cryptodev_driver_id;
+
+#endif /* _OTX2_CRYPTODEV_H_ */
diff --git a/drivers/crypto/octeontx2/otx2_cryptodev_ops.c b/drivers/crypto/octeontx2/otx2_cryptodev_ops.c
new file mode 100644
index 0000000..18ad470
--- /dev/null
+++ b/drivers/crypto/octeontx2/otx2_cryptodev_ops.c
@@ -0,0 +1,27 @@ 
+/* SPDX-License-Identifier: BSD-3-Clause
+ * Copyright (C) 2019 Marvell International Ltd.
+ */
+
+#include <rte_cryptodev_pmd.h>
+
+#include "otx2_cryptodev_ops.h"
+
+struct rte_cryptodev_ops otx2_cpt_ops = {
+	/* Device control ops */
+	.dev_configure = NULL,
+	.dev_start = NULL,
+	.dev_stop = NULL,
+	.dev_close = NULL,
+	.dev_infos_get = NULL,
+
+	.stats_get = NULL,
+	.stats_reset = NULL,
+	.queue_pair_setup = NULL,
+	.queue_pair_release = NULL,
+	.queue_pair_count = NULL,
+
+	/* Symmetric crypto ops */
+	.sym_session_get_size = NULL,
+	.sym_session_configure = NULL,
+	.sym_session_clear = NULL,
+};
diff --git a/drivers/crypto/octeontx2/otx2_cryptodev_ops.h b/drivers/crypto/octeontx2/otx2_cryptodev_ops.h
new file mode 100644
index 0000000..545614e
--- /dev/null
+++ b/drivers/crypto/octeontx2/otx2_cryptodev_ops.h
@@ -0,0 +1,12 @@ 
+/* SPDX-License-Identifier: BSD-3-Clause
+ * Copyright (C) 2019 Marvell International Ltd.
+ */
+
+#ifndef _OTX2_CRYPTODEV_OPS_H_
+#define _OTX2_CRYPTODEV_OPS_H_
+
+#include <rte_cryptodev_pmd.h>
+
+struct rte_cryptodev_ops otx2_cpt_ops;
+
+#endif /* _OTX2_CRYPTODEV_OPS_H_ */
diff --git a/drivers/crypto/octeontx2/rte_pmd_octeontx2_crypto_version.map b/drivers/crypto/octeontx2/rte_pmd_octeontx2_crypto_version.map
new file mode 100644
index 0000000..9a61188
--- /dev/null
+++ b/drivers/crypto/octeontx2/rte_pmd_octeontx2_crypto_version.map
@@ -0,0 +1,4 @@ 
+DPDK_19.08 {
+
+	local: *;
+};
diff --git a/mk/rte.app.mk b/mk/rte.app.mk
index 219c540..dbbb437 100644
--- a/mk/rte.app.mk
+++ b/mk/rte.app.mk
@@ -101,7 +101,9 @@  ifeq ($(CONFIG_RTE_EXEC_ENV_LINUX),y)
 _LDLIBS-$(CONFIG_RTE_LIBRTE_KNI)            += -lrte_kni
 endif
 
-ifeq ($(CONFIG_RTE_LIBRTE_PMD_OCTEONTX_CRYPTO),y)
+OTX-CPT-y := $(CONFIG_RTE_LIBRTE_PMD_OCTEONTX_CRYPTO)
+OTX-CPT-y += $(CONFIG_RTE_LIBRTE_PMD_OCTEONTX2_CRYPTO)
+ifeq ($(findstring y,$(OTX-CPT-y)),y)
 _LDLIBS-y += -lrte_common_cpt
 endif
 
@@ -109,6 +111,7 @@  ifeq ($(CONFIG_RTE_LIBRTE_PMD_OCTEONTX_SSOVF)$(CONFIG_RTE_LIBRTE_OCTEONTX_MEMPOO
 _LDLIBS-y += -lrte_common_octeontx
 endif
 OCTEONTX2-y := $(CONFIG_RTE_LIBRTE_OCTEONTX2_MEMPOOL)
+OCTEONTX2-y += $(CONFIG_RTE_LIBRTE_PMD_OCTEONTX2_CRYPTO)
 OCTEONTX2-y += $(CONFIG_RTE_LIBRTE_PMD_OCTEONTX2_EVENTDEV)
 OCTEONTX2-y += $(CONFIG_RTE_LIBRTE_PMD_OCTEONTX2_DMA_RAWDEV)
 OCTEONTX2-y += $(CONFIG_RTE_LIBRTE_OCTEONTX2_PMD)
@@ -269,6 +272,7 @@  _LDLIBS-$(CONFIG_RTE_LIBRTE_PMD_ARMV8_CRYPTO)    += -L$(ARMV8_CRYPTO_LIB_PATH) -
 _LDLIBS-$(CONFIG_RTE_LIBRTE_PMD_MVSAM_CRYPTO) += -L$(LIBMUSDK_PATH)/lib -lrte_pmd_mvsam_crypto -lmusdk
 _LDLIBS-$(CONFIG_RTE_LIBRTE_PMD_NITROX)      += -lrte_pmd_nitrox
 _LDLIBS-$(CONFIG_RTE_LIBRTE_PMD_OCTEONTX_CRYPTO) += -lrte_pmd_octeontx_crypto
+_LDLIBS-$(CONFIG_RTE_LIBRTE_PMD_OCTEONTX2_CRYPTO) += -lrte_pmd_octeontx2_crypto
 _LDLIBS-$(CONFIG_RTE_LIBRTE_PMD_CRYPTO_SCHEDULER) += -lrte_pmd_crypto_scheduler
 ifeq ($(CONFIG_RTE_LIBRTE_SECURITY),y)
 ifeq ($(CONFIG_RTE_EAL_VFIO)$(CONFIG_RTE_LIBRTE_FSLMC_BUS),yy)