[v2,10/12] crypto/octeontx2: add asymmetric session operations
diff mbox series

Message ID 1570970402-20278-11-git-send-email-anoobj@marvell.com
State Changes Requested
Delegated to: akhil goyal
Headers show
Series
  • add OCTEON TX2 crypto PMD
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Checks

Context Check Description
ci/checkpatch success coding style OK
ci/Intel-compilation fail apply issues

Commit Message

Anoob Joseph Oct. 13, 2019, 12:40 p.m. UTC
From: Kanaka Durga Kotamarthy <kkotamarthy@marvell.com>

This patch adds asymmetric session setup and free routines. RSA and
modexp operations are supported.

Signed-off-by: Anoob Joseph <anoobj@marvell.com>
Signed-off-by: Kanaka Durga Kotamarthy <kkotamarthy@marvell.com>
Signed-off-by: Sunila Sahu <ssahu@marvell.com>
---
 doc/guides/cryptodevs/features/octeontx2.ini       |  4 ++
 doc/guides/cryptodevs/octeontx2.rst                |  6 ++
 drivers/crypto/octeontx2/otx2_cryptodev.c          |  4 +-
 .../crypto/octeontx2/otx2_cryptodev_capabilities.c | 39 ++++++++++++-
 drivers/crypto/octeontx2/otx2_cryptodev_ops.c      | 67 ++++++++++++++++++++++
 5 files changed, 117 insertions(+), 3 deletions(-)

Patch
diff mbox series

diff --git a/doc/guides/cryptodevs/features/octeontx2.ini b/doc/guides/cryptodevs/features/octeontx2.ini
index 4e82463..7d07053 100644
--- a/doc/guides/cryptodevs/features/octeontx2.ini
+++ b/doc/guides/cryptodevs/features/octeontx2.ini
@@ -5,11 +5,13 @@ 
 ;
 [Features]
 Symmetric crypto       = Y
+Asymmetric crypto      = Y
 Sym operation chaining = Y
 HW Accelerated         = Y
 In Place SGL           = Y
 OOP SGL In LB  Out     = Y
 OOP SGL In SGL Out     = Y
+RSA PRIV OP KEY QT     = Y
 
 ;
 ; Supported crypto algorithms of 'octeontx2' crypto driver.
@@ -65,3 +67,5 @@  AES GCM (256) = Y
 ; Supported Asymmetric algorithms of the 'octeontx2' crypto driver.
 ;
 [Asymmetric]
+RSA                    = Y
+Modular Exponentiation = Y
diff --git a/doc/guides/cryptodevs/octeontx2.rst b/doc/guides/cryptodevs/octeontx2.rst
index 406d746..ad33c66 100644
--- a/doc/guides/cryptodevs/octeontx2.rst
+++ b/doc/guides/cryptodevs/octeontx2.rst
@@ -56,6 +56,12 @@  AEAD algorithms:
 
 * ``RTE_CRYPTO_AEAD_AES_GCM``
 
+Asymmetric Crypto Algorithms
+~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+
+* ``RTE_CRYPTO_ASYM_XFORM_RSA``
+* ``RTE_CRYPTO_ASYM_XFORM_MODEX``
+
 
 Installation
 ------------
diff --git a/drivers/crypto/octeontx2/otx2_cryptodev.c b/drivers/crypto/octeontx2/otx2_cryptodev.c
index 32c0b48..7fd216b 100644
--- a/drivers/crypto/octeontx2/otx2_cryptodev.c
+++ b/drivers/crypto/octeontx2/otx2_cryptodev.c
@@ -99,7 +99,9 @@  otx2_cpt_pci_probe(struct rte_pci_driver *pci_drv __rte_unused,
 			     RTE_CRYPTODEV_FF_SYM_OPERATION_CHAINING |
 			     RTE_CRYPTODEV_FF_IN_PLACE_SGL |
 			     RTE_CRYPTODEV_FF_OOP_SGL_IN_LB_OUT |
-			     RTE_CRYPTODEV_FF_OOP_SGL_IN_SGL_OUT;
+			     RTE_CRYPTODEV_FF_OOP_SGL_IN_SGL_OUT |
+			     RTE_CRYPTODEV_FF_ASYMMETRIC_CRYPTO |
+			     RTE_CRYPTODEV_FF_RSA_PRIV_OP_KEY_QT;
 
 	return 0;
 
diff --git a/drivers/crypto/octeontx2/otx2_cryptodev_capabilities.c b/drivers/crypto/octeontx2/otx2_cryptodev_capabilities.c
index 3a70470..b9e3fe3 100644
--- a/drivers/crypto/octeontx2/otx2_cryptodev_capabilities.c
+++ b/drivers/crypto/octeontx2/otx2_cryptodev_capabilities.c
@@ -6,7 +6,8 @@ 
 
 #include "otx2_cryptodev_capabilities.h"
 
-static const struct rte_cryptodev_capabilities otx2_cpt_sym_capabilities[] = {
+static const struct
+rte_cryptodev_capabilities otx2_cpt_capabilities[] = {
 	/* Symmetric capabilities */
 	{	/* NULL (AUTH) */
 		.op = RTE_CRYPTO_OP_TYPE_SYMMETRIC,
@@ -594,11 +595,45 @@  static const struct rte_cryptodev_capabilities otx2_cpt_sym_capabilities[] = {
 		}, }
 	},
 	/* End of symmetric capabilities */
+
+	/* Asymmetric capabilities */
+	{	/* RSA */
+		.op = RTE_CRYPTO_OP_TYPE_ASYMMETRIC,
+		{.asym = {
+			.xform_capa = {
+				.xform_type = RTE_CRYPTO_ASYM_XFORM_RSA,
+				.op_types = ((1 << RTE_CRYPTO_ASYM_OP_SIGN) |
+					(1 << RTE_CRYPTO_ASYM_OP_VERIFY) |
+					(1 << RTE_CRYPTO_ASYM_OP_ENCRYPT) |
+					(1 << RTE_CRYPTO_ASYM_OP_DECRYPT)),
+				{.modlen = {
+					.min = 17,
+					.max = 1024,
+					.increment = 1
+				}, }
+			}
+		}, }
+	},
+	{	/* MOD_EXP */
+		.op = RTE_CRYPTO_OP_TYPE_ASYMMETRIC,
+		{.asym = {
+			.xform_capa = {
+				.xform_type = RTE_CRYPTO_ASYM_XFORM_MODEX,
+				.op_types = 0,
+				{.modlen = {
+					.min = 17,
+					.max = 1024,
+					.increment = 1
+				}, }
+			}
+		}, }
+	},
+	/* End of asymmetric capabilities */
 	RTE_CRYPTODEV_END_OF_CAPABILITIES_LIST()
 };
 
 const struct rte_cryptodev_capabilities *
 otx2_cpt_capabilities_get(void)
 {
-	return otx2_cpt_sym_capabilities;
+	return otx2_cpt_capabilities;
 }
diff --git a/drivers/crypto/octeontx2/otx2_cryptodev_ops.c b/drivers/crypto/octeontx2/otx2_cryptodev_ops.c
index 1d35379..fbca4dc 100644
--- a/drivers/crypto/octeontx2/otx2_cryptodev_ops.c
+++ b/drivers/crypto/octeontx2/otx2_cryptodev_ops.c
@@ -18,6 +18,7 @@ 
 #include "cpt_pmd_logs.h"
 #include "cpt_pmd_ops_helper.h"
 #include "cpt_ucode.h"
+#include "cpt_ucode_asym.h"
 
 #define METABUF_POOL_CACHE_SIZE	512
 
@@ -835,6 +836,66 @@  otx2_cpt_sym_session_clear(struct rte_cryptodev *dev,
 	return sym_session_clear(dev->driver_id, sess);
 }
 
+static unsigned int
+otx2_cpt_asym_session_size_get(struct rte_cryptodev *dev __rte_unused)
+{
+	return sizeof(struct cpt_asym_sess_misc);
+}
+
+static int
+otx2_cpt_asym_session_cfg(struct rte_cryptodev *dev,
+			  struct rte_crypto_asym_xform *xform,
+			  struct rte_cryptodev_asym_session *sess,
+			  struct rte_mempool *pool)
+{
+	struct cpt_asym_sess_misc *priv;
+	int ret;
+
+	CPT_PMD_INIT_FUNC_TRACE();
+
+	if (rte_mempool_get(pool, (void **)&priv)) {
+		CPT_LOG_ERR("Could not allocate session_private_data");
+		return -ENOMEM;
+	}
+
+	memset(priv, 0, sizeof(struct cpt_asym_sess_misc));
+
+	ret = cpt_fill_asym_session_parameters(priv, xform);
+	if (ret) {
+		CPT_LOG_ERR("Could not configure session parameters");
+
+		/* Return session to mempool */
+		rte_mempool_put(pool, priv);
+		return ret;
+	}
+
+	set_asym_session_private_data(sess, dev->driver_id, priv);
+	return 0;
+}
+
+static void
+otx2_cpt_asym_session_clear(struct rte_cryptodev *dev,
+			    struct rte_cryptodev_asym_session *sess)
+{
+	struct cpt_asym_sess_misc *priv;
+	struct rte_mempool *sess_mp;
+
+	CPT_PMD_INIT_FUNC_TRACE();
+
+	priv = get_asym_session_private_data(sess, dev->driver_id);
+	if (priv == NULL)
+		return;
+
+	/* Free resources allocated in session_cfg */
+	cpt_free_asym_session_parameters(priv);
+
+	/* Reset and free object back to pool */
+	memset(priv, 0, otx2_cpt_asym_session_size_get(dev));
+	sess_mp = rte_mempool_from_obj(priv);
+	set_asym_session_private_data(sess, dev->driver_id, NULL);
+	rte_mempool_put(sess_mp, priv);
+}
+
 struct rte_cryptodev_ops otx2_cpt_ops = {
 	/* Device control ops */
 	.dev_configure = otx2_cpt_dev_config,
@@ -853,4 +914,10 @@  struct rte_cryptodev_ops otx2_cpt_ops = {
 	.sym_session_get_size = otx2_cpt_sym_session_get_size,
 	.sym_session_configure = otx2_cpt_sym_session_configure,
 	.sym_session_clear = otx2_cpt_sym_session_clear,
+
+	/* Asymmetric crypto ops */
+	.asym_session_get_size = otx2_cpt_asym_session_size_get,
+	.asym_session_configure = otx2_cpt_asym_session_cfg,
+	.asym_session_clear = otx2_cpt_asym_session_clear,
+
 };