[v2,1/1] net/octeontx2: add Rx/Tx burst mode get callbacks
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Commit Message
Retrieve burst mode options according to the selected Rx/Tx burst
function.
Signed-off-by: Sunil Kumar Kori <skori@marvell.com>
---
v2:
- Rebased the patch on latest commit.
- Update feature matrix for the support.
doc/guides/nics/features/octeontx2.ini | 1 +
drivers/net/octeontx2/otx2_ethdev.c | 2 ++
drivers/net/octeontx2/otx2_ethdev.h | 4 +++
drivers/net/octeontx2/otx2_ethdev_ops.c | 45 +++++++++++++++++++++++++
4 files changed, 52 insertions(+)
Comments
On Mon, Nov 4, 2019 at 11:37 AM Sunil Kumar Kori <skori@marvell.com> wrote:
>
> Retrieve burst mode options according to the selected Rx/Tx burst
> function.
>
> Signed-off-by: Sunil Kumar Kori <skori@marvell.com>
> ---
> v2:
> - Rebased the patch on latest commit.
> - Update feature matrix for the support.
Please rework this patch based on Haiyue's new patch
http://patches.dpdk.org/patch/62368/
Please choose the string[2] based on Rx[1] and Tx offload flags
[1]
#define NIX_RX_OFFLOAD_NONE (0)
#define NIX_RX_OFFLOAD_RSS_F BIT(0)
#define NIX_RX_OFFLOAD_PTYPE_F BIT(1)
#define NIX_RX_OFFLOAD_CHECKSUM_F BIT(2)
#define NIX_RX_OFFLOAD_VLAN_STRIP_F BIT(3)
#define NIX_RX_OFFLOAD_MARK_UPDATE_F BIT(4)
#define NIX_RX_OFFLOAD_TSTAMP_F BIT(5)
example: [2]
otx2_rx_vec_cksum_mark_rss
@@ -13,6 +13,7 @@ Link status = Y
Link status event = Y
Runtime Rx queue setup = Y
Runtime Tx queue setup = Y
+Burst mode info = Y
Fast mbuf free = Y
Free Tx mbuf on demand = Y
Queue start/stop = Y
@@ -1978,6 +1978,8 @@ static const struct eth_dev_ops otx2_eth_dev_ops = {
.xstats_get_names_by_id = otx2_nix_xstats_get_names_by_id,
.rxq_info_get = otx2_nix_rxq_info_get,
.txq_info_get = otx2_nix_txq_info_get,
+ .rx_burst_mode_get = otx2_rx_burst_mode_get,
+ .tx_burst_mode_get = otx2_tx_burst_mode_get,
.rx_queue_count = otx2_nix_rx_queue_count,
.rx_descriptor_done = otx2_nix_rx_descriptor_done,
.rx_descriptor_status = otx2_nix_rx_descriptor_status,
@@ -388,6 +388,10 @@ void otx2_nix_rxq_info_get(struct rte_eth_dev *eth_dev, uint16_t queue_id,
struct rte_eth_rxq_info *qinfo);
void otx2_nix_txq_info_get(struct rte_eth_dev *eth_dev, uint16_t queue_id,
struct rte_eth_txq_info *qinfo);
+int otx2_rx_burst_mode_get(struct rte_eth_dev *dev, uint16_t queue_id,
+ struct rte_eth_burst_mode *mode);
+int otx2_tx_burst_mode_get(struct rte_eth_dev *dev, uint16_t queue_id,
+ struct rte_eth_burst_mode *mode);
uint32_t otx2_nix_rx_queue_count(struct rte_eth_dev *eth_dev, uint16_t qidx);
int otx2_nix_tx_done_cleanup(void *txq, uint32_t free_cnt);
int otx2_nix_rx_descriptor_done(void *rxq, uint16_t offset);
@@ -2,6 +2,7 @@
* Copyright(C) 2019 Marvell International Ltd.
*/
+#include <rte_ethdev.h>
#include <rte_mbuf_pool_ops.h>
#include "otx2_ethdev.h"
@@ -221,6 +222,50 @@ otx2_nix_txq_info_get(struct rte_eth_dev *eth_dev, uint16_t queue_id,
qinfo->conf.tx_deferred_start = 0;
}
+int
+otx2_rx_burst_mode_get(struct rte_eth_dev *eth_dev,
+ __rte_unused uint16_t queue_id,
+ struct rte_eth_burst_mode *mode)
+{
+ struct otx2_eth_dev *dev = otx2_eth_pmd_priv(eth_dev);
+ uint64_t options;
+
+ if (dev->scalar_ena || dev->rx_offloads & DEV_RX_OFFLOAD_TIMESTAMP)
+ options = RTE_ETH_BURST_SCALAR;
+ else
+ options = RTE_ETH_BURST_VECTOR | RTE_ETH_BURST_NEON;
+
+ if (dev->rx_offloads & DEV_RX_OFFLOAD_SCATTER)
+ options = RTE_ETH_BURST_SCALAR | RTE_ETH_BURST_SCATTERED;
+
+ mode->options = options;
+
+ return 0;
+}
+
+int
+otx2_tx_burst_mode_get(struct rte_eth_dev *eth_dev,
+ __rte_unused uint16_t queue_id,
+ struct rte_eth_burst_mode *mode)
+{
+ struct otx2_eth_dev *dev = otx2_eth_pmd_priv(eth_dev);
+ uint64_t options;
+
+ if (dev->scalar_ena ||
+ (dev->tx_offload_flags &
+ (NIX_TX_OFFLOAD_VLAN_QINQ_F | NIX_TX_OFFLOAD_TSTAMP_F)))
+ options = RTE_ETH_BURST_SCALAR;
+ else
+ options = RTE_ETH_BURST_VECTOR | RTE_ETH_BURST_NEON;
+
+ if (dev->tx_offloads & DEV_TX_OFFLOAD_MULTI_SEGS)
+ options = RTE_ETH_BURST_SCALAR | RTE_ETH_BURST_SCATTERED;
+
+ mode->options = options;
+
+ return 0;
+}
+
static void
nix_rx_head_tail_get(struct otx2_eth_dev *dev,
uint32_t *head, uint32_t *tail, uint16_t queue_idx)