[v3,2/3] config: add arm neoverse N1 SDP configuration
diff mbox series

Message ID 1573450911-24317-3-git-send-email-gavin.hu@arm.com
State Accepted, archived
Delegated to: Thomas Monjalon
Headers show
Series
  • add arm N1SDP and A76 configurations
Related show

Checks

Context Check Description
ci/Intel-compilation success Compilation OK
ci/checkpatch success coding style OK

Commit Message

Gavin Hu (Arm Technology China) Nov. 11, 2019, 5:41 a.m. UTC
Arm N1 SDP is an infrastructure segment development platform
based on armv8.2-a Neoverse N1 CPU. For more information, refer to:
https://community.arm.com/developer/tools-software/oss-platforms/w/
docs/440/neoverse-n1-sdp

Signed-off-by: Gavin Hu <gavin.hu@arm.com>
Reviewed-by: Honnappa Nagarahalli <honnappa.nagarahalli@arm.com>
Reviewed-by: Steve Capper <steve.capper@arm.com>
---
V3
-change the configuration name from "neoversen1" to "n1sdp" to be platform
specific other than microarchitecture specific
-add the missing config/arm/arm64_n1sdp_linux-gcc file for meson build
---
 config/arm/arm64_n1sdp_linux_gcc          | 16 +++++++++++++++
 config/arm/meson.build                    |  9 +++++++-
 config/defconfig_arm64-n1sdp-linux-gcc    |  1 +
 config/defconfig_arm64-n1sdp-linuxapp-gcc | 14 +++++++++++++
 mk/machine/n1sdp/rte.vars.mk              | 34 +++++++++++++++++++++++++++++++
 5 files changed, 73 insertions(+), 1 deletion(-)
 create mode 100644 config/arm/arm64_n1sdp_linux_gcc
 create mode 120000 config/defconfig_arm64-n1sdp-linux-gcc
 create mode 100644 config/defconfig_arm64-n1sdp-linuxapp-gcc
 create mode 100644 mk/machine/n1sdp/rte.vars.mk

Comments

Jerin Jacob Nov. 12, 2019, 4:23 a.m. UTC | #1
On Mon, Nov 11, 2019 at 11:12 AM Gavin Hu <gavin.hu@arm.com> wrote:
>
> Arm N1 SDP is an infrastructure segment development platform
> based on armv8.2-a Neoverse N1 CPU. For more information, refer to:
> https://community.arm.com/developer/tools-software/oss-platforms/w/
> docs/440/neoverse-n1-sdp
>
> Signed-off-by: Gavin Hu <gavin.hu@arm.com>
> Reviewed-by: Honnappa Nagarahalli <honnappa.nagarahalli@arm.com>
> Reviewed-by: Steve Capper <steve.capper@arm.com>
> ---
> V3
> -change the configuration name from "neoversen1" to "n1sdp" to be platform
> specific other than microarchitecture specific
> -add the missing config/arm/arm64_n1sdp_linux-gcc file for meson build
> ---

> +[properties]
> +implementor_id = '0x41'
> +implementor_pn = '0xd0c'
> diff --git a/config/arm/meson.build b/config/arm/meson.build
> index 46dff3a..b56e442 100644
> --- a/config/arm/meson.build
> +++ b/config/arm/meson.build
> @@ -57,6 +57,12 @@ flags_armada = [
>         ['RTE_MAX_LCORE', 16]]
>
>  flags_default_extra = []
> +flags_n1sdp_extra = [
> +       ['RTE_MACHINE', '"n1sdp"'],
> +       ['RTE_MAX_NUMA_NODES', 1],
> +       ['RTE_MAX_LCORE', 4],
> +       ['RTE_EAL_NUMA_AWARE_HUGEPAGES', false],
> +       ['RTE_LIBRTE_VHOST_NUMA', false]]

Shouldn't we add ['RTE_CACHE_LINE_SIZE', 64], here?

>  flags_thunderx_extra = [
Gavin Hu (Arm Technology China) Nov. 14, 2019, 7:55 a.m. UTC | #2
Hi Jerin,

> -----Original Message-----
> From: Jerin Jacob <jerinjacobk@gmail.com>
> Sent: Tuesday, November 12, 2019 12:24 PM
> To: Gavin Hu (Arm Technology China) <Gavin.Hu@arm.com>
> Cc: dpdk-dev <dev@dpdk.org>; nd <nd@arm.com>; thomas@monjalon.net;
> Honnappa Nagarahalli <Honnappa.Nagarahalli@arm.com>
> Subject: Re: [dpdk-dev] [PATCH v3 2/3] config: add arm neoverse N1 SDP
> configuration
> 
> On Mon, Nov 11, 2019 at 11:12 AM Gavin Hu <gavin.hu@arm.com> wrote:
> >
> > Arm N1 SDP is an infrastructure segment development platform
> > based on armv8.2-a Neoverse N1 CPU. For more information, refer to:
> > https://community.arm.com/developer/tools-software/oss-platforms/w/
> > docs/440/neoverse-n1-sdp
> >
> > Signed-off-by: Gavin Hu <gavin.hu@arm.com>
> > Reviewed-by: Honnappa Nagarahalli <honnappa.nagarahalli@arm.com>
> > Reviewed-by: Steve Capper <steve.capper@arm.com>
> > ---
> > V3
> > -change the configuration name from "neoversen1" to "n1sdp" to be
> platform
> > specific other than microarchitecture specific
> > -add the missing config/arm/arm64_n1sdp_linux-gcc file for meson build
> > ---
> 
> > +[properties]
> > +implementor_id = '0x41'
> > +implementor_pn = '0xd0c'
> > diff --git a/config/arm/meson.build b/config/arm/meson.build
> > index 46dff3a..b56e442 100644
> > --- a/config/arm/meson.build
> > +++ b/config/arm/meson.build
> > @@ -57,6 +57,12 @@ flags_armada = [
> >         ['RTE_MAX_LCORE', 16]]
> >
> >  flags_default_extra = []
> > +flags_n1sdp_extra = [
> > +       ['RTE_MACHINE', '"n1sdp"'],
> > +       ['RTE_MAX_NUMA_NODES', 1],
> > +       ['RTE_MAX_LCORE', 4],
> > +       ['RTE_EAL_NUMA_AWARE_HUGEPAGES', false],
> > +       ['RTE_LIBRTE_VHOST_NUMA', false]]
> 
> Shouldn't we add ['RTE_CACHE_LINE_SIZE', 64], here?
Arm defines it in the upper implemter_id level 
flags_arm = [
	['RTE_MACHINE', '"armv8a"'],
	['RTE_MAX_LCORE', 16],
	['RTE_USE_C11_MEM_MODEL', true],
	['RTE_CACHE_LINE_SIZE', 64]]
http://code.dpdk.org/dpdk/latest/source/config/arm/meson.build#L40

> 
> >  flags_thunderx_extra = [
Jerin Jacob Nov. 14, 2019, 8:17 a.m. UTC | #3
On Mon, Nov 11, 2019 at 11:12 AM Gavin Hu <gavin.hu@arm.com> wrote:
>
> Arm N1 SDP is an infrastructure segment development platform
> based on armv8.2-a Neoverse N1 CPU. For more information, refer to:
> https://community.arm.com/developer/tools-software/oss-platforms/w/
> docs/440/neoverse-n1-sdp
>
> Signed-off-by: Gavin Hu <gavin.hu@arm.com>
> Reviewed-by: Honnappa Nagarahalli <honnappa.nagarahalli@arm.com>
> Reviewed-by: Steve Capper <steve.capper@arm.com>
> ---

Acked-by: Jerin Jacob <jerinj@marvell.com>

Patch
diff mbox series

diff --git a/config/arm/arm64_n1sdp_linux_gcc b/config/arm/arm64_n1sdp_linux_gcc
new file mode 100644
index 0000000..83dad3d
--- /dev/null
+++ b/config/arm/arm64_n1sdp_linux_gcc
@@ -0,0 +1,16 @@ 
+[binaries]
+c = 'aarch64-linux-gnu-gcc'
+cpp = 'aarch64-linux-gnu-cpp'
+ar = 'aarch64-linux-gnu-gcc-ar'
+strip = 'aarch64-linux-gnu-strip'
+pcap-config = ''
+
+[host_machine]
+system = 'linux'
+cpu_family = 'aarch64'
+cpu = 'armv8-a'
+endian = 'little'
+
+[properties]
+implementor_id = '0x41'
+implementor_pn = '0xd0c'
diff --git a/config/arm/meson.build b/config/arm/meson.build
index 46dff3a..b56e442 100644
--- a/config/arm/meson.build
+++ b/config/arm/meson.build
@@ -57,6 +57,12 @@  flags_armada = [
 	['RTE_MAX_LCORE', 16]]
 
 flags_default_extra = []
+flags_n1sdp_extra = [
+	['RTE_MACHINE', '"n1sdp"'],
+	['RTE_MAX_NUMA_NODES', 1],
+	['RTE_MAX_LCORE', 4],
+	['RTE_EAL_NUMA_AWARE_HUGEPAGES', false],
+	['RTE_LIBRTE_VHOST_NUMA', false]]
 flags_thunderx_extra = [
 	['RTE_MACHINE', '"thunderx"'],
 	['RTE_USE_C11_MEM_MODEL', false]]
@@ -83,7 +89,8 @@  machine_args_generic = [
 	['0xd07', ['-mcpu=cortex-a57']],
 	['0xd08', ['-mcpu=cortex-a72']],
 	['0xd09', ['-mcpu=cortex-a73']],
-	['0xd0a', ['-mcpu=cortex-a75']]]
+	['0xd0a', ['-mcpu=cortex-a75']],
+	['0xd0c', ['-march=armv8.2-a+crc+crypto', '-mcpu=neoverse-n1'], flags_n1sdp_extra]]
 
 machine_args_cavium = [
 	['default', ['-march=armv8-a+crc+crypto','-mcpu=thunderx']],
diff --git a/config/defconfig_arm64-n1sdp-linux-gcc b/config/defconfig_arm64-n1sdp-linux-gcc
new file mode 120000
index 0000000..103bbea
--- /dev/null
+++ b/config/defconfig_arm64-n1sdp-linux-gcc
@@ -0,0 +1 @@ 
+defconfig_arm64-n1sdp-linuxapp-gcc
\ No newline at end of file
diff --git a/config/defconfig_arm64-n1sdp-linuxapp-gcc b/config/defconfig_arm64-n1sdp-linuxapp-gcc
new file mode 100644
index 0000000..f913809
--- /dev/null
+++ b/config/defconfig_arm64-n1sdp-linuxapp-gcc
@@ -0,0 +1,14 @@ 
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2019 Arm Ltd.
+#
+
+#include "defconfig_arm64-armv8a-linux-gcc"
+
+CONFIG_RTE_MACHINE="n1sdp"
+CONFIG_RTE_MAX_LCORE=4
+CONFIG_RTE_MAX_NUMA_NODES=1
+CONFIG_RTE_CACHE_LINE_SIZE=64
+
+# Doesn't support NUMA
+CONFIG_RTE_EAL_NUMA_AWARE_HUGEPAGES=n
+CONFIG_RTE_LIBRTE_VHOST_NUMA=n
diff --git a/mk/machine/n1sdp/rte.vars.mk b/mk/machine/n1sdp/rte.vars.mk
new file mode 100644
index 0000000..6d69de0
--- /dev/null
+++ b/mk/machine/n1sdp/rte.vars.mk
@@ -0,0 +1,34 @@ 
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2019 Arm Ltd
+#
+
+#
+# machine:
+#
+#   - can define ARCH variable (overridden by cmdline value)
+#   - can define CROSS variable (overridden by cmdline value)
+#   - define MACHINE_CFLAGS variable (overridden by cmdline value)
+#   - define MACHINE_LDFLAGS variable (overridden by cmdline value)
+#   - define MACHINE_ASFLAGS variable (overridden by cmdline value)
+#   - can define CPU_CFLAGS variable (overridden by cmdline value) that
+#     overrides the one defined in arch.
+#   - can define CPU_LDFLAGS variable (overridden by cmdline value) that
+#     overrides the one defined in arch.
+#   - can define CPU_ASFLAGS variable (overridden by cmdline value) that
+#     overrides the one defined in arch.
+#   - may override any previously defined variable
+#
+
+# ARCH =
+# CROSS =
+# MACHINE_CFLAGS =
+# MACHINE_LDFLAGS =
+# MACHINE_ASFLAGS =
+# CPU_CFLAGS =
+# CPU_LDFLAGS =
+# CPU_ASFLAGS =
+
+include $(RTE_SDK)/mk/rte.helper.mk
+
+MACHINE_CFLAGS += $(call rte_cc_has_argument, -march=armv8.2-a+crc+crypto)
+MACHINE_CFLAGS += $(call rte_cc_has_argument, -mcpu=neoverse-n1)