diff mbox series

[v2,21/36] net/i40e/base: add FWS1B register masks

Message ID	20191212152124.260629-22-xiaolong.ye@intel.com (mailing list archive)
State	Changes Requested, archived
Delegated to:	xiaolong ye
Headers	From: Xiaolong Ye <xiaolong.ye@intel.com> To: Beilei Xing <beilei.xing@intel.com>, Qi Zhang <qi.z.zhang@intel.com> Cc: dev@dpdk.org, Xiaolong Ye <xiaolong.ye@intel.com> Date: Thu, 12 Dec 2019 23:21:09 +0800 Message-Id: <20191212152124.260629-22-xiaolong.ye@intel.com> In-Reply-To: <20191212152124.260629-1-xiaolong.ye@intel.com> References: <20191202074935.97629-1-xiaolong.ye@intel.com> <20191212152124.260629-1-xiaolong.ye@intel.com> Subject: [dpdk-dev] [PATCH v2 21/36] net/i40e/base: add FWS1B register masks Precedence: list Errors-To: dev-bounces@dpdk.org Sender: "dev" <dev-bounces@dpdk.org>
Series	update for i40e base code \| [v2,00/36] update for i40e base code [v2,01/36] net/i40e/base: add support for feature flags [v2,02/36] net/i40e/base: increase max VSI count for VFs [v2,03/36] net/i40e/base: change buffer address [v2,04/36] net/i40e/base: decouple cfg_lldp_mib_change from init_dcb [v2,05/36] net/i40e/base: change misleading error message [v2,06/36] net/i40e/base: further implementation of LLDP [v2,07/36] net/i40e/base: add new device ids [v2,08/36] net/i40e/base: add check for MAC type [v2,09/36] net/i40e/base: adding flags for PHY types [v2,10/36] net/i40e/base: improve AQ log granularity [v2,11/36] net/i40e/base: add getter for FW LLDP agent status [v2,12/36] net/i40e/base: add support for Energy Efficient Ethernet [v2,13/36] net/i40e/base: read LPI status from external PHY [v2,14/36] net/i40e/base: change for missing "link modes" [v2,15/36] net/i40e/base: add reading LPI counters [v2,16/36] net/i40e/base: backport style changes from upstream Linux [v2,17/36] net/i40e/base: update status codes [v2,18/36] net/i40e/base: change of the incorrect Tx descriptors number [v2,19/36] net/i40e/base: extend PHY access AQ command [v2,20/36] net/i40e/base: add drop mode parameter to set MAC config [v2,21/36] net/i40e/base: add FWS1B register masks [v2,22/36] net/i40e/base: update FW API version [v2,23/36] net/i40e/base: add persistent lldp support [v2,24/36] net/i40e/base: make i40e_set_mac_type() public [v2,25/36] net/i40e/base: change retrying logic [v2,26/36] net/i40e/base: mark additional missing bits as reserved [v2,27/36] net/i40e/base: change wrong 'Advertised FEC modes' [v2,28/36] net/i40e/base: add Flow Director defines [v2,29/36] net/i40e/base: removed unreachable code [v2,30/36] net/i40e/base: set PHY Access flag on X722 [v2,31/36] net/i40e/base: implement reading lpi statistics [v2,32/36] net/i40e/base: exposing missing LED functionality [v2,33/36] net/i40e/base: introduce firmware EMP reset register offsets [v2,34/36] net/i40e/base: add CRC stripping capability [v2,35/36] net/i40e/base: enable LED blinking flow [v2,36/36] net/i40e/base: add new link speed constants

Checks

Context	Check	Description
ci/checkpatch	success	coding style OK
ci/Intel-compilation	fail	apply issues

Commit Message

Xiaolong Ye Dec. 12, 2019, 3:21 p.m. UTC

  Function check_recovery_mode had wrong if statement. Now we check proper
FWS1B register values, which are responsible for the recovery mode.
Recovery mode has 6 values in total. That's why we need 6 different flags.
Now in if statement we recognize type of mac and register value. Without
those changes driver could show wrong state.

Signed-off-by: Xiaolong Ye <xiaolong.ye@intel.com>
---
 drivers/net/i40e/base/i40e_register.h | 12 ++++++++++++
 1 file changed, 12 insertions(+)

diff mbox series

Patch

diff --git a/drivers/net/i40e/base/i40e_register.h b/drivers/net/i40e/base/i40e_register.h
index e93ec3f58..6804aba51 100644
--- a/drivers/net/i40e/base/i40e_register.h
+++ b/drivers/net/i40e/base/i40e_register.h
@@ -366,6 +366,18 @@ 
 #define I40E_GL_FWSTS_FWRI_MASK   I40E_MASK(0x1, I40E_GL_FWSTS_FWRI_SHIFT)
 #define I40E_GL_FWSTS_FWS1B_SHIFT 16
 #define I40E_GL_FWSTS_FWS1B_MASK  I40E_MASK(0xFF, I40E_GL_FWSTS_FWS1B_SHIFT)
+#define I40E_XL710_GL_FWSTS_FWS1B_REC_MOD_CORER_MASK \
+				I40E_MASK(0x30, I40E_GL_FWSTS_FWS1B_SHIFT)
+#define I40E_XL710_GL_FWSTS_FWS1B_REC_MOD_GLOBR_MASK \
+				I40E_MASK(0x31, I40E_GL_FWSTS_FWS1B_SHIFT)
+#define I40E_XL710_GL_FWSTS_FWS1B_REC_MOD_TRANSITION_MASK \
+				I40E_MASK(0x32, I40E_GL_FWSTS_FWS1B_SHIFT)
+#define I40E_XL710_GL_FWSTS_FWS1B_REC_MOD_NVM_MASK \
+				I40E_MASK(0x33, I40E_GL_FWSTS_FWS1B_SHIFT)
+#define I40E_X722_GL_FWSTS_FWS1B_REC_MOD_CORER_MASK \
+				I40E_MASK(0xB, I40E_GL_FWSTS_FWS1B_SHIFT)
+#define I40E_X722_GL_FWSTS_FWS1B_REC_MOD_GLOBR_MASK \
+				I40E_MASK(0xC, I40E_GL_FWSTS_FWS1B_SHIFT)
 #define I40E_GLGEN_CLKSTAT                    0x000B8184 /* Reset: POR */
 #define I40E_GLGEN_CLKSTAT_CLKMODE_SHIFT      0
 #define I40E_GLGEN_CLKSTAT_CLKMODE_MASK       I40E_MASK(0x1, I40E_GLGEN_CLKSTAT_CLKMODE_SHIFT)