diff mbox series

[09/11] net/hns3: fix dumping VF register information

Message ID 20200109031559.63194-10-huwei013@chinasoftinc.com (mailing list archive)
State Accepted, archived
Delegated to: Ferruh Yigit
Headers
Series misc updates and fixes for hns3 PMD driver |

Checks

Context Check Description
ci/checkpatch success coding style OK
ci/Intel-compilation success Compilation OK

Commit Message

Wei Hu (Xavier) Jan. 9, 2020, 3:15 a.m. UTC 
  From: "Wei Hu (Xavier)" <xavier.huwei@huawei.com>

Currently, when the API interface named rte_eth_dev_get_reg_info is called
by upper applications based on VF device, it returns error.

We can read registers directly to get ring and interrupt related
information in hns3 PF/VF PMD driver. But for some other internal table
entries and common configuration information, we can get them only
through the command interface between driver and firmware in PF driver,
and VF driver has not the related access permission.

This patch fixes it by preventing getting these information through the
command interface based on VF device in 'get_reg' ops implementation
function.

Fixes: 936eda25e8da ("net/hns3: support dump register")
Cc: stable@dpdk.org

Signed-off-by: Chengwen Feng <fengchengwen@huawei.com>
Signed-off-by: Wei Hu (Xavier) <xavier.huwei@huawei.com>
---
 drivers/net/hns3/hns3_regs.c | 29 ++++++++++++++++++-----------
 1 file changed, 18 insertions(+), 11 deletions(-)
diff mbox series

Patch

diff --git a/drivers/net/hns3/hns3_regs.c b/drivers/net/hns3/hns3_regs.c
index 23405030e..a3f2a51f9 100644
--- a/drivers/net/hns3/hns3_regs.c
+++ b/drivers/net/hns3/hns3_regs.c
@@ -118,15 +118,9 @@  hns3_get_regs_length(struct hns3_hw *hw, uint32_t *length)
 	struct hns3_adapter *hns = HNS3_DEV_HW_TO_ADAPTER(hw);
 	int cmdq_lines, common_lines, ring_lines, tqp_intr_lines;
 	uint32_t regs_num_32_bit, regs_num_64_bit;
+	uint32_t len;
 	int ret;
 
-	ret = hns3_get_regs_num(hw, &regs_num_32_bit, &regs_num_64_bit);
-	if (ret) {
-		hns3_err(hw, "Get register number failed, ret = %d.",
-			 ret);
-		return -ENOTSUP;
-	}
-
 	cmdq_lines = sizeof(cmdq_reg_addrs) / REG_LEN_PER_LINE + 1;
 	if (hns->is_vf)
 		common_lines =
@@ -136,11 +130,21 @@  hns3_get_regs_length(struct hns3_hw *hw, uint32_t *length)
 	ring_lines = sizeof(ring_reg_addrs) / REG_LEN_PER_LINE + 1;
 	tqp_intr_lines = sizeof(tqp_intr_reg_addrs) / REG_LEN_PER_LINE + 1;
 
-	*length = (cmdq_lines + common_lines + ring_lines * hw->tqps_num +
-		   tqp_intr_lines * hw->num_msi) * REG_LEN_PER_LINE +
-		  regs_num_32_bit * sizeof(uint32_t) +
-		  regs_num_64_bit * sizeof(uint64_t);
+	len = (cmdq_lines + common_lines + ring_lines * hw->tqps_num +
+	      tqp_intr_lines * hw->num_msi) * REG_LEN_PER_LINE;
 
+	if (!hns->is_vf) {
+		ret = hns3_get_regs_num(hw, &regs_num_32_bit, &regs_num_64_bit);
+		if (ret) {
+			hns3_err(hw, "Get register number failed, ret = %d.",
+				 ret);
+			return -ENOTSUP;
+		}
+		len += regs_num_32_bit * sizeof(uint32_t) +
+		       regs_num_64_bit * sizeof(uint64_t);
+	}
+
+	*length = len;
 	return 0;
 }
 
@@ -346,6 +350,9 @@  hns3_get_regs(struct rte_eth_dev *eth_dev, struct rte_dev_reg_info *regs)
 	/* fetching per-PF registers values from PF PCIe register space */
 	hns3_direct_access_regs(hw, data);
 
+	if (hns->is_vf)
+		return 0;
+
 	ret = hns3_get_regs_num(hw, &regs_num_32_bit, &regs_num_64_bit);
 	if (ret) {
 		hns3_err(hw, "Get register number failed, ret = %d", ret);