[v2] doc: update hairpin data buffer size config

Message ID 1587447151-122283-1-git-send-email-bingz@mellanox.com (mailing list archive)
State Superseded, archived
Delegated to: Raslan Darawsheh
Headers
Series [v2] doc: update hairpin data buffer size config |

Checks

Context Check Description
ci/checkpatch success coding style OK
ci/Intel-compilation fail Compilation issues

Commit Message

Bing Zhao April 21, 2020, 5:32 a.m. UTC
  This patch updates the MLX5 PMD and release notes documentations.
Adding the guideline for hairpin data buffer size configuration.

Signed-off-by: Bing Zhao <bingz@mellanox.com>
---
v2: update the range description of hairpin data buffer size
---
 doc/guides/nics/mlx5.rst               | 16 ++++++++++++++++
 doc/guides/rel_notes/release_20_05.rst |  1 +
 2 files changed, 17 insertions(+)
  

Comments

Ori Kam April 21, 2020, 6:38 a.m. UTC | #1
> -----Original Message-----
> From: Bing Zhao <bingz@mellanox.com>
> Sent: Tuesday, April 21, 2020 8:33 AM
> To: john.mcnamara@intel.com; marko.kovacevic@intel.com; Slava Ovsiienko
> <viacheslavo@mellanox.com>; Matan Azrad <matan@mellanox.com>; Ori Kam
> <orika@mellanox.com>
> Cc: Shahaf Shuler <shahafs@mellanox.com>; Raslan Darawsheh
> <rasland@mellanox.com>; dev@dpdk.org; Thomas Monjalon
> <thomas@monjalon.net>
> Subject: [PATCH v2] doc: update hairpin data buffer size config
> 
> This patch updates the MLX5 PMD and release notes documentations.
> Adding the guideline for hairpin data buffer size configuration.
> 
> Signed-off-by: Bing Zhao <bingz@mellanox.com>
> ---
> v2: update the range description of hairpin data buffer size
> ---

Acked-by: Ori Kam <orika@mellanox.com>
Thanks,
Ori

>  doc/guides/nics/mlx5.rst               | 16 ++++++++++++++++
>  doc/guides/rel_notes/release_20_05.rst |  1 +
>  2 files changed, 17 insertions(+)
> 
> diff --git a/doc/guides/nics/mlx5.rst b/doc/guides/nics/mlx5.rst
> index 759d0ac..74ab28b 100644
> --- a/doc/guides/nics/mlx5.rst
> +++ b/doc/guides/nics/mlx5.rst
> @@ -99,6 +99,7 @@ Features
>  - Support for multiple rte_flow groups.
>  - Per packet no-inline hint flag to disable packet data copying into Tx
> descriptors.
>  - Hardware LRO.
> +- Hairpin.
> 
>  Limitations
>  -----------
> @@ -786,6 +787,21 @@ Run-time configuration
>    If this parameter is not specified, by default PMD will set
>    the smallest value supported by HW.
> 
> +- ``hp_buf_log_sz`` parameter [int]
> +
> +  The total data buffer size of a hairpin queue (logarithmic form), in bytes.
> +  PMD will set the data buffer size to 2 ** ``hp_buf_log_sz``, both for RX & TX.
> +  The capacity of the value is sepcified by the Firmware, and the initialization
> +  will get a failure if it is out of scope.
> +  The range of the value is from 10 to 19 right now, and the supported frame
> +  size of a single packet for hairpin is from 256B to 128KB. It might change if
> +  different Firmware release is being used. By using a small value, it could
> +  reduce the memory consumption but not work with large frame. If the value
> is
> +  too large, the memory consumption will be high and some potential
> performance
> +  degradation will be introduced.
> +  By default PMD will set this value to 16, which mean that 9KB jumbo frames
> +  will be supported.
> +
>  .. _mlx5_firmware_config:
> 
>  Firmware configuration
> diff --git a/doc/guides/rel_notes/release_20_05.rst
> b/doc/guides/rel_notes/release_20_05.rst
> index bacd4c6..3cb3342 100644
> --- a/doc/guides/rel_notes/release_20_05.rst
> +++ b/doc/guides/rel_notes/release_20_05.rst
> @@ -62,6 +62,7 @@ New Features
> 
>    * Added support for matching on IPv4 Time To Live and IPv6 Hop Limit.
>    * Added support for creating Relaxed Ordering Memory Regions.
> +  * Added support for configuring Haripin queue data buffer size.
>    * Added support for jumbo frame size (9K MTU) in Multi-Packet RQ mode.
>    * Optimized the memory consumption of flow.
> 
> --
> 1.8.3.1
  

Patch

diff --git a/doc/guides/nics/mlx5.rst b/doc/guides/nics/mlx5.rst
index 759d0ac..74ab28b 100644
--- a/doc/guides/nics/mlx5.rst
+++ b/doc/guides/nics/mlx5.rst
@@ -99,6 +99,7 @@  Features
 - Support for multiple rte_flow groups.
 - Per packet no-inline hint flag to disable packet data copying into Tx descriptors.
 - Hardware LRO.
+- Hairpin.
 
 Limitations
 -----------
@@ -786,6 +787,21 @@  Run-time configuration
   If this parameter is not specified, by default PMD will set
   the smallest value supported by HW.
 
+- ``hp_buf_log_sz`` parameter [int]
+
+  The total data buffer size of a hairpin queue (logarithmic form), in bytes.
+  PMD will set the data buffer size to 2 ** ``hp_buf_log_sz``, both for RX & TX.
+  The capacity of the value is sepcified by the Firmware, and the initialization
+  will get a failure if it is out of scope.
+  The range of the value is from 10 to 19 right now, and the supported frame
+  size of a single packet for hairpin is from 256B to 128KB. It might change if
+  different Firmware release is being used. By using a small value, it could
+  reduce the memory consumption but not work with large frame. If the value is
+  too large, the memory consumption will be high and some potential performance
+  degradation will be introduced.
+  By default PMD will set this value to 16, which mean that 9KB jumbo frames
+  will be supported.
+
 .. _mlx5_firmware_config:
 
 Firmware configuration
diff --git a/doc/guides/rel_notes/release_20_05.rst b/doc/guides/rel_notes/release_20_05.rst
index bacd4c6..3cb3342 100644
--- a/doc/guides/rel_notes/release_20_05.rst
+++ b/doc/guides/rel_notes/release_20_05.rst
@@ -62,6 +62,7 @@  New Features
 
   * Added support for matching on IPv4 Time To Live and IPv6 Hop Limit.
   * Added support for creating Relaxed Ordering Memory Regions.
+  * Added support for configuring Haripin queue data buffer size.
   * Added support for jumbo frame size (9K MTU) in Multi-Packet RQ mode.
   * Optimized the memory consumption of flow.