[04/27] event/dlb: add make and meson build infrastructure
diff mbox series

Message ID 1593232671-5690-5-git-send-email-timothy.mcdaniel@intel.com
State Changes Requested
Delegated to: Jerin Jacob
Headers show
Series
  • event/dlb Intel DLB PMD
Related show

Checks

Context Check Description
ci/Intel-compilation fail Compilation issues
ci/checkpatch success coding style OK

Commit Message

McDaniel, Timothy June 27, 2020, 4:37 a.m. UTC
From: "McDaniel, Timothy" <timothy.mcdaniel@intel.com>

Signed-off-by: McDaniel, Timothy <timothy.mcdaniel@intel.com>
---
 config/common_base            |   19 ++++++++++++++++++-
 config/rte_config.h           |    8 +++++++-
 drivers/event/Makefile        |    7 +++++++
 drivers/event/dlb/Makefile    |   27 +++++++++++++++++++++++++++
 drivers/event/dlb/meson.build |    7 +++++++
 drivers/event/meson.build     |    4 ++++
 mk/rte.app.mk                 |    1 +
 7 files changed, 71 insertions(+), 2 deletions(-)
 create mode 100644 drivers/event/dlb/Makefile
 create mode 100644 drivers/event/dlb/meson.build

Patch
diff mbox series

diff --git a/config/common_base b/config/common_base
index c7d5c73..b41c5e6 100644
--- a/config/common_base
+++ b/config/common_base
@@ -741,7 +741,7 @@  CONFIG_RTE_LIBRTE_PMD_ZLIB=n
 CONFIG_RTE_LIBRTE_EVENTDEV=y
 CONFIG_RTE_LIBRTE_EVENTDEV_DEBUG=n
 CONFIG_RTE_EVENT_MAX_DEVS=16
-CONFIG_RTE_EVENT_MAX_QUEUES_PER_DEV=64
+CONFIG_RTE_EVENT_MAX_QUEUES_PER_DEV=255
 CONFIG_RTE_EVENT_TIMER_ADAPTER_NUM_MAX=32
 CONFIG_RTE_EVENT_ETH_INTR_RING_SIZE=1024
 CONFIG_RTE_EVENT_CRYPTO_ADAPTER_MAX_INSTANCE=32
@@ -789,6 +789,23 @@  CONFIG_RTE_LIBRTE_PMD_DPAA_EVENTDEV=n
 CONFIG_RTE_LIBRTE_PMD_DPAA2_EVENTDEV=n
 
 #
+# Compile PMD for dlb event device
+#
+CONFIG_RTE_LIBRTE_PMD_DLB_EVENTDEV=y
+# Specify an upper bound on cycles between each CQ access when hard polling
+CONFIG_RTE_LIBRTE_PMD_DLB_POLL_INTERVAL=1000
+# Specify control state to use when executing UMWAIT instruction.
+# If 0,  then use CO.2, which has a slower wakeup time, but greater
+# power savings.
+# If 1, then use C0.1, which has a faster wakeup time, but smaller
+# power savings.
+CONFIG_RTE_LIBRTE_PMD_DLB_UMWAIT_CTL_STATE=0
+# Suppress statistics calculation
+CONFIG_RTE_LIBRTE_PMD_DLB_QUELL_STATS=n
+# Specify software credit quanta
+CONFIG_RTE_LIBRTE_PMD_DLB_SW_CREDIT_QUANTA=32
+
+#
 # Compile raw device support
 # EXPERIMENTAL: API may change without prior notice
 #
diff --git a/config/rte_config.h b/config/rte_config.h
index e9201fd..8c13ee9 100644
--- a/config/rte_config.h
+++ b/config/rte_config.h
@@ -72,7 +72,7 @@ 
 
 /* eventdev defines */
 #define RTE_EVENT_MAX_DEVS 16
-#define RTE_EVENT_MAX_QUEUES_PER_DEV 64
+#define RTE_EVENT_MAX_QUEUES_PER_DEV 255
 #define RTE_EVENT_TIMER_ADAPTER_NUM_MAX 32
 #define RTE_EVENT_ETH_INTR_RING_SIZE 1024
 #define RTE_EVENT_CRYPTO_ADAPTER_MAX_INSTANCE 32
@@ -133,4 +133,10 @@ 
 /* QEDE PMD defines */
 #define RTE_LIBRTE_QEDE_FW ""
 
+/* DLB PMD defines */
+#define RTE_LIBRTE_PMD_DLB_POLL_INTERVAL 1000
+#define RTE_LIBRTE_PMD_DLB_UMWAIT_CTL_STATE  0
+#undef RTE_LIBRTE_PMD_DLB_QUELL_STATS
+#define RTE_LIBRTE_PMD_DLB_SW_CREDIT_QUANTA 32
+
 #endif /* _RTE_CONFIG_H_ */
diff --git a/drivers/event/Makefile b/drivers/event/Makefile
index 86be41b..3bde8f0 100644
--- a/drivers/event/Makefile
+++ b/drivers/event/Makefile
@@ -16,5 +16,12 @@  ifeq ($(CONFIG_RTE_EAL_VFIO)$(CONFIG_RTE_LIBRTE_FSLMC_BUS),yy)
 DIRS-$(CONFIG_RTE_LIBRTE_PMD_DPAA2_EVENTDEV) += dpaa2
 endif
 DIRS-$(CONFIG_RTE_LIBRTE_PMD_OPDL_EVENTDEV) += opdl
+# DLB limited to linux x86 architectures
+ifneq ($(filter y,$(CONFIG_RTE_ARCH_X86_64) \
+		  $(CONFIG_RTE_ARCH_X86)),)
+ifeq ($(CONFIG_RTE_EXEC_ENV_LINUX),y)
+DIRS-$(CONFIG_RTE_LIBRTE_PMD_DLB_EVENTDEV) += dlb
+endif
+endif
 
 include $(RTE_SDK)/mk/rte.subdir.mk
diff --git a/drivers/event/dlb/Makefile b/drivers/event/dlb/Makefile
new file mode 100644
index 0000000..f191762
--- /dev/null
+++ b/drivers/event/dlb/Makefile
@@ -0,0 +1,27 @@ 
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2016-2020 Intel Corporation.
+
+include $(RTE_SDK)/mk/rte.vars.mk
+
+# library name
+LIB = librte_pmd_dlb_eventdev.a
+
+# build flags
+CFLAGS += -O3 -pthread
+CFLAGS += $(WERROR_FLAGS)
+# rte_mp_ APIs are still marked experimental
+LDLIBS += -lrte_eal -lrte_eventdev -lrte_mbuf -lrte_kvargs -lrte_ring
+LDLIBS += -lrte_mempool -lpthread -lrte_pci -lrte_bus_pci
+
+# library version
+LIBABIVER := 1
+
+# versioning export map
+EXPORT_MAP := rte_pmd_dlb_event_version.map
+
+# library source files
+SRCS-$(CONFIG_RTE_LIBRTE_PMD_DLB_EVENTDEV) += pf/base/dlb_resource.c
+
+# export include files
+
+include $(RTE_SDK)/mk/rte.lib.mk
diff --git a/drivers/event/dlb/meson.build b/drivers/event/dlb/meson.build
new file mode 100644
index 0000000..4fae0eb
--- /dev/null
+++ b/drivers/event/dlb/meson.build
@@ -0,0 +1,7 @@ 
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2019-2020 Intel Corporation
+
+sources = files('pf/base/dlb_resource.c'
+)
+
+deps += ['mbuf', 'mempool', 'ring', 'pci', 'bus_pci']
diff --git a/drivers/event/meson.build b/drivers/event/meson.build
index 50d30c5..58ff011 100644
--- a/drivers/event/meson.build
+++ b/drivers/event/meson.build
@@ -6,6 +6,10 @@  if not (toolchain == 'gcc' and cc.version().version_compare('<4.8.6') and
 	dpdk_conf.has('RTE_ARCH_ARM64'))
 	drivers += 'octeontx'
 endif
+if ((dpdk_conf.has('RTE_ARCH_X86_64') or dpdk_conf.has('RTE_ARCH_X86')) and
+	is_linux)
+	drivers += 'dlb'
+endif
 std_deps = ['eventdev', 'kvargs']
 config_flag_fmt = 'RTE_LIBRTE_@0@_EVENTDEV_PMD'
 driver_name_fmt = 'rte_pmd_@0@_event'
diff --git a/mk/rte.app.mk b/mk/rte.app.mk
index 0ce8cf5..8b8076e 100644
--- a/mk/rte.app.mk
+++ b/mk/rte.app.mk
@@ -325,6 +325,7 @@  endif # CONFIG_RTE_LIBRTE_COMPRESSDEV
 ifeq ($(CONFIG_RTE_LIBRTE_EVENTDEV),y)
 _LDLIBS-$(CONFIG_RTE_LIBRTE_PMD_SKELETON_EVENTDEV) += -lrte_pmd_skeleton_event
 _LDLIBS-$(CONFIG_RTE_LIBRTE_PMD_SW_EVENTDEV) += -lrte_pmd_sw_event
+_LDLIBS-$(CONFIG_RTE_LIBRTE_PMD_DLB_EVENTDEV) += -lrte_pmd_dlb_eventdev
 _LDLIBS-$(CONFIG_RTE_LIBRTE_PMD_DSW_EVENTDEV) += -lrte_pmd_dsw_event
 _LDLIBS-$(CONFIG_RTE_LIBRTE_PMD_OCTEONTX_SSOVF) += -lrte_pmd_octeontx_ssovf
 ifeq ($(CONFIG_RTE_LIBRTE_DPAA_BUS),y)