diff mbox series

[v6,1/8] eal/x86: introduce AVX 512-bit type

Message ID 869034e585604e3cc2f1131219478e634a1d3f64.1594638050.git.vladimir.medvedkin@intel.com (mailing list archive)
State Superseded, archived
Delegated to: Thomas Monjalon
Headers
Series fib: implement AVX512 vector lookup |

Checks

Context Check Description
ci/checkpatch success coding style OK
ci/Performance-Testing fail build patch failure
ci/Intel-compilation success Compilation OK
ci/iol-broadcom-Performance success Performance Testing PASS
ci/iol-intel-Performance success Performance Testing PASS
ci/iol-testing success Testing PASS

Commit Message

Vladimir Medvedkin July 13, 2020, 11:11 a.m. UTC 
  New data type to manipulate 512 bit AVX values.

Signed-off-by: Vladimir Medvedkin <vladimir.medvedkin@intel.com>
Acked-by: Konstantin Ananyev <konstantin.ananyev@intel.com>
---
 lib/librte_eal/x86/include/rte_vect.h | 19 +++++++++++++++++++
 1 file changed, 19 insertions(+)

Comments

David Marchand July 13, 2020, 11:33 a.m. UTC | #1 
On Mon, Jul 13, 2020 at 1:11 PM Vladimir Medvedkin
<vladimir.medvedkin@intel.com> wrote:
>
> New data type to manipulate 512 bit AVX values.
>
> Signed-off-by: Vladimir Medvedkin <vladimir.medvedkin@intel.com>
> Acked-by: Konstantin Ananyev <konstantin.ananyev@intel.com>
> ---
>  lib/librte_eal/x86/include/rte_vect.h | 19 +++++++++++++++++++
>  1 file changed, 19 insertions(+)
>
> diff --git a/lib/librte_eal/x86/include/rte_vect.h b/lib/librte_eal/x86/include/rte_vect.h
> index df5a60762..30dcfd5e7 100644
> --- a/lib/librte_eal/x86/include/rte_vect.h
> +++ b/lib/librte_eal/x86/include/rte_vect.h
> @@ -13,6 +13,7 @@
>
>  #include <stdint.h>
>  #include <rte_config.h>
> +#include <rte_common.h>
>  #include "generic/rte_vect.h"
>
>  #if (defined(__ICC) || \
> @@ -90,6 +91,24 @@ __extension__ ({                 \
>  })
>  #endif /* (defined(__ICC) && __ICC < 1210) */
>
> +#ifdef __AVX512F__
> +
> +#define RTE_X86_ZMM_SIZE       (sizeof(__m512i))
> +#define RTE_X86_ZMM_MASK       (ZMM_SIZE - 1)

Please fix:
#define RTE_X86_ZMM_MASK       (RTE_X86_ZMM_SIZE - 1)


> +
> +typedef union __rte_x86_zmm {
> +       __m512i  z;
> +       ymm_t    y[RTE_X86_ZMM_SIZE / sizeof(ymm_t)];
> +       xmm_t    x[RTE_X86_ZMM_SIZE / sizeof(xmm_t)];
> +       uint8_t  u8[RTE_X86_ZMM_SIZE / sizeof(uint8_t)];
> +       uint16_t u16[RTE_X86_ZMM_SIZE / sizeof(uint16_t)];
> +       uint32_t u32[RTE_X86_ZMM_SIZE / sizeof(uint32_t)];
> +       uint64_t u64[RTE_X86_ZMM_SIZE / sizeof(uint64_t)];
> +       double   pd[RTE_X86_ZMM_SIZE / sizeof(double)];
> +} __rte_aligned(RTE_X86_ZMM_SIZE) __rte_x86_zmm_t;
> +
> +#endif /* __AVX512F__ */
> +
>  #ifdef __cplusplus
>  }
>  #endif
> --
> 2.17.1
>
Vladimir Medvedkin July 13, 2020, 11:44 a.m. UTC | #2 
On 13/07/2020 12:33, David Marchand wrote:
> On Mon, Jul 13, 2020 at 1:11 PM Vladimir Medvedkin
> <vladimir.medvedkin@intel.com> wrote:
>>
>> New data type to manipulate 512 bit AVX values.
>>
>> Signed-off-by: Vladimir Medvedkin <vladimir.medvedkin@intel.com>
>> Acked-by: Konstantin Ananyev <konstantin.ananyev@intel.com>
>> ---
>>   lib/librte_eal/x86/include/rte_vect.h | 19 +++++++++++++++++++
>>   1 file changed, 19 insertions(+)
>>
>> diff --git a/lib/librte_eal/x86/include/rte_vect.h b/lib/librte_eal/x86/include/rte_vect.h
>> index df5a60762..30dcfd5e7 100644
>> --- a/lib/librte_eal/x86/include/rte_vect.h
>> +++ b/lib/librte_eal/x86/include/rte_vect.h
>> @@ -13,6 +13,7 @@
>>
>>   #include <stdint.h>
>>   #include <rte_config.h>
>> +#include <rte_common.h>
>>   #include "generic/rte_vect.h"
>>
>>   #if (defined(__ICC) || \
>> @@ -90,6 +91,24 @@ __extension__ ({                 \
>>   })
>>   #endif /* (defined(__ICC) && __ICC < 1210) */
>>
>> +#ifdef __AVX512F__
>> +
>> +#define RTE_X86_ZMM_SIZE       (sizeof(__m512i))
>> +#define RTE_X86_ZMM_MASK       (ZMM_SIZE - 1)
> 
> Please fix:
> #define RTE_X86_ZMM_MASK       (RTE_X86_ZMM_SIZE - 1)
> 

Oh, thanks!

> 
>> +
>> +typedef union __rte_x86_zmm {
>> +       __m512i  z;
>> +       ymm_t    y[RTE_X86_ZMM_SIZE / sizeof(ymm_t)];
>> +       xmm_t    x[RTE_X86_ZMM_SIZE / sizeof(xmm_t)];
>> +       uint8_t  u8[RTE_X86_ZMM_SIZE / sizeof(uint8_t)];
>> +       uint16_t u16[RTE_X86_ZMM_SIZE / sizeof(uint16_t)];
>> +       uint32_t u32[RTE_X86_ZMM_SIZE / sizeof(uint32_t)];
>> +       uint64_t u64[RTE_X86_ZMM_SIZE / sizeof(uint64_t)];
>> +       double   pd[RTE_X86_ZMM_SIZE / sizeof(double)];
>> +} __rte_aligned(RTE_X86_ZMM_SIZE) __rte_x86_zmm_t;
>> +
>> +#endif /* __AVX512F__ */
>> +
>>   #ifdef __cplusplus
>>   }
>>   #endif
>> --
>> 2.17.1
>>
>
diff mbox series

Patch

diff --git a/lib/librte_eal/x86/include/rte_vect.h b/lib/librte_eal/x86/include/rte_vect.h
index df5a60762..30dcfd5e7 100644
--- a/lib/librte_eal/x86/include/rte_vect.h
+++ b/lib/librte_eal/x86/include/rte_vect.h
@@ -13,6 +13,7 @@ 
 
 #include <stdint.h>
 #include <rte_config.h>
+#include <rte_common.h>
 #include "generic/rte_vect.h"
 
 #if (defined(__ICC) || \
@@ -90,6 +91,24 @@  __extension__ ({                 \
 })
 #endif /* (defined(__ICC) && __ICC < 1210) */
 
+#ifdef __AVX512F__
+
+#define RTE_X86_ZMM_SIZE	(sizeof(__m512i))
+#define RTE_X86_ZMM_MASK	(ZMM_SIZE - 1)
+
+typedef union __rte_x86_zmm {
+	__m512i	 z;
+	ymm_t    y[RTE_X86_ZMM_SIZE / sizeof(ymm_t)];
+	xmm_t    x[RTE_X86_ZMM_SIZE / sizeof(xmm_t)];
+	uint8_t  u8[RTE_X86_ZMM_SIZE / sizeof(uint8_t)];
+	uint16_t u16[RTE_X86_ZMM_SIZE / sizeof(uint16_t)];
+	uint32_t u32[RTE_X86_ZMM_SIZE / sizeof(uint32_t)];
+	uint64_t u64[RTE_X86_ZMM_SIZE / sizeof(uint64_t)];
+	double   pd[RTE_X86_ZMM_SIZE / sizeof(double)];
+} __rte_aligned(RTE_X86_ZMM_SIZE) __rte_x86_zmm_t;
+
+#endif /* __AVX512F__ */
+
 #ifdef __cplusplus
 }
 #endif