From patchwork Fri Jul 17 12:08:29 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Wei Hu (Xavier)" X-Patchwork-Id: 74356 X-Patchwork-Delegate: david.marchand@redhat.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id BCC0CA053B; Fri, 17 Jul 2020 14:10:32 +0200 (CEST) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 6A2E31C0B1; Fri, 17 Jul 2020 14:10:31 +0200 (CEST) Received: from huawei.com (szxga04-in.huawei.com [45.249.212.190]) by dpdk.org (Postfix) with ESMTP id 9A7BC1C0B0 for ; Fri, 17 Jul 2020 14:10:29 +0200 (CEST) Received: from DGGEMS408-HUB.china.huawei.com (unknown [172.30.72.58]) by Forcepoint Email with ESMTP id 124EFA2197C9FE5EC8A7 for ; Fri, 17 Jul 2020 20:10:26 +0800 (CST) Received: from localhost.localdomain (10.69.192.56) by DGGEMS408-HUB.china.huawei.com (10.3.19.208) with Microsoft SMTP Server id 14.3.487.0; Fri, 17 Jul 2020 20:10:16 +0800 From: "Wei Hu (Xavier)" To: CC: Date: Fri, 17 Jul 2020 20:08:29 +0800 Message-ID: <1594987709-11768-1-git-send-email-xavier.huwei@huawei.com> X-Mailer: git-send-email 2.7.4 MIME-Version: 1.0 X-Originating-IP: [10.69.192.56] X-CFilter-Loop: Reflected Subject: [dpdk-dev] [PATCH] lib/librte_eal: support SVE flag on ARM64 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" From: Chengwen Feng SVE is the next-generation SIMD extension of the ARMv8-A AArch64 instruction set. The related marco definition can be found in linux kernel: arch/arm64/include/uapi/asm/hwcap.h This patch supports getting cpu SVE feature on ARM64 platform. Signed-off-by: Chengwen Feng Signed-off-by: Wei Hu (Xavier) --- lib/librte_eal/arm/include/rte_cpuflags_64.h | 1 + lib/librte_eal/arm/rte_cpuflags.c | 1 + 2 files changed, 2 insertions(+) diff --git a/lib/librte_eal/arm/include/rte_cpuflags_64.h b/lib/librte_eal/arm/include/rte_cpuflags_64.h index 95cc014..069844d 100644 --- a/lib/librte_eal/arm/include/rte_cpuflags_64.h +++ b/lib/librte_eal/arm/include/rte_cpuflags_64.h @@ -22,6 +22,7 @@ enum rte_cpu_flag_t { RTE_CPUFLAG_SHA2, RTE_CPUFLAG_CRC32, RTE_CPUFLAG_ATOMICS, + RTE_CPUFLAG_SVE, RTE_CPUFLAG_AARCH64, /* The last item */ RTE_CPUFLAG_NUMFLAGS,/**< This should always be the last! */ diff --git a/lib/librte_eal/arm/rte_cpuflags.c b/lib/librte_eal/arm/rte_cpuflags.c index caf3dc8..b1e220b 100644 --- a/lib/librte_eal/arm/rte_cpuflags.c +++ b/lib/librte_eal/arm/rte_cpuflags.c @@ -95,6 +95,7 @@ const struct feature_entry rte_cpu_feature_table[] = { FEAT_DEF(SHA2, REG_HWCAP, 6) FEAT_DEF(CRC32, REG_HWCAP, 7) FEAT_DEF(ATOMICS, REG_HWCAP, 8) + FEAT_DEF(SVE, REG_HWCAP, 22) FEAT_DEF(AARCH64, REG_PLATFORM, 1) }; #endif /* RTE_ARCH */