[v4,2/2] net/i40e: fix fdir allocating msix resource error

Message ID 20200723161152.7791-1-maox.jiang@intel.com (mailing list archive)
State Accepted, archived
Delegated to: Qi Zhang
Headers
Series None |

Checks

Context Check Description
ci/checkpatch success coding style OK
ci/iol-intel-Performance success Performance Testing PASS
ci/iol-mellanox-Performance success Performance Testing PASS
ci/iol-testing success Testing PASS

Commit Message

Jiang Mao July 23, 2020, 4:11 p.m. UTC
  Fdir allocating msix resource is not strictly necessary, if no
resource left, jump the error.

Fixes: 4861cde461 (i40e: new poll mode driver)
Cc: stable@dpdk.org

Signed-off-by: Jiang Mao <maox.jiang@intel.com>
---
V3: Move type I40E_VSI_FDIR branch into !I40E_VSI_SRIOV branch.
V4: Rebase this patch.
---
 drivers/net/i40e/i40e_ethdev.c | 10 +++++++---
 1 file changed, 7 insertions(+), 3 deletions(-)
  

Comments

Qi Zhang July 23, 2020, 12:40 p.m. UTC | #1
> -----Original Message-----
> From: Jiang, MaoX <maox.jiang@intel.com>
> Sent: Friday, July 24, 2020 12:12 AM
> To: Zhang, Qi Z <qi.z.zhang@intel.com>
> Cc: dev@dpdk.org; stable@dpdk.org; Jiang, MaoX <maox.jiang@intel.com>
> Subject: [PATCH v4 2/2] net/i40e: fix fdir allocating msix resource error
> 
> Fdir allocating msix resource is not strictly necessary, if no resource left, jump
> the error.
> 
> Fixes: 4861cde461 (i40e: new poll mode driver)
> Cc: stable@dpdk.org
> 
> Signed-off-by: Jiang Mao <maox.jiang@intel.com>

Acked-by: Qi Zhang <qi.z.zhang@intel.com>

Applied to dpdk-next-net-intel.

Thanks
Qi
  

Patch

diff --git a/drivers/net/i40e/i40e_ethdev.c b/drivers/net/i40e/i40e_ethdev.c
index 0c32e451c5..f9a8e7132f 100644
--- a/drivers/net/i40e/i40e_ethdev.c
+++ b/drivers/net/i40e/i40e_ethdev.c
@@ -5839,10 +5839,14 @@  i40e_vsi_setup(struct i40e_pf *pf,
 		ret = i40e_res_pool_alloc(&pf->msix_pool, 1);
 		if (ret < 0) {
 			PMD_DRV_LOG(ERR, "VSI %d get heap failed %d", vsi->seid, ret);
-			goto fail_queue_alloc;
+			if (type != I40E_VSI_FDIR)
+				goto fail_queue_alloc;
+			vsi->msix_intr = 0;
+			vsi->nb_msix = 0;
+		} else {
+			vsi->msix_intr = ret;
+			vsi->nb_msix = 1;
 		}
-		vsi->msix_intr = ret;
-		vsi->nb_msix = 1;
 	} else {
 		vsi->msix_intr = 0;
 		vsi->nb_msix = 0;