From patchwork Fri Jul 24 05:32:15 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ajit Khaparde X-Patchwork-Id: 74712 X-Patchwork-Delegate: ajit.khaparde@broadcom.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id 6B11CA0518; Fri, 24 Jul 2020 07:33:10 +0200 (CEST) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 382431C044; Fri, 24 Jul 2020 07:33:00 +0200 (CEST) Received: from mail-vs1-f99.google.com (mail-vs1-f99.google.com [209.85.217.99]) by dpdk.org (Postfix) with ESMTP id BBF2D1C031 for ; Fri, 24 Jul 2020 07:32:54 +0200 (CEST) Received: by mail-vs1-f99.google.com with SMTP id a17so4293972vsq.6 for ; Thu, 23 Jul 2020 22:32:54 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=broadcom.com; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=DB1zM/DUz/JVi/Rl5HNYRF3CCoXN/COO8qWhyE8K2/4=; b=MFu8QprjmUWNvGo6+s2YTn9OmwkqREVAt3oEoAKhmOzqPF+yP8IRGqKsp4flWEr57W KJebmpP4WEvF0JsmMu/DH/pG1S8jl+73BMF4BdEQJhfkdslhZOORt00DyENZeL8nnpH1 sHk9zhOdyy8GWkqR9wn/fdkzOXzdQcj9yZshg= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=DB1zM/DUz/JVi/Rl5HNYRF3CCoXN/COO8qWhyE8K2/4=; b=JOHi0bqDomUGeX2/IX3jm9m09u169Z/oHMhV2t1NJHdGNy4aHmIWdmSxyH8dW4c8x2 dhpgJ9tBAPWOQCgYlhxwFF75aC3RM44d7nYw0maIn01DSA7kbKs2FuFtQ/x4EuN9jIOa 6sJiJwOkYRFSy4CyGYIZlvb8JoSJ2nX9X+uoVA79oi8rjXnn2d/00GTrAKLyfA95ik7d s6+d9j9nt1QkaLG0qNdGocDEDaAbMHw5ShWhVgJwRNlT4H0pKzgQGaM5jMBPw25KeOUN /G9aO9co2WKXsDbhMA2hfZ3ajsNRFrG9hCUqBwWCDtIClFzstWGzdWtVeP0iBZXqlKUQ ooIA== X-Gm-Message-State: AOAM5332MH3LHSNumaxPRo9bKmKxGLD4lONyZRVjbmYzrNM1hGdZ0Q0m tix9RICg1FHKEZcSTVE4/9tICyd4vpoIW4TfqNXvSletFLEDF8rJiheKWckEc82lVi6WyWV8DW1 QTVFCBTKnfcRw2Z4a4bRmOgD02cDa+v7hophVkWa8Hn2z++q0mV7DaSOY/9pho1yaUDoMihgwHf sVJA== X-Google-Smtp-Source: ABdhPJyiwC7RE0Wwqz6AhE9ay7GopVlliooGIsYOm3Q2PeMMJIa8HeLUUFGgG8h3ew42/KlzVwWTSO16Eoes X-Received: by 2002:a67:5cc6:: with SMTP id q189mr6640799vsb.3.1595568773730; Thu, 23 Jul 2020 22:32:53 -0700 (PDT) Received: from localhost.localdomain ([192.19.223.252]) by smtp-relay.gmail.com with ESMTPS id h17sm592840vsk.0.2020.07.23.22.32.50 (version=TLS1_2 cipher=ECDHE-ECDSA-AES128-GCM-SHA256 bits=128/128); Thu, 23 Jul 2020 22:32:53 -0700 (PDT) X-Relaying-Domain: broadcom.com From: Ajit Khaparde To: dev@dpdk.org Cc: ferruh.yigit@intel.com, Kishore Padmanabha , Michael Baucom Date: Thu, 23 Jul 2020 22:32:15 -0700 Message-Id: <20200724053235.71069-3-ajit.khaparde@broadcom.com> X-Mailer: git-send-email 2.21.1 (Apple Git-122.3) In-Reply-To: <20200724053235.71069-1-ajit.khaparde@broadcom.com> References: <20200723115639.22357-1-somnath.kotur@broadcom.com> <20200724053235.71069-1-ajit.khaparde@broadcom.com> MIME-Version: 1.0 Subject: [dpdk-dev] [PATCH v3 02/22] net/bnxt: add access to nat global register X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" From: Kishore Padmanabha Add support to enable or disable the NAT global registers. The NAT feature is enabled in hardware during initialization and disabled at deinitialization of the application. Signed-off-by: Kishore Padmanabha Reviewed-by: Michael Baucom Reviewed-by: Ajit Khaparde --- drivers/net/bnxt/tf_ulp/bnxt_ulp.c | 83 ++++++++++++++++++++++++++++++ drivers/net/bnxt/tf_ulp/bnxt_ulp.h | 4 ++ 2 files changed, 87 insertions(+) diff --git a/drivers/net/bnxt/tf_ulp/bnxt_ulp.c b/drivers/net/bnxt/tf_ulp/bnxt_ulp.c index 0869231a0..7c65a4b1b 100644 --- a/drivers/net/bnxt/tf_ulp/bnxt_ulp.c +++ b/drivers/net/bnxt/tf_ulp/bnxt_ulp.c @@ -596,6 +596,52 @@ ulp_session_deinit(struct bnxt_ulp_session_state *session) } } +/* + * Internal api to enable NAT feature. + * Set set_flag to 1 to set the value or zero to reset the value. + * returns 0 on success. + */ +static int32_t +bnxt_ulp_global_cfg_update(struct bnxt *bp, + enum tf_dir dir, + enum tf_global_config_type type, + uint32_t offset, + uint32_t value, + uint32_t set_flag) +{ + uint32_t global_cfg = 0; + int rc; + struct tf_global_cfg_parms parms; + + /* Initialize the params */ + parms.dir = dir, + parms.type = type, + parms.offset = offset, + parms.config = (uint8_t *)&global_cfg, + parms.config_sz_in_bytes = sizeof(global_cfg); + + rc = tf_get_global_cfg(&bp->tfp, &parms); + if (rc) { + BNXT_TF_DBG(ERR, "Failed to get global cfg 0x%x rc:%d\n", + type, rc); + return rc; + } + + if (set_flag) + global_cfg |= value; + else + global_cfg &= ~value; + + /* SET the register RE_CFA_REG_ACT_TECT */ + rc = tf_set_global_cfg(&bp->tfp, &parms); + if (rc) { + BNXT_TF_DBG(ERR, "Failed to set global cfg 0x%x rc:%d\n", + type, rc); + return rc; + } + return rc; +} + /* * When a port is initialized by dpdk. This functions is called * and this function initializes the ULP context and rest of the @@ -732,6 +778,29 @@ bnxt_ulp_init(struct bnxt *bp) goto jump_to_error; } + /* + * Enable NAT feature. Set the global configuration register + * Tunnel encap to enable NAT with the reuse of existing inner + * L2 header smac and dmac + */ + rc = bnxt_ulp_global_cfg_update(bp, TF_DIR_RX, TF_TUNNEL_ENCAP, + TF_TUNNEL_ENCAP_NAT, + (BNXT_ULP_NAT_INNER_L2_HEADER_SMAC | + BNXT_ULP_NAT_INNER_L2_HEADER_DMAC), 1); + if (rc) { + BNXT_TF_DBG(ERR, "Failed to set rx global configuration\n"); + goto jump_to_error; + } + + rc = bnxt_ulp_global_cfg_update(bp, TF_DIR_TX, TF_TUNNEL_ENCAP, + TF_TUNNEL_ENCAP_NAT, + (BNXT_ULP_NAT_INNER_L2_HEADER_SMAC | + BNXT_ULP_NAT_INNER_L2_HEADER_DMAC), 1); + if (rc) { + BNXT_TF_DBG(ERR, "Failed to set tx global configuration\n"); + goto jump_to_error; + } + return rc; jump_to_error: @@ -785,6 +854,19 @@ bnxt_ulp_deinit(struct bnxt *bp) /* Delete the Port database */ ulp_port_db_deinit(bp->ulp_ctx); + /* Disable NAT feature */ + (void)bnxt_ulp_global_cfg_update(bp, TF_DIR_RX, TF_TUNNEL_ENCAP, + TF_TUNNEL_ENCAP_NAT, + (BNXT_ULP_NAT_INNER_L2_HEADER_SMAC | + BNXT_ULP_NAT_INNER_L2_HEADER_DMAC), + 0); + + (void)bnxt_ulp_global_cfg_update(bp, TF_DIR_TX, TF_TUNNEL_ENCAP, + TF_TUNNEL_ENCAP_NAT, + (BNXT_ULP_NAT_INNER_L2_HEADER_SMAC | + BNXT_ULP_NAT_INNER_L2_HEADER_DMAC), + 0); + /* Delete the ulp context and tf session */ ulp_ctx_detach(bp, session); @@ -942,6 +1024,7 @@ bnxt_ulp_eth_dev_ptr2_cntxt_get(struct rte_eth_dev *dev) if (BNXT_ETH_DEV_IS_REPRESENTOR(dev)) { struct bnxt_vf_representor *vfr = dev->data->dev_private; + bp = vfr->parent_dev->data->dev_private; } diff --git a/drivers/net/bnxt/tf_ulp/bnxt_ulp.h b/drivers/net/bnxt/tf_ulp/bnxt_ulp.h index f9e5e2ba6..7c95ead55 100644 --- a/drivers/net/bnxt/tf_ulp/bnxt_ulp.h +++ b/drivers/net/bnxt/tf_ulp/bnxt_ulp.h @@ -14,6 +14,10 @@ #include "ulp_template_db_enum.h" +/* NAT defines to reuse existing inner L2 SMAC and DMAC */ +#define BNXT_ULP_NAT_INNER_L2_HEADER_SMAC 0x2000 +#define BNXT_ULP_NAT_INNER_L2_HEADER_DMAC 0x100 + /* defines for the ulp_flags */ #define BNXT_ULP_VF_REP_ENABLED 0x1 #define ULP_VF_REP_IS_ENABLED(flag) ((flag) & BNXT_ULP_VF_REP_ENABLED)