From patchwork Fri Aug 7 15:58:49 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Power, Ciara" X-Patchwork-Id: 75299 X-Patchwork-Delegate: david.marchand@redhat.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id B1156A04B0; Fri, 7 Aug 2020 18:06:50 +0200 (CEST) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 53B0B1C0AD; Fri, 7 Aug 2020 18:06:32 +0200 (CEST) Received: from mga01.intel.com (mga01.intel.com [192.55.52.88]) by dpdk.org (Postfix) with ESMTP id 8AB722C39 for ; Fri, 7 Aug 2020 18:06:29 +0200 (CEST) IronPort-SDR: lq4cy9zZviMkJmb0LkEcTR76L7e9pO+95/OSTYg/+zuaRnfIeLcMZS+xwT9Ss1beTmc/2TseZp ecbRfyPU5EuQ== X-IronPort-AV: E=McAfee;i="6000,8403,9705"; a="171183022" X-IronPort-AV: E=Sophos;i="5.75,446,1589266800"; d="scan'208";a="171183022" X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga007.fm.intel.com ([10.253.24.52]) by fmsmga101.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 07 Aug 2020 09:06:29 -0700 IronPort-SDR: mK0lEBhamH/tuBv/vf8jMXLN4hyvSt/AgFCyEiZjrO0pLPQDCpOUIq8aYnGiG55b3zcxJz9+ya 8d9te3IpkHLg== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.75,446,1589266800"; d="scan'208";a="275407882" Received: from silpixa00399953.ir.intel.com (HELO silpixa00399953.ger.corp.intel.com) ([10.237.222.53]) by fmsmga007.fm.intel.com with ESMTP; 07 Aug 2020 09:06:27 -0700 From: Ciara Power To: dev@dpdk.org Cc: bruce.richardson@intel.com, Ciara Power , Ruifeng Wang , Jerin Jacob , Honnappa Nagarahalli , David Christensen Date: Fri, 7 Aug 2020 16:58:49 +0100 Message-Id: <20200807155859.63888-3-ciara.power@intel.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20200807155859.63888-1-ciara.power@intel.com> References: <20200807155859.63888-1-ciara.power@intel.com> Subject: [dpdk-dev] [PATCH 20.11 02/12] eal: add default SIMD bitwidth values X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" Each arch has a define for the default SIMD bitwidth value, this is used on EAL init to set the config max SIMD bitwidth. Cc: Ruifeng Wang Cc: Jerin Jacob Cc: Honnappa Nagarahalli Cc: David Christensen Signed-off-by: Ciara Power --- lib/librte_eal/arm/include/rte_vect.h | 2 ++ lib/librte_eal/common/eal_common_options.c | 3 +++ lib/librte_eal/include/generic/rte_vect.h | 2 ++ lib/librte_eal/ppc/include/rte_vect.h | 2 ++ lib/librte_eal/x86/include/rte_vect.h | 2 ++ 5 files changed, 11 insertions(+) diff --git a/lib/librte_eal/arm/include/rte_vect.h b/lib/librte_eal/arm/include/rte_vect.h index 01c51712a1..7487a53862 100644 --- a/lib/librte_eal/arm/include/rte_vect.h +++ b/lib/librte_eal/arm/include/rte_vect.h @@ -14,6 +14,8 @@ extern "C" { #endif +#define RTE_DEFAULT_SIMD_BITWIDTH 256 + typedef int32x4_t xmm_t; #define XMM_SIZE (sizeof(xmm_t)) diff --git a/lib/librte_eal/common/eal_common_options.c b/lib/librte_eal/common/eal_common_options.c index 90f4e8f5c3..c2a9624f89 100644 --- a/lib/librte_eal/common/eal_common_options.c +++ b/lib/librte_eal/common/eal_common_options.c @@ -35,6 +35,7 @@ #ifndef RTE_EXEC_ENV_WINDOWS #include #endif +#include #include "eal_internal_cfg.h" #include "eal_options.h" @@ -344,6 +345,8 @@ eal_reset_internal_config(struct internal_config *internal_cfg) internal_cfg->user_mbuf_pool_ops_name = NULL; CPU_ZERO(&internal_cfg->ctrl_cpuset); internal_cfg->init_complete = 0; + internal_cfg->max_simd_bitwidth.bitwidth = RTE_DEFAULT_SIMD_BITWIDTH; + internal_cfg->max_simd_bitwidth.locked = 0; } static int diff --git a/lib/librte_eal/include/generic/rte_vect.h b/lib/librte_eal/include/generic/rte_vect.h index 3fc47979f8..e98f184a97 100644 --- a/lib/librte_eal/include/generic/rte_vect.h +++ b/lib/librte_eal/include/generic/rte_vect.h @@ -14,6 +14,8 @@ #include +#define RTE_DEFAULT_SIMD_BITWIDTH 256 + /* Unsigned vector types */ /** diff --git a/lib/librte_eal/ppc/include/rte_vect.h b/lib/librte_eal/ppc/include/rte_vect.h index b0545c878c..70fbd0c423 100644 --- a/lib/librte_eal/ppc/include/rte_vect.h +++ b/lib/librte_eal/ppc/include/rte_vect.h @@ -15,6 +15,8 @@ extern "C" { #endif +#define RTE_DEFAULT_SIMD_BITWIDTH 256 + typedef vector signed int xmm_t; #define XMM_SIZE (sizeof(xmm_t)) diff --git a/lib/librte_eal/x86/include/rte_vect.h b/lib/librte_eal/x86/include/rte_vect.h index df5a607623..b1df75aca7 100644 --- a/lib/librte_eal/x86/include/rte_vect.h +++ b/lib/librte_eal/x86/include/rte_vect.h @@ -35,6 +35,8 @@ extern "C" { #endif +#define RTE_DEFAULT_SIMD_BITWIDTH 256 + typedef __m128i xmm_t; #define XMM_SIZE (sizeof(xmm_t))