[v1,2/2] event/octeontx2: configure crypto adapter xaq pool
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Commit Message
Configure xaq pool based on number of in-use crypto queues to avoid CPT
add work failure due to xaq buffer run out. This patch configures
OTX2_CPT_DEFAULT_CMD_QLEN number of xae entries per queue pair.
Fixes: 29768f78d5a7 ("event/octeontx2: add crypto adapter framework")
Signed-off-by: Shijith Thotton <sthotton@marvell.com>
---
drivers/event/octeontx2/otx2_evdev_adptr.c | 2 +-
drivers/event/octeontx2/otx2_evdev_crypto_adptr.c | 8 ++++++++
2 files changed, 9 insertions(+), 1 deletion(-)
Comments
>-----Original Message-----
>From: Shijith Thotton <sthotton@marvell.com>
>Sent: Friday, April 16, 2021 12:40 AM
>To: dev@dpdk.org
>Cc: Shijith Thotton <sthotton@marvell.com>; Jerin Jacob Kollanukkaran
><jerinj@marvell.com>; Akhil Goyal <gakhil@marvell.com>; Anoob
>Joseph <anoobj@marvell.com>; Ankur Dwivedi
><adwivedi@marvell.com>; Pavan Nikhilesh Bhagavatula
><pbhagavatula@marvell.com>
>Subject: [PATCH v1 2/2] event/octeontx2: configure crypto adapter xaq
>pool
>
>Configure xaq pool based on number of in-use crypto queues to avoid
>CPT
>add work failure due to xaq buffer run out. This patch configures
>OTX2_CPT_DEFAULT_CMD_QLEN number of xae entries per queue
>pair.
>
>Fixes: 29768f78d5a7 ("event/octeontx2: add crypto adapter
>framework")
>
>Signed-off-by: Shijith Thotton <sthotton@marvell.com>
>---
> drivers/event/octeontx2/otx2_evdev_adptr.c | 2 +-
> drivers/event/octeontx2/otx2_evdev_crypto_adptr.c | 8 ++++++++
> 2 files changed, 9 insertions(+), 1 deletion(-)
>
>diff --git a/drivers/event/octeontx2/otx2_evdev_adptr.c
>b/drivers/event/octeontx2/otx2_evdev_adptr.c
>index d69f269df..d85c3665c 100644
>--- a/drivers/event/octeontx2/otx2_evdev_adptr.c
>+++ b/drivers/event/octeontx2/otx2_evdev_adptr.c
>@@ -1,5 +1,5 @@
> /* SPDX-License-Identifier: BSD-3-Clause
>- * Copyright(C) 2019 Marvell International Ltd.
>+ * Copyright(C) 2019-2021 Marvell.
> */
>
> #include "otx2_evdev.h"
>diff --git a/drivers/event/octeontx2/otx2_evdev_crypto_adptr.c
>b/drivers/event/octeontx2/otx2_evdev_crypto_adptr.c
>index 3a96b2e34..79a6d5577 100644
>--- a/drivers/event/octeontx2/otx2_evdev_crypto_adptr.c
>+++ b/drivers/event/octeontx2/otx2_evdev_crypto_adptr.c
>@@ -88,6 +88,14 @@ otx2_ca_qp_add(const struct rte_eventdev
>*dev, const struct rte_cryptodev *cdev,
> sso_evdev->rx_offloads |= NIX_RX_OFFLOAD_SECURITY_F;
> sso_fastpath_fns_set((struct rte_eventdev *)(uintptr_t)dev);
>
>+ /* Update crypto adapter xae count */
>+ if (queue_pair_id == -1)
>+ sso_evdev->adptr_xae_cnt =
>+ vf->nb_queues *
>OTX2_CPT_DEFAULT_CMD_QLEN;
This should be sso_evdev->adaptr_xae_cnt += (vf->nb_queues * OTX2_CPT_DEFAULT_CMD_QLEN);
>+ else
>+ sso_evdev->adptr_xae_cnt +=
>OTX2_CPT_DEFAULT_CMD_QLEN;
>+ sso_xae_reconfigure((struct rte_eventdev *)(uintptr_t)dev);
>+
> return 0;
> }
>
>--
>2.25.1
With above changes
Acked-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
@@ -1,5 +1,5 @@
/* SPDX-License-Identifier: BSD-3-Clause
- * Copyright(C) 2019 Marvell International Ltd.
+ * Copyright(C) 2019-2021 Marvell.
*/
#include "otx2_evdev.h"
@@ -88,6 +88,14 @@ otx2_ca_qp_add(const struct rte_eventdev *dev, const struct rte_cryptodev *cdev,
sso_evdev->rx_offloads |= NIX_RX_OFFLOAD_SECURITY_F;
sso_fastpath_fns_set((struct rte_eventdev *)(uintptr_t)dev);
+ /* Update crypto adapter xae count */
+ if (queue_pair_id == -1)
+ sso_evdev->adptr_xae_cnt =
+ vf->nb_queues * OTX2_CPT_DEFAULT_CMD_QLEN;
+ else
+ sso_evdev->adptr_xae_cnt += OTX2_CPT_DEFAULT_CMD_QLEN;
+ sso_xae_reconfigure((struct rte_eventdev *)(uintptr_t)dev);
+
return 0;
}