From patchwork Fri Aug 12 13:23:31 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Power, Ciara" X-Patchwork-Id: 114920 Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 356D7A0543; Fri, 12 Aug 2022 15:23:42 +0200 (CEST) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id C2D0640A7F; Fri, 12 Aug 2022 15:23:41 +0200 (CEST) Received: from mga09.intel.com (mga09.intel.com [134.134.136.24]) by mails.dpdk.org (Postfix) with ESMTP id C45EF406A2 for ; Fri, 12 Aug 2022 15:23:39 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1660310620; x=1691846620; h=from:to:cc:subject:date:message-id:mime-version: content-transfer-encoding; bh=/3PLD7mfBUCcXFVgMmvXKUVuK3h9ARQGLk6AsfbG10M=; b=EWXNaQM7XxQ0H0NRIQhRP24mHhffIlWrNEu/3IYSCdUjszONkbUTuXph pBEzXAD04bR0zdmWhA+KWIIfaFHYMOCVyPg5HRd+b6jHO2vnWh2P4KtlT eBG59y/0LgATEK8dhgoCsra4AlD/0pQwDO5BHA6Mr1rmuNBTrlI8r768F 4We0A6kE9aM8DTQmvZkhZz/jC+zrQHBy/nCM99JbdGyYm5pCDA2N+tLe3 xY4oLqi9W3k0xS5MA0lKeZSwos0HrflJqKH7LAeIEtQtqYTh3sZz+jr6B WBoT7HMJVklhA5sP8jFoMZAAHGP5J0pmIY+/PZk8hA6bCVk9kIt/3GzcQ g==; X-IronPort-AV: E=McAfee;i="6400,9594,10437"; a="292386737" X-IronPort-AV: E=Sophos;i="5.93,233,1654585200"; d="scan'208";a="292386737" Received: from orsmga003.jf.intel.com ([10.7.209.27]) by orsmga102.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 12 Aug 2022 06:23:38 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.93,233,1654585200"; d="scan'208";a="556513803" Received: from silpixa00400355.ir.intel.com (HELO silpixa00400355.ger.corp.intel.com) ([10.237.222.49]) by orsmga003.jf.intel.com with ESMTP; 12 Aug 2022 06:23:37 -0700 From: Ciara Power To: Cc: dev@dpdk.org, kai.ji@intel.com, roy.fan.zhang@intel.com, pablo.de.lara.guarch@intel.com, Ciara Power Subject: [PATCH 0/3] add remaining SGL support to AESNI_MB Date: Fri, 12 Aug 2022 13:23:31 +0000 Message-Id: <20220812132334.75707-1-ciara.power@intel.com> X-Mailer: git-send-email 2.25.1 MIME-Version: 1.0 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Currently, the intel-ipsec-mb library only supports SGL for GCM and ChaCha20-Poly1305 algorithms through the JOB API. To add SGL support for other algorithms, a workaround approach is added in the AESNI_MB PMD. SGL feature flags can now be added to the PMD. This patchset also includes a fix for SGL wireless operations, and also some additional Snow3G SGL tests that were used when testing functionality of the various SGL input/output combinations. Ciara Power (3): test/crypto: fix wireless auth digest segment crypto/ipsec_mb: add remaining SGL support test/crypto: add OOP snow3g SGL tests app/test/test_cryptodev.c | 56 ++++++-- drivers/crypto/ipsec_mb/pmd_aesni_mb.c | 190 ++++++++++++++++++++----- 2 files changed, 204 insertions(+), 42 deletions(-)