From patchwork Tue Oct 4 15:40:41 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: zhoumin X-Patchwork-Id: 117319 Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id CCBC2A00C4; Tue, 4 Oct 2022 17:51:35 +0200 (CEST) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id B2B64427F4; Tue, 4 Oct 2022 17:51:27 +0200 (CEST) Received: from loongson.cn (mail.loongson.cn [114.242.206.163]) by mails.dpdk.org (Postfix) with ESMTP id BC38140DDC for ; Tue, 4 Oct 2022 17:51:24 +0200 (CEST) Received: from localhost (unknown [114.241.48.130]) by localhost.localdomain (Coremail) with SMTP id AQAAf8Bxnmv_Uzxjw_QlAA--.60303S2; Tue, 04 Oct 2022 23:40:47 +0800 (CST) From: Min Zhou To: thomas@monjalon.net, david.marchand@redhat.com, bruce.richardson@intel.com, anatoly.burakov@intel.com, qiming.yang@intel.com, Yuying.Zhang@intel.com, jgrajcia@cisco.com, konstantin.v.ananyev@yandex.ru, zhoumin@loongson.cn Cc: dev@dpdk.org, maobibo@loongson.cn Subject: [PATCH v8 0/6] Introduce support for LoongArch architecture Date: Tue, 4 Oct 2022 23:40:41 +0800 Message-Id: <20221004154047.35276-1-zhoumin@loongson.cn> X-Mailer: git-send-email 2.32.1 (Apple Git-133) MIME-Version: 1.0 X-CM-TRANSID: AQAAf8Bxnmv_Uzxjw_QlAA--.60303S2 X-Coremail-Antispam: 1UD129KBjvJXoW3XF4UXr43JFy8Jw1xAFyrJFb_yoWxXF4Upr WDCFnxKa1xGr4xXr9Iva4jgFn5Z3Z7G342gFyagryrCry2qw4DZr4xKF98ZFy7A34Utr10 gr4fWw1UWF1UWaUanT9S1TB71UUUUUUqnTZGkaVYY2UrUUUUjbIjqfuFe4nvWSU5nxnvy2 9KBjDU0xBIdaVrnRJUUUvE14x267AKxVW8JVW5JwAFc2x0x2IEx4CE42xK8VAvwI8IcIk0 rVWrJVCq3wAFIxvE14AKwVWUJVWUGwA2ocxC64kIII0Yj41l84x0c7CEw4AK67xGY2AK02 1l84ACjcxK6xIIjxv20xvE14v26r1j6r1xM28EF7xvwVC0I7IYx2IY6xkF7I0E14v26r4j 6F4UM28EF7xvwVC2z280aVAFwI0_Gr1j6F4UJwA2z4x0Y4vEx4A2jsIEc7CjxVAFwI0_Gr 1j6F4UJwAS0I0E0xvYzxvE52x082IY62kv0487Mc02F40EFcxC0VAKzVAqx4xG6I80ewAv 7VC0I7IYx2IY67AKxVWUJVWUGwAv7VC2z280aVAFwI0_Jr0_Gr1lOx8S6xCaFVCjc4AY6r 1j6r4UM4x0Y48IcxkI7VAKI48JM4x0x7Aq67IIx4CEVc8vx2IErcIFxwACI402YVCY1x02 628vn2kIc2xKxwCY02Avz4vE14v_XrWl42xK82IYc2Ij64vIr41l4I8I3I0E4IkC6x0Yz7 v_Jr0_Gr1lx2IqxVAqx4xG67AKxVWUJVWUGwC20s026x8GjcxK67AKxVWUGVWUWwC2zVAF 1VAY17CE14v26r1q6r43MIIYrxkI7VAKI48JMIIF0xvE2Ix0cI8IcVAFwI0_Jr0_JF4lIx AIcVC0I7IYx2IY6xkF7I0E14v26r4j6F4UMIIF0xvE42xK8VAvwI8IcIk0rVWUJVWUCwCI 42IY6I8E87Iv67AKxVWUJVW8JwCI42IY6I8E87Iv6xkF7I0E14v26r4j6r4UJbIYCTnIWI evJa73UjIFyTuYvjfUnwZ2UUUUU X-CM-SenderInfo: 52kr3ztlq6z05rqj20fqof0/ X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Dear team, The following patch set is intended to support DPDK running on LoongArch architecture. LoongArch is the general processor architecture of Loongson Corporation and is a new RISC ISA, which is a bit like MIPS or RISC-V. The online documents of LoongArch architecture are here: https://loongson.github.io/LoongArch-Documentation/README-EN.html The latest build tools for LoongArch (binary) can be downloaded from: https://github.com/loongson/build-tools If you want to generate your own cross toolchain, you can refer to this thread: https://inbox.dpdk.org/dev/53b50799-cb29-7ee6-be89-4fe21566e127@loongson.cn/T/#m1da99578f85894a4ddcd8e39d8239869e6a501d1 From the link above, you can find a script to do that. v8: - rebase the patchset on the main repository - add meson build test for LoongArch in devtools/test-meson-builds.sh - add ccache to build configuration file - change the cpp meson variable to a c++ compiler - complete the cross compilation documentation for LoongArch, adding reference to the build script and dependency list - put the feature description for LoongArch in the EAL features list in release_22_11.rst - simplify macro definition for new added headers - put the items about LoongArch in the right place in meson.build v7: - rebase the patchset on the main repository - add errno.h to rte_power_intrinsics.c according with commit 72b452c5f259 v6: - place some blocks for LoongArch in a pseudo alphabetical order - remove some macros not used - update release notes in the correct format - remove some headers for LoongArch, including msclock, pflock and ticketlock, which are now non-arch specific - rename some helpers to make them more readable - remove some copied comments - force-set RTE_FORCE_INTRINSICS in config and remove non-arch specific implementations - fix format errors in meson file reported by check-meson.py - rebase the patchset on the main repository v5: - merge all patches for supporting LoongArch EAL into one patch - add LoongArch cross compilation document and update some documents related to architecture - remove vector stubs added for LoongArch in net/i40e and net/ixgbe - add LOONGARCH64 cross compilation job in github ci v4: - rebase the patchset on the main repository of version 22.07.0 v3: - add URL for cross compile tool chain - remove rte_lpm_lsx.h which was a dummy vector implementation because there is already a scalar implementation, thanks to Michal Mazurek - modify the name of compiler for cross compiling - remove useless variable in meson.build v2: - use standard atomics of toolchain to implement atomic operations - implement spinlock based on standard atomics Min Zhou (6): eal/loongarch: support LoongArch architecture net/ixgbe: add vector stubs for LoongArch net/memif: set memfd syscall ID on LoongArch net/tap: set BPF syscall ID for LoongArch examples/l3fwd: enable LoongArch operation test/cpuflags: add test for LoongArch cpu flag MAINTAINERS | 6 ++ app/test/test_cpuflags.c | 41 ++++++++ app/test/test_xmmt_ops.h | 12 +++ .../loongarch/loongarch_loongarch64_linux_gcc | 16 +++ config/loongarch/meson.build | 43 ++++++++ devtools/test-meson-builds.sh | 4 + doc/guides/contributing/design.rst | 2 +- .../cross_build_dpdk_for_loongarch.rst | 97 +++++++++++++++++++ doc/guides/linux_gsg/index.rst | 1 + doc/guides/nics/features.rst | 8 ++ doc/guides/nics/features/default.ini | 1 + doc/guides/nics/features/ixgbe.ini | 1 + doc/guides/rel_notes/release_22_11.rst | 7 ++ drivers/net/i40e/meson.build | 6 ++ drivers/net/ixgbe/ixgbe_rxtx.c | 7 +- drivers/net/memif/rte_eth_memif.h | 2 + drivers/net/tap/tap_bpf.h | 2 + examples/l3fwd/l3fwd_em.c | 8 ++ lib/eal/linux/eal_memory.c | 4 + lib/eal/loongarch/include/meson.build | 18 ++++ lib/eal/loongarch/include/rte_atomic.h | 47 +++++++++ lib/eal/loongarch/include/rte_byteorder.h | 40 ++++++++ lib/eal/loongarch/include/rte_cpuflags.h | 39 ++++++++ lib/eal/loongarch/include/rte_cycles.h | 47 +++++++++ lib/eal/loongarch/include/rte_io.h | 18 ++++ lib/eal/loongarch/include/rte_memcpy.h | 61 ++++++++++++ lib/eal/loongarch/include/rte_pause.h | 24 +++++ .../loongarch/include/rte_power_intrinsics.h | 20 ++++ lib/eal/loongarch/include/rte_prefetch.h | 47 +++++++++ lib/eal/loongarch/include/rte_rwlock.h | 42 ++++++++ lib/eal/loongarch/include/rte_spinlock.h | 64 ++++++++++++ lib/eal/loongarch/include/rte_vect.h | 65 +++++++++++++ lib/eal/loongarch/meson.build | 11 +++ lib/eal/loongarch/rte_cpuflags.c | 93 ++++++++++++++++++ lib/eal/loongarch/rte_cycles.c | 45 +++++++++ lib/eal/loongarch/rte_hypervisor.c | 11 +++ lib/eal/loongarch/rte_power_intrinsics.c | 53 ++++++++++ meson.build | 2 + 38 files changed, 1012 insertions(+), 3 deletions(-) create mode 100644 config/loongarch/loongarch_loongarch64_linux_gcc create mode 100644 config/loongarch/meson.build create mode 100644 doc/guides/linux_gsg/cross_build_dpdk_for_loongarch.rst create mode 100644 lib/eal/loongarch/include/meson.build create mode 100644 lib/eal/loongarch/include/rte_atomic.h create mode 100644 lib/eal/loongarch/include/rte_byteorder.h create mode 100644 lib/eal/loongarch/include/rte_cpuflags.h create mode 100644 lib/eal/loongarch/include/rte_cycles.h create mode 100644 lib/eal/loongarch/include/rte_io.h create mode 100644 lib/eal/loongarch/include/rte_memcpy.h create mode 100644 lib/eal/loongarch/include/rte_pause.h create mode 100644 lib/eal/loongarch/include/rte_power_intrinsics.h create mode 100644 lib/eal/loongarch/include/rte_prefetch.h create mode 100644 lib/eal/loongarch/include/rte_rwlock.h create mode 100644 lib/eal/loongarch/include/rte_spinlock.h create mode 100644 lib/eal/loongarch/include/rte_vect.h create mode 100644 lib/eal/loongarch/meson.build create mode 100644 lib/eal/loongarch/rte_cpuflags.c create mode 100644 lib/eal/loongarch/rte_cycles.c create mode 100644 lib/eal/loongarch/rte_hypervisor.c create mode 100644 lib/eal/loongarch/rte_power_intrinsics.c