From patchwork Mon Oct 27 02:13:20 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jijiang Liu X-Patchwork-Id: 968 Return-Path: X-Original-To: patchwork@dpdk.org Delivered-To: patchwork@dpdk.org Received: from [92.243.14.124] (localhost [IPv6:::1]) by dpdk.org (Postfix) with ESMTP id 96CEE7F4C; Mon, 27 Oct 2014 03:05:09 +0100 (CET) Received: from mga02.intel.com (mga02.intel.com [134.134.136.20]) by dpdk.org (Postfix) with ESMTP id 0DCE17F41 for ; Mon, 27 Oct 2014 03:05:00 +0100 (CET) Received: from orsmga002.jf.intel.com ([10.7.209.21]) by orsmga101.jf.intel.com with ESMTP; 26 Oct 2014 19:13:41 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.04,792,1406617200"; d="scan'208";a="625956281" Received: from shvmail01.sh.intel.com ([10.239.29.42]) by orsmga002.jf.intel.com with ESMTP; 26 Oct 2014 19:13:40 -0700 Received: from shecgisg004.sh.intel.com (shecgisg004.sh.intel.com [10.239.29.89]) by shvmail01.sh.intel.com with ESMTP id s9R2DdkZ016735; Mon, 27 Oct 2014 10:13:39 +0800 Received: from shecgisg004.sh.intel.com (localhost [127.0.0.1]) by shecgisg004.sh.intel.com (8.13.6/8.13.6/SuSE Linux 0.8) with ESMTP id s9R2DbfX031465; Mon, 27 Oct 2014 10:13:39 +0800 Received: (from jijiangl@localhost) by shecgisg004.sh.intel.com (8.13.6/8.13.6/Submit) id s9R2Da3D031461; Mon, 27 Oct 2014 10:13:36 +0800 From: Jijiang Liu To: dev@dpdk.org Date: Mon, 27 Oct 2014 10:13:20 +0800 Message-Id: <1414376006-31402-5-git-send-email-jijiang.liu@intel.com> X-Mailer: git-send-email 1.7.12.2 In-Reply-To: <1414376006-31402-1-git-send-email-jijiang.liu@intel.com> References: <1414376006-31402-1-git-send-email-jijiang.liu@intel.com> Subject: [dpdk-dev] [PATCH v8 04/10] i40e:support VxLAN packet identification in i40e X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: patches and discussions about DPDK List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" Implement the configuration API of VxLAN destination UDP port in librte_pmd_i40e, and add new Rx offload flags for supporting VXLAN packet offload. Signed-off-by: Jijiang Liu --- lib/librte_mbuf/rte_mbuf.h | 2 + lib/librte_pmd_i40e/i40e_ethdev.c | 157 +++++++++++++++++++++++++++++++++++++ lib/librte_pmd_i40e/i40e_ethdev.h | 8 ++- lib/librte_pmd_i40e/i40e_rxtx.c | 105 +++++++++++++----------- 4 files changed, 223 insertions(+), 49 deletions(-) diff --git a/lib/librte_mbuf/rte_mbuf.h b/lib/librte_mbuf/rte_mbuf.h index 497d88b..9af3bd9 100644 --- a/lib/librte_mbuf/rte_mbuf.h +++ b/lib/librte_mbuf/rte_mbuf.h @@ -91,6 +91,8 @@ extern "C" { #define PKT_RX_IPV6_HDR_EXT (1ULL << 8) /**< RX packet with extended IPv6 header. */ #define PKT_RX_IEEE1588_PTP (1ULL << 9) /**< RX IEEE1588 L2 Ethernet PT Packet. */ #define PKT_RX_IEEE1588_TMST (1ULL << 10) /**< RX IEEE1588 L2/L4 timestamped packet.*/ +#define PKT_RX_TUNNEL_IPV4_HDR (1ULL << 11) /**< RX tunnel packet with IPv4 header.*/ +#define PKT_RX_TUNNEL_IPV6_HDR (1ULL << 12) /**< RX tunnel packet with IPv6 header. */ #define PKT_TX_VLAN_PKT (1ULL << 55) /**< TX packet is a 802.1q VLAN packet. */ #define PKT_TX_IP_CKSUM (1ULL << 54) /**< IP cksum of TX pkt. computed by NIC. */ diff --git a/lib/librte_pmd_i40e/i40e_ethdev.c b/lib/librte_pmd_i40e/i40e_ethdev.c index 3b75f0f..eb643e5 100644 --- a/lib/librte_pmd_i40e/i40e_ethdev.c +++ b/lib/librte_pmd_i40e/i40e_ethdev.c @@ -186,6 +186,10 @@ static int i40e_dev_rss_hash_update(struct rte_eth_dev *dev, struct rte_eth_rss_conf *rss_conf); static int i40e_dev_rss_hash_conf_get(struct rte_eth_dev *dev, struct rte_eth_rss_conf *rss_conf); +static int i40e_dev_udp_tunnel_add(struct rte_eth_dev *dev, + struct rte_eth_udp_tunnel *udp_tunnel); +static int i40e_dev_udp_tunnel_del(struct rte_eth_dev *dev, + struct rte_eth_udp_tunnel *udp_tunnel); static int i40e_dev_filter_ctrl(struct rte_eth_dev *dev, enum rte_filter_type filter_type, enum rte_filter_op filter_op, @@ -241,6 +245,8 @@ static struct eth_dev_ops i40e_eth_dev_ops = { .reta_query = i40e_dev_rss_reta_query, .rss_hash_update = i40e_dev_rss_hash_update, .rss_hash_conf_get = i40e_dev_rss_hash_conf_get, + .udp_tunnel_add = i40e_dev_udp_tunnel_add, + .udp_tunnel_del = i40e_dev_udp_tunnel_del, .filter_ctrl = i40e_dev_filter_ctrl, }; @@ -4092,6 +4098,157 @@ i40e_dev_rss_hash_conf_get(struct rte_eth_dev *dev, return 0; } +static int +i40e_get_vxlan_port_idx(struct i40e_pf *pf, uint16_t port) +{ + uint8_t i; + + for (i = 0; i < I40E_MAX_PF_UDP_OFFLOAD_PORTS; i++) { + if (pf->vxlan_ports[i] == port) + return i; + } + + return -1; +} + +static int +i40e_add_vxlan_port(struct i40e_pf *pf, uint16_t port) +{ + int idx, ret; + uint8_t filter_idx; + struct i40e_hw *hw = I40E_PF_TO_HW(pf); + + idx = i40e_get_vxlan_port_idx(pf, port); + + /* Check if port already exists */ + if (idx >= 0) { + PMD_DRV_LOG(ERR, "Port %d already offloaded\n", port); + return -EINVAL; + } + + /* Now check if there is space to add the new port */ + idx = i40e_get_vxlan_port_idx(pf, 0); + if (idx < 0) { + PMD_DRV_LOG(ERR, "Maximum number of UDP ports reached," + "not adding port %d\n", port); + return -ENOSPC; + } + + ret = i40e_aq_add_udp_tunnel(hw, port, I40E_AQC_TUNNEL_TYPE_VXLAN, + &filter_idx, NULL); + if (ret < 0) { + PMD_DRV_LOG(ERR, "Failed to add VxLAN UDP port %d\n", port); + return -1; + } + + PMD_DRV_LOG(INFO, "Added %s port %d with AQ command with index %d\n", + port, filter_index); + + /* New port: add it and mark its index in the bitmap */ + pf->vxlan_ports[idx] = port; + pf->vxlan_bitmap |= (1 << idx); + + if (!(pf->flags & I40E_FLAG_VXLAN)) + pf->flags |= I40E_FLAG_VXLAN; + + return 0; +} + +static int +i40e_del_vxlan_port(struct i40e_pf *pf, uint16_t port) +{ + int idx; + struct i40e_hw *hw = I40E_PF_TO_HW(pf); + + if (!(pf->flags & I40E_FLAG_VXLAN)) { + PMD_DRV_LOG(ERR, "VxLAN UDP port was not configured.\n"); + return -EINVAL; + } + + idx = i40e_get_vxlan_port_idx(pf, port); + + if (idx < 0) { + PMD_DRV_LOG(ERR, "Port %d doesn't exist\n", port); + return -EINVAL; + } + + if (i40e_aq_del_udp_tunnel(hw, idx, NULL) < 0) { + PMD_DRV_LOG(ERR, "Failed to delete VxLAN UDP port %d\n", port); + return -1; + } + + PMD_DRV_LOG(INFO, "Deleted port %d with AQ command with index %d\n", + port, idx); + + pf->vxlan_ports[idx] = 0; + pf->vxlan_bitmap &= ~(1 << idx); + + if (!pf->vxlan_bitmap) + pf->flags &= ~I40E_FLAG_VXLAN; + + return 0; +} + +/* Add UDP tunneling port */ +static int +i40e_dev_udp_tunnel_add(struct rte_eth_dev *dev, + struct rte_eth_udp_tunnel *udp_tunnel) +{ + int ret = 0; + struct i40e_pf *pf = I40E_DEV_PRIVATE_TO_PF(dev->data->dev_private); + + if (udp_tunnel == NULL) + return -EINVAL; + + switch (udp_tunnel->prot_type) { + case RTE_TUNNEL_TYPE_VXLAN: + ret = i40e_add_vxlan_port(pf, udp_tunnel->udp_port); + break; + + case RTE_TUNNEL_TYPE_GENEVE: + case RTE_TUNNEL_TYPE_TEREDO: + PMD_DRV_LOG(ERR, "Tunnel type is not supported now.\n"); + ret = -1; + break; + + default: + PMD_DRV_LOG(ERR, "Invalid tunnel type\n"); + ret = -1; + break; + } + + return ret; +} + +/* Remove UDP tunneling port */ +static int +i40e_dev_udp_tunnel_del(struct rte_eth_dev *dev, + struct rte_eth_udp_tunnel *udp_tunnel) +{ + int ret = 0; + struct i40e_pf *pf = I40E_DEV_PRIVATE_TO_PF(dev->data->dev_private); + + if (udp_tunnel == NULL) + return -EINVAL; + + switch (udp_tunnel->prot_type) { + case RTE_TUNNEL_TYPE_VXLAN: + ret = i40e_del_vxlan_port(pf, udp_tunnel->udp_port); + break; + case RTE_TUNNEL_TYPE_GENEVE: + case RTE_TUNNEL_TYPE_TEREDO: + PMD_DRV_LOG(ERR, "Tunnel type is not supported now.\n"); + ret = -1; + break; + default: + PMD_DRV_LOG(ERR, "Invalid tunnel type\n"); + ret = -1; + break; + } + + return ret; +} + /* Configure RSS */ static int i40e_pf_config_rss(struct i40e_pf *pf) diff --git a/lib/librte_pmd_i40e/i40e_ethdev.h b/lib/librte_pmd_i40e/i40e_ethdev.h index 1d42cd2..826a1fb 100644 --- a/lib/librte_pmd_i40e/i40e_ethdev.h +++ b/lib/librte_pmd_i40e/i40e_ethdev.h @@ -60,13 +60,15 @@ #define I40E_FLAG_HEADER_SPLIT_DISABLED (1ULL << 4) #define I40E_FLAG_HEADER_SPLIT_ENABLED (1ULL << 5) #define I40E_FLAG_FDIR (1ULL << 6) +#define I40E_FLAG_VXLAN (1ULL << 7) #define I40E_FLAG_ALL (I40E_FLAG_RSS | \ I40E_FLAG_DCB | \ I40E_FLAG_VMDQ | \ I40E_FLAG_SRIOV | \ I40E_FLAG_HEADER_SPLIT_DISABLED | \ I40E_FLAG_HEADER_SPLIT_ENABLED | \ - I40E_FLAG_FDIR) + I40E_FLAG_FDIR | \ + I40E_FLAG_VXLAN) #define I40E_RSS_OFFLOAD_ALL ( \ ETH_RSS_NONF_IPV4_UDP | \ @@ -246,6 +248,10 @@ struct i40e_pf { uint16_t vmdq_nb_qps; /* The number of queue pairs of VMDq */ uint16_t vf_nb_qps; /* The number of queue pairs of VF */ uint16_t fdir_nb_qps; /* The number of queue pairs of Flow Director */ + + /* store VxLAN UDP ports */ + uint16_t vxlan_ports[I40E_MAX_PF_UDP_OFFLOAD_PORTS]; + uint16_t vxlan_bitmap; /* Vxlan bit mask */ }; enum pending_msg { diff --git a/lib/librte_pmd_i40e/i40e_rxtx.c b/lib/librte_pmd_i40e/i40e_rxtx.c index 2b53677..2108290 100644 --- a/lib/librte_pmd_i40e/i40e_rxtx.c +++ b/lib/librte_pmd_i40e/i40e_rxtx.c @@ -208,34 +208,34 @@ i40e_rxd_ptype_to_pkt_flags(uint64_t qword) PKT_RX_IPV4_HDR_EXT, /* PTYPE 56 */ PKT_RX_IPV4_HDR_EXT, /* PTYPE 57 */ PKT_RX_IPV4_HDR_EXT, /* PTYPE 58 */ - PKT_RX_IPV4_HDR_EXT, /* PTYPE 59 */ - PKT_RX_IPV4_HDR_EXT, /* PTYPE 60 */ - PKT_RX_IPV4_HDR_EXT, /* PTYPE 61 */ + PKT_RX_TUNNEL_IPV4_HDR, /* PTYPE 59 */ + PKT_RX_TUNNEL_IPV4_HDR, /* PTYPE 60 */ + PKT_RX_TUNNEL_IPV4_HDR, /* PTYPE 61 */ 0, /* PTYPE 62 */ - PKT_RX_IPV4_HDR_EXT, /* PTYPE 63 */ - PKT_RX_IPV4_HDR_EXT, /* PTYPE 64 */ - PKT_RX_IPV4_HDR_EXT, /* PTYPE 65 */ - PKT_RX_IPV4_HDR_EXT, /* PTYPE 66 */ - PKT_RX_IPV4_HDR_EXT, /* PTYPE 67 */ - PKT_RX_IPV4_HDR_EXT, /* PTYPE 68 */ + PKT_RX_TUNNEL_IPV4_HDR, /* PTYPE 63 */ + PKT_RX_TUNNEL_IPV4_HDR, /* PTYPE 64 */ + PKT_RX_TUNNEL_IPV4_HDR, /* PTYPE 65 */ + PKT_RX_TUNNEL_IPV4_HDR, /* PTYPE 66 */ + PKT_RX_TUNNEL_IPV4_HDR, /* PTYPE 67 */ + PKT_RX_TUNNEL_IPV4_HDR, /* PTYPE 68 */ 0, /* PTYPE 69 */ - PKT_RX_IPV4_HDR_EXT, /* PTYPE 70 */ - PKT_RX_IPV4_HDR_EXT, /* PTYPE 71 */ - PKT_RX_IPV4_HDR_EXT, /* PTYPE 72 */ - PKT_RX_IPV4_HDR_EXT, /* PTYPE 73 */ - PKT_RX_IPV4_HDR_EXT, /* PTYPE 74 */ - PKT_RX_IPV4_HDR_EXT, /* PTYPE 75 */ - PKT_RX_IPV4_HDR_EXT, /* PTYPE 76 */ + PKT_RX_TUNNEL_IPV4_HDR, /* PTYPE 70 */ + PKT_RX_TUNNEL_IPV4_HDR, /* PTYPE 71 */ + PKT_RX_TUNNEL_IPV4_HDR, /* PTYPE 72 */ + PKT_RX_TUNNEL_IPV4_HDR, /* PTYPE 73 */ + PKT_RX_TUNNEL_IPV4_HDR, /* PTYPE 74 */ + PKT_RX_TUNNEL_IPV4_HDR, /* PTYPE 75 */ + PKT_RX_TUNNEL_IPV4_HDR, /* PTYPE 76 */ 0, /* PTYPE 77 */ - PKT_RX_IPV4_HDR_EXT, /* PTYPE 78 */ - PKT_RX_IPV4_HDR_EXT, /* PTYPE 79 */ - PKT_RX_IPV4_HDR_EXT, /* PTYPE 80 */ - PKT_RX_IPV4_HDR_EXT, /* PTYPE 81 */ - PKT_RX_IPV4_HDR_EXT, /* PTYPE 82 */ - PKT_RX_IPV4_HDR_EXT, /* PTYPE 83 */ + PKT_RX_TUNNEL_IPV4_HDR, /* PTYPE 78 */ + PKT_RX_TUNNEL_IPV4_HDR, /* PTYPE 79 */ + PKT_RX_TUNNEL_IPV4_HDR, /* PTYPE 80 */ + PKT_RX_TUNNEL_IPV4_HDR, /* PTYPE 81 */ + PKT_RX_TUNNEL_IPV4_HDR, /* PTYPE 82 */ + PKT_RX_TUNNEL_IPV4_HDR, /* PTYPE 83 */ 0, /* PTYPE 84 */ - PKT_RX_IPV4_HDR_EXT, /* PTYPE 85 */ - PKT_RX_IPV4_HDR_EXT, /* PTYPE 86 */ + PKT_RX_TUNNEL_IPV4_HDR, /* PTYPE 85 */ + PKT_RX_TUNNEL_IPV4_HDR, /* PTYPE 86 */ PKT_RX_IPV4_HDR_EXT, /* PTYPE 87 */ PKT_RX_IPV6_HDR, /* PTYPE 88 */ PKT_RX_IPV6_HDR, /* PTYPE 89 */ @@ -274,34 +274,34 @@ i40e_rxd_ptype_to_pkt_flags(uint64_t qword) PKT_RX_IPV6_HDR_EXT, /* PTYPE 122 */ PKT_RX_IPV6_HDR_EXT, /* PTYPE 123 */ PKT_RX_IPV6_HDR_EXT, /* PTYPE 124 */ - PKT_RX_IPV6_HDR_EXT, /* PTYPE 125 */ - PKT_RX_IPV6_HDR_EXT, /* PTYPE 126 */ - PKT_RX_IPV6_HDR_EXT, /* PTYPE 127 */ + PKT_RX_TUNNEL_IPV6_HDR, /* PTYPE 125 */ + PKT_RX_TUNNEL_IPV6_HDR, /* PTYPE 126 */ + PKT_RX_TUNNEL_IPV6_HDR, /* PTYPE 127 */ 0, /* PTYPE 128 */ - PKT_RX_IPV6_HDR_EXT, /* PTYPE 129 */ - PKT_RX_IPV6_HDR_EXT, /* PTYPE 130 */ - PKT_RX_IPV6_HDR_EXT, /* PTYPE 131 */ - PKT_RX_IPV6_HDR_EXT, /* PTYPE 132 */ - PKT_RX_IPV6_HDR_EXT, /* PTYPE 133 */ - PKT_RX_IPV6_HDR_EXT, /* PTYPE 134 */ + PKT_RX_TUNNEL_IPV6_HDR, /* PTYPE 129 */ + PKT_RX_TUNNEL_IPV6_HDR, /* PTYPE 130 */ + PKT_RX_TUNNEL_IPV6_HDR, /* PTYPE 131 */ + PKT_RX_TUNNEL_IPV6_HDR, /* PTYPE 132 */ + PKT_RX_TUNNEL_IPV6_HDR, /* PTYPE 133 */ + PKT_RX_TUNNEL_IPV6_HDR, /* PTYPE 134 */ 0, /* PTYPE 135 */ - PKT_RX_IPV6_HDR_EXT, /* PTYPE 136 */ - PKT_RX_IPV6_HDR_EXT, /* PTYPE 137 */ - PKT_RX_IPV6_HDR_EXT, /* PTYPE 138 */ - PKT_RX_IPV6_HDR_EXT, /* PTYPE 139 */ - PKT_RX_IPV6_HDR_EXT, /* PTYPE 140 */ - PKT_RX_IPV6_HDR_EXT, /* PTYPE 141 */ - PKT_RX_IPV6_HDR_EXT, /* PTYPE 142 */ + PKT_RX_TUNNEL_IPV6_HDR, /* PTYPE 136 */ + PKT_RX_TUNNEL_IPV6_HDR, /* PTYPE 137 */ + PKT_RX_TUNNEL_IPV6_HDR, /* PTYPE 138 */ + PKT_RX_TUNNEL_IPV6_HDR, /* PTYPE 139 */ + PKT_RX_TUNNEL_IPV6_HDR, /* PTYPE 140 */ + PKT_RX_TUNNEL_IPV6_HDR, /* PTYPE 141 */ + PKT_RX_TUNNEL_IPV6_HDR, /* PTYPE 142 */ 0, /* PTYPE 143 */ - PKT_RX_IPV6_HDR_EXT, /* PTYPE 144 */ - PKT_RX_IPV6_HDR_EXT, /* PTYPE 145 */ - PKT_RX_IPV6_HDR_EXT, /* PTYPE 146 */ - PKT_RX_IPV6_HDR_EXT, /* PTYPE 147 */ - PKT_RX_IPV6_HDR_EXT, /* PTYPE 148 */ - PKT_RX_IPV6_HDR_EXT, /* PTYPE 149 */ + PKT_RX_TUNNEL_IPV6_HDR, /* PTYPE 144 */ + PKT_RX_TUNNEL_IPV6_HDR, /* PTYPE 145 */ + PKT_RX_TUNNEL_IPV6_HDR, /* PTYPE 146 */ + PKT_RX_TUNNEL_IPV6_HDR, /* PTYPE 147 */ + PKT_RX_TUNNEL_IPV6_HDR, /* PTYPE 148 */ + PKT_RX_TUNNEL_IPV6_HDR, /* PTYPE 149 */ 0, /* PTYPE 150 */ - PKT_RX_IPV6_HDR_EXT, /* PTYPE 151 */ - PKT_RX_IPV6_HDR_EXT, /* PTYPE 152 */ + PKT_RX_TUNNEL_IPV6_HDR, /* PTYPE 151 */ + PKT_RX_TUNNEL_IPV6_HDR, /* PTYPE 152 */ PKT_RX_IPV6_HDR_EXT, /* PTYPE 153 */ 0, /* PTYPE 154 */ 0, /* PTYPE 155 */ @@ -638,6 +638,10 @@ i40e_rx_scan_hw_ring(struct i40e_rx_queue *rxq) pkt_flags |= i40e_rxd_error_to_pkt_flags(qword1); pkt_flags |= i40e_rxd_ptype_to_pkt_flags(qword1); mb->ol_flags = pkt_flags; + + mb->packet_type = (uint16_t)((qword1 & + I40E_RXD_QW1_PTYPE_MASK) >> + I40E_RXD_QW1_PTYPE_SHIFT); if (pkt_flags & PKT_RX_RSS_HASH) mb->hash.rss = rte_le_to_cpu_32(\ rxdp->wb.qword0.hi_dword.rss); @@ -873,6 +877,8 @@ i40e_recv_pkts(void *rx_queue, struct rte_mbuf **rx_pkts, uint16_t nb_pkts) pkt_flags = i40e_rxd_status_to_pkt_flags(qword1); pkt_flags |= i40e_rxd_error_to_pkt_flags(qword1); pkt_flags |= i40e_rxd_ptype_to_pkt_flags(qword1); + rxm->packet_type = (uint16_t)((qword1 & I40E_RXD_QW1_PTYPE_MASK) >> + I40E_RXD_QW1_PTYPE_SHIFT); rxm->ol_flags = pkt_flags; if (pkt_flags & PKT_RX_RSS_HASH) rxm->hash.rss = @@ -1027,6 +1033,9 @@ i40e_recv_scattered_pkts(void *rx_queue, pkt_flags = i40e_rxd_status_to_pkt_flags(qword1); pkt_flags |= i40e_rxd_error_to_pkt_flags(qword1); pkt_flags |= i40e_rxd_ptype_to_pkt_flags(qword1); + first_seg->packet_type = (uint16_t)((qword1 & + I40E_RXD_QW1_PTYPE_MASK) >> + I40E_RXD_QW1_PTYPE_SHIFT); first_seg->ol_flags = pkt_flags; if (pkt_flags & PKT_RX_RSS_HASH) rxm->hash.rss =