From patchwork Tue May 5 02:32:21 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Zhang, Helin" X-Patchwork-Id: 4609 Return-Path: X-Original-To: patchwork@dpdk.org Delivered-To: patchwork@dpdk.org Received: from [92.243.14.124] (localhost [IPv6:::1]) by dpdk.org (Postfix) with ESMTP id A2962C5FE; Tue, 5 May 2015 04:32:42 +0200 (CEST) Received: from mga03.intel.com (mga03.intel.com [134.134.136.65]) by dpdk.org (Postfix) with ESMTP id ABB41C5DE for ; Tue, 5 May 2015 04:32:40 +0200 (CEST) Received: from orsmga002.jf.intel.com ([10.7.209.21]) by orsmga103.jf.intel.com with ESMTP; 04 May 2015 19:32:41 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.13,369,1427785200"; d="scan'208";a="723703397" Received: from shvmail01.sh.intel.com ([10.239.29.42]) by orsmga002.jf.intel.com with ESMTP; 04 May 2015 19:32:39 -0700 Received: from shecgisg004.sh.intel.com (shecgisg004.sh.intel.com [10.239.29.89]) by shvmail01.sh.intel.com with ESMTP id t452WbFv002002; Tue, 5 May 2015 10:32:37 +0800 Received: from shecgisg004.sh.intel.com (localhost [127.0.0.1]) by shecgisg004.sh.intel.com (8.13.6/8.13.6/SuSE Linux 0.8) with ESMTP id t452WXfl003672; Tue, 5 May 2015 10:32:35 +0800 Received: (from hzhan75@localhost) by shecgisg004.sh.intel.com (8.13.6/8.13.6/Submit) id t452WXb7003668; Tue, 5 May 2015 10:32:33 +0800 From: Helin Zhang To: dev@dpdk.org Date: Tue, 5 May 2015 10:32:21 +0800 Message-Id: <1430793143-3610-5-git-send-email-helin.zhang@intel.com> X-Mailer: git-send-email 1.7.4.1 In-Reply-To: <1430793143-3610-1-git-send-email-helin.zhang@intel.com> References: <1430793143-3610-1-git-send-email-helin.zhang@intel.com> Subject: [dpdk-dev] [PATCH RFC 4/6] ethdev: add QinQ offload capability flags X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: patches and discussions about DPDK List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" As offload capabilities of QinQ stripping and insertion are supported by some of the supported hardware, the offload capability flags should be added accordingly. Signed-off-by: Helin Zhang --- lib/librte_ether/rte_ethdev.h | 28 +++++++++++++++------------- 1 file changed, 15 insertions(+), 13 deletions(-) diff --git a/lib/librte_ether/rte_ethdev.h b/lib/librte_ether/rte_ethdev.h index 4648290..1855b2e 100644 --- a/lib/librte_ether/rte_ethdev.h +++ b/lib/librte_ether/rte_ethdev.h @@ -881,23 +881,25 @@ struct rte_eth_conf { /** * RX offload capabilities of a device. */ -#define DEV_RX_OFFLOAD_VLAN_STRIP 0x00000001 -#define DEV_RX_OFFLOAD_IPV4_CKSUM 0x00000002 -#define DEV_RX_OFFLOAD_UDP_CKSUM 0x00000004 -#define DEV_RX_OFFLOAD_TCP_CKSUM 0x00000008 -#define DEV_RX_OFFLOAD_TCP_LRO 0x00000010 +#define DEV_RX_OFFLOAD_VLAN_STRIP 0x00000001 +#define DEV_RX_OFFLOAD_QINQ_STRIP 0x00000002 +#define DEV_RX_OFFLOAD_IPV4_CKSUM 0x00000004 +#define DEV_RX_OFFLOAD_UDP_CKSUM 0x00000008 +#define DEV_RX_OFFLOAD_TCP_CKSUM 0x00000010 +#define DEV_RX_OFFLOAD_TCP_LRO 0x00000020 /** * TX offload capabilities of a device. */ -#define DEV_TX_OFFLOAD_VLAN_INSERT 0x00000001 -#define DEV_TX_OFFLOAD_IPV4_CKSUM 0x00000002 -#define DEV_TX_OFFLOAD_UDP_CKSUM 0x00000004 -#define DEV_TX_OFFLOAD_TCP_CKSUM 0x00000008 -#define DEV_TX_OFFLOAD_SCTP_CKSUM 0x00000010 -#define DEV_TX_OFFLOAD_TCP_TSO 0x00000020 -#define DEV_TX_OFFLOAD_UDP_TSO 0x00000040 -#define DEV_TX_OFFLOAD_OUTER_IPV4_CKSUM 0x00000080 /**< Used for tunneling packet. */ +#define DEV_TX_OFFLOAD_VLAN_INSERT 0x00000001 +#define DEV_TX_OFFLOAD_QINQ_INSERT 0x00000002 +#define DEV_TX_OFFLOAD_IPV4_CKSUM 0x00000004 +#define DEV_TX_OFFLOAD_UDP_CKSUM 0x00000008 +#define DEV_TX_OFFLOAD_TCP_CKSUM 0x00000010 +#define DEV_TX_OFFLOAD_SCTP_CKSUM 0x00000020 +#define DEV_TX_OFFLOAD_TCP_TSO 0x00000040 +#define DEV_TX_OFFLOAD_UDP_TSO 0x00000080 +#define DEV_TX_OFFLOAD_OUTER_IPV4_CKSUM 0x00000100 struct rte_eth_dev_info { struct rte_pci_device *pci_dev; /**< Device PCI information. */